Re: GSoC 2015: Raspberry Pi 2 Support

Great news on the Pi 2 cache configuration! I am looking forward to a patch to try. Alan On Sun, Jun 21, 2015 at 3:27 PM, Rohini Kulkarni wrote: > :) > There is very little code that had to be added. > I need to clean the code and add conditional call for Pi 2. Then I would > be ready to submi

Re: GSoC 2015: Raspberry Pi 2 Support

:) There is very little code that had to be added. I need to clean the code and add conditional call for Pi 2. Then I would be ready to submit a patch. On 22 Jun 2015 00:52, "Gedare Bloom" wrote: > On Sun, Jun 21, 2015 at 3:04 PM, Rohini Kulkarni > wrote: > > I missed mentioning the number of d

Re: GSoC 2015: Raspberry Pi 2 Support

On Sun, Jun 21, 2015 at 3:04 PM, Rohini Kulkarni wrote: > I missed mentioning the number of dhrystones in the previous mail. > > Originally it was 1 million. > The new number of dhrystones I executed is 100 million. > The next thing to do is to figure out what changes are contributing to the perfo

Re: GSoC 2015: Raspberry Pi 2 Support

On Sun, Jun 21, 2015 at 11:02 AM, Rohini Kulkarni wrote: > Hello, > > Are these the relevant functions from > ~/rtems/cpukit/score/cpu/arm/rtems/score/cpu.h? > _CPU_SMP_Get_current_processor() > _CPU_SMP_Send_interrupt() > _CPU_SMP_Processor_event_broadcast() > _CPU_SMP_Processor_event_receive() >

Re: GSoC 2015: Raspberry Pi 2 Support

I missed mentioning the number of dhrystones in the previous mail. Originally it was 1 million. The new number of dhrystones I executed is 100 million. On Mon, Jun 22, 2015 at 12:29 AM, Rohini Kulkarni wrote: > Hi all, > > I have managed to get a significant performance improvement with some >

Re: GSoC 2015: Raspberry Pi 2 Support

Hi all, I have managed to get a significant performance improvement with some changes in configurations. The measured time was for dhrystones reduced from 12 to "too small to be measured " For dhrystones the time was 0.4. The number of dhrystones per second increased from approximately 8 to

Re: GSoC 2015: Raspberry Pi 2 Support

Hello, Are these the relevant functions from ~/rtems/cpukit/score/cpu/arm/rtems/score/cpu.h? _CPU_SMP_Get_current_processor() _CPU_SMP_Send_interrupt() _CPU_SMP_Processor_event_broadcast() _CPU_SMP_Processor_event_receive() I am unable to understand how ~/rtems/cpukit/score/cpu/no_cpu/rtems/score

Re: GSoC 2015: Raspberry Pi 2 Support

Hello Rohini, the CPU functions relevant for SMP are documented in the no_cpu/cpu.h file. - Am 20. Jun 2015 um 22:02 schrieb Rohini Kulkarni : > Hi, > I have added an SMP related post to my blog to define where exactly in the > code > I need to work. Some feedback to indicate if I am id

Re: GSoC 2015: Raspberry Pi 2 Support

Hi, I have added an SMP related post to my blog to define where exactly in the code I need to work. Some feedback to indicate if I am identifying the work area correctly would be very helpful! Thanks! On 18 Jun 2015 03:37, "Rohini Kulkarni" wrote: > Hi all, > > I have updated my blog to reflec

Re: GSoC 2015: Raspberry Pi 2 Support

Hi all, I have updated my blog to reflect my understanding and attempts for cache performance issue. Lately I have been trying around memory attributes for the mm_config_table. One set of configurations for cacheable memory (inner and outer levels)ended up reducing performance further ( which I r

Re: GSoC 2015: Raspberry Pi 2 Support

Hi, Some of the code examples may give you some clues. Like this one: https://github.com/mrvn/test/blob/master/smp.cc Or this: https://github.com/PeterLemon/RaspberryPi/tree/master/SMP/SMPINIT If you still can't figure it out, you can always join the raspberrypi.org forums and ask on this thread:

Re: GSoC 2015: Raspberry Pi 2 Support

Hi, This is regarding Pi 2 SMP support. After powering on, the secondary mailboxes read one of their four mailbox registers and wait for a non-zero content to be written. This content is to be the physical address of the location from where the cores are expected to start execution. I am stuck at

Re: GSoC 2015: Raspberry Pi 2 Support

On Wed, Jun 3, 2015 at 2:39 AM, Rohini Kulkarni wrote: > But, I can't say cache configurations have a role here. > > I'll push my code to my github project soon. > > P.S. The Pi2 board I possess seems to have broken down. It just isn't > turning on. Unable to test further. Will order one immediate

Re: GSoC 2015: Raspberry Pi 2 Support

On Tue, Jun 2, 2015 at 9:42 PM, Alan Cudmore wrote: > The caches are being enabled on the RPI 1 BSP. The same code is being > executed by the RPI 2 BSP, but obviously it’s not sufficient for the cache > setup. > I have been reading through this long thread, and it is very informative: > https://ww

Re: GSoC 2015: Raspberry Pi 2 Support

But, I can't say cache configurations have a role here. I'll push my code to my github project soon. P.S. The Pi2 board I possess seems to have broken down. It just isn't turning on. Unable to test further. Will order one immediately. On 3 Jun 2015 09:03, "Rohini Kulkarni" wrote: > Hi, > > Alan

Re: GSoC 2015: Raspberry Pi 2 Support

Hi, Alan, your suggestion has resulted in much improvement arm_control=0x1000 This has simply worked! Looks like the other cores were taking up plenty of time. I was aware from references that the other cores run a WFI, but ya, did not get its impact. Time for each dhrystone has reduced to 7 fro

Re: GSoC 2015: Raspberry Pi 2 Support

The caches are being enabled on the RPI 1 BSP. The same code is being executed by the RPI 2 BSP, but obviously it’s not sufficient for the cache setup. I have been reading through this long thread, and it is very informative: https://www.raspberrypi.org/forums/viewtopic.php?f=72&t=98904

Re: GSoC 2015: Raspberry Pi 2 Support

On Tue, Jun 2, 2015 at 12:41 PM, Rohini Kulkarni wrote: > From what I saw, they have to be enabled separately. Cache/mmu are disabled > upon reset. > For the existing Raspberry BSP [1] there's a code for MMU/Cache init, however I don't know about Pi2 and where its code is. [1] https://github.com/

Re: GSoC 2015: Raspberry Pi 2 Support

>From what I saw, they have to be enabled separately. Cache/mmu are disabled upon reset. On 2 Jun 2015 16:59, "Hesham ALMatary" wrote: > Hi, > > Aren't the MMU/Caches enabled by default for RPi [1]? > > [1] > https://github.com/RTEMS/rtems/blob/master/c/src/lib/libbsp/arm/shared/mminit.c > > On T

Re: GSoC 2015: Raspberry Pi 2 Support

On June 2, 2015 7:29:52 AM EDT, Hesham ALMatary wrote: >Hi, > >Aren't the MMU/Caches enabled by default for RPi [1]? Yes but I recall that the setup is different on the Pi2 and Alan disabled the code to to work at all. >[1] >https://github.com/RTEMS/rtems/blob/master/c/src/lib/libbsp/arm/sha

Re: GSoC 2015: Raspberry Pi 2 Support

Hi, Aren't the MMU/Caches enabled by default for RPi [1]? [1] https://github.com/RTEMS/rtems/blob/master/c/src/lib/libbsp/arm/shared/mminit.c On Tue, Jun 2, 2015 at 12:18 PM, Joel Sherrill wrote: > > > On June 2, 2015 7:01:21 AM EDT, Rohini Kulkarni wrote: >>Dr. Joel, >> >>So we can't say som

Re: GSoC 2015: Raspberry Pi 2 Support

On June 2, 2015 7:01:21 AM EDT, Rohini Kulkarni wrote: >Dr. Joel, > >So we can't say something solely on the basis of this result? I don't think so. If Linux performs the same, then what you did is as good as it gets. However, if Linux is faster then some setting still isn't right. You need

Re: GSoC 2015: Raspberry Pi 2 Support

Dr. Joel, So we can't say something solely on the basis of this result? On 2 Jun 2015 16:28, "Rohini Kulkarni" wrote: > I have not run it under linux on pi2 yet. Will have to run and check the > result. > On 2 Jun 2015 16:16, "Joel Sherrill" wrote: > >> >> >> On June 2, 2015 5:58:33 AM EDT, Roh

Re: GSoC 2015: Raspberry Pi 2 Support

I have not run it under linux on pi2 yet. Will have to run and check the result. On 2 Jun 2015 16:16, "Joel Sherrill" wrote: > > > On June 2, 2015 5:58:33 AM EDT, Rohini Kulkarni > wrote: > >HI, > > > >I tried running the dhrystone benchmark with some changes for cache/mmu > >set up. > > > >Howe

Re: GSoC 2015: Raspberry Pi 2 Support

On June 2, 2015 5:58:33 AM EDT, Rohini Kulkarni wrote: >HI, > >I tried running the dhrystone benchmark with some changes for cache/mmu >set up. > >However, the output shows a reduction in performance. >The time to run through the dhrystone has increased from 12 to 13 and >dhrystones run per se

Re: GSoC 2015: Raspberry Pi 2 Support

HI, I tried running the dhrystone benchmark with some changes for cache/mmu set up. However, the output shows a reduction in performance. The time to run through the dhrystone has increased from 12 to 13 and dhrystones run per second decreased. According to this result, things were better with ca

RPI2 Cache configuration Was: Re: GSoC 2015: Raspberry Pi 2 Support

On Thu, May 28, 2015 at 10:11 AM, Rohini Kulkarni wrote: > Hi All, > > I have to implement the cache coherency support for Cortex A7. But for A7 > MPCore, unlike for A9, I am not able to find any register description for > the Snoop Control Unit from the TRM. > I need help here on how to proceed.

Re: GSoC 2015: Raspberry Pi 2 Support

Hi All, I have to implement the cache coherency support for Cortex A7. But for A7 MPCore, unlike for A9, I am not able to find any register description for the Snoop Control Unit from the TRM. I need help here on how to proceed. Additionally for A9 there is a single bit for A9 in the Auxiliary Co

Re: GSoC 2015: Raspberry Pi 2 Support

On 5/5/2015 11:11 AM, Rohini Kulkarni wrote: > > Hi, > > I am working with the code for bsp hooks. I am referring to existing > ARM multicore bsp codes, zync mainly. > > 1. There are existing hooks for the raspberry pi. Where should the > code for the Pi2 hooks be added? > The Pi and Pi2 are re

GSoC 2015: Raspberry Pi 2 Support

Hi, I am working with the code for bsp hooks. I am referring to existing ARM multicore bsp codes, zync mainly. 1. There are existing hooks for the raspberry pi. Where should the code for the Pi2 hooks be added? 2. Am I right in understanding that I will have to implement A7 specific functions a

Re: GSoC 2015: Raspberry Pi 2 Support

On Fri, May 1, 2015 at 3:15 AM, Rohini Kulkarni wrote: > > Hi, > > Excited to be a part of this edition of GSoC! Thanks to everybody for > helping me get here and congratulations to all the participating students! > > So, now getting to work, firstly I wish to know, specifically from my > mentors

GSoC 2015: Raspberry Pi 2 Support

Hi, Excited to be a part of this edition of GSoC! Thanks to everybody for helping me get here and congratulations to all the participating students! So, now getting to work, firstly I wish to know, specifically from my mentors, any changes that must be made to my proposed project or schedule. S