Re: About cache enabling in LWIP port of BBB in RTEMS

2015-09-22 Thread ragu nath
Hi Marcos, I am able to boot now. I am booting from usb. I will build lwip with latest RTEMS BSP with cache enabled. I will also enable cache in lwip options. I will test it with latest uboot & let you know. If there is any trouble, I will share the image with you Thanks, Ragunath On Tue, Sep

Re: About cache enabling in LWIP port of BBB in RTEMS

2015-09-22 Thread Marcos Díaz
I will test it now and let you know. I forgot to tell you that i always test it booting from the sdcard. I use the script sdcard.sh from Ben Gras. Let me know if you need some help. On Mon, Sep 21, 2015 at 5:44 PM, ragu nath wrote: > Hi Marcos, > > I upgraded the image. I cannot boot the RTEMS i

Re: About cache enabling in LWIP port of BBB in RTEMS

2015-09-21 Thread ragu nath
Hi Marcos, I upgraded the image. I cannot boot the RTEMS image using tftp. Seems there was a bug in u-boot & fixed later. It propagated to BBB image. I am having troube booting with SD card. I am working on this. In the mean time, I sent you a cache enabled RTEMS BBB image. This is based on rte

Re: About cache enabling in LWIP port of BBB in RTEMS

2015-09-18 Thread Marcos Díaz
By the way we flashed the eMMC with the u-boot image. Follow the guide to know how to do so. On Fri, Sep 18, 2015 at 12:42 PM, Marcos Díaz < marcos.d...@tallertechnologies.com> wrote: > Well, after talking with the guys of beagleboard, they made me update the > u-boot version. > > With that I cou

Re: About cache enabling in LWIP port of BBB in RTEMS

2015-09-18 Thread Marcos Díaz
Well, after talking with the guys of beagleboard, they made me update the u-boot version. With that I could make the cache and ethernet work Ok in Rev A5C !!!. So, Ragu, if you can update your BBB's u-boot, try again using RTEMS with LWIP and cache enabled, and test it. Download it from here: ht

Re: About cache enabling in LWIP port of BBB in RTEMS

2015-09-17 Thread Marcos Díaz
I can only tell you about the boards i tested: I have a revision A5C board with an XAM3359AZCZ100 microcontroller. The use of cache together with ethernet makes this break. I have a revision C board with an AM3358BZCZ100. This does work with cache and ethernet. Apparently Ragu has a rev A5 with

Re: About cache enabling in LWIP port of BBB in RTEMS

2015-09-17 Thread Joel Sherrill
Can of of you guys start a table/spreadsheet about board and SoC revisions and when we think it is broken and when it works? I emailed the BB project lead and he didn't know anything off hand but suggested subscribing to beaglebo...@googlegroups.com and asking there. Someone there may actually ha

Re: About cache enabling in LWIP port of BBB in RTEMS

2015-09-17 Thread ragu nath
Hi Marcos, The following are the details from by board ###from uboot board=am335x board_name=A335BNLT board_rev=00A5 ### reg dump 0x44E10600 2b94402e 0x44E10604 20fd0383 ###linux dump hexdump -e '8/1 "%c"' "/sys/bus/i2c/devices/0-0050/eeprom" -s 0A5 Thanks, Ragunath On Fri, Sep 18, 2015 at

Re: About cache enabling in LWIP port of BBB in RTEMS

2015-09-17 Thread Marcos Díaz
Ragu, I would like you to confirm which revision you have, for this I printed the following registers in the BBB: 0x44E10600 and 0x44E10604 The first will print something like: 1b94402e for BBB rev A5C (XAM3359AZCZ100) ( 1b means rev.A of the microcontroller) 2b94402e for BBB rev C (AM3358BZCZ10

Re: About cache enabling in LWIP port of BBB in RTEMS

2015-09-17 Thread Marcos Díaz
Yes, sorry about that, There are two registers we can check to see the different revision numbers. I will check it myself once i confirm that the different revisions are the problem (i'm not sure because of what Ragu said). Thanks! On Thu, Sep 17, 2015 at 11:12 AM, Joel Sherrill wrote: > > > On

Re: About cache enabling in LWIP port of BBB in RTEMS

2015-09-17 Thread Joel Sherrill
On 9/17/2015 8:43 AM, Marcos Díaz wrote: Yes, in my case the older (that doesn't work) revision is a XAM3359AZCZ100 And the rev C (that works well with cache) is AM3358BZCZ100 Can we determine that in software? On Thu, Sep 17, 2015 at 10:32 AM, Joel Sherrill mailto:joel.sherr...@oarcorp.co

Re: About cache enabling in LWIP port of BBB in RTEMS

2015-09-17 Thread Marcos Díaz
Yes, in my case the older (that doesn't work) revision is a XAM3359AZCZ100 And the rev C (that works well with cache) is AM3358BZCZ100 On Thu, Sep 17, 2015 at 10:32 AM, Joel Sherrill wrote: > > > On September 17, 2015 8:26:41 AM CDT, "Marcos Díaz" < > marcos.d...@tallertechnologies.com> wrote:

Re: About cache enabling in LWIP port of BBB in RTEMS

2015-09-17 Thread Joel Sherrill
On September 17, 2015 8:26:41 AM CDT, "Marcos Díaz" wrote: >Hi, > >How did you see the revision number? if you are using u-boot you can >pause the start and write printenv and enter to see that: > > >board=am335x >board_name=A335BNLT >board_rev=00C0 > > >This is in my version. > >Please tell m

Re: About cache enabling in LWIP port of BBB in RTEMS

2015-09-17 Thread Marcos Díaz
Hi, How did you see the revision number? if you are using u-boot you can pause the start and write printenv and enter to see that: board=am335x board_name=A335BNLT board_rev=00C0 This is in my version. Please tell me so I can check if is the revision, or perhaps is something else in u-boot initia

Re: About cache enabling in LWIP port of BBB in RTEMS

2015-09-16 Thread Joel Sherrill
On 9/16/2015 2:41 PM, ragu nath wrote: Hi Marcos, Great news! I did not find any solution to the issue. I have a REV C board from element14. Is this the same board you are using? In my board I saw the issue. Does this have anything to do with the patch you submitted [PATCH] Beaglebone: f

Re: About cache enabling in LWIP port of BBB in RTEMS

2015-09-16 Thread ragu nath
Hi Marcos, Great news! I did not find any solution to the issue. I have a REV C board from element14. Is this the same board you are using? In my board I saw the issue. Does this have anything to do with the patch you submitted [PATCH] Beaglebone: fix missing clobber in inline assembly. https:/

About cache enabling in LWIP port of BBB in RTEMS

2015-09-14 Thread Marcos Díaz
Hi Ragu, I wanted to know if you were able to see something else about the problem we had in the BBB when using LWIP and enabling cache ( the program freezes). I can tell you that here we were using BBB rev. A5C and had this problem, but now we could test this with a BBB Rev C, and it successfully