Great! I'll get those integrated and post a v3.
Thanks,
Kinsey
On Tue, Oct 24, 2023 at 9:10 AM Philip Kirkpatrick <
p.kirkpatr...@reflexaerospace.com> wrote:
> Kinsey,
>
> I looked this over and built and tested it on actual hardware. I made the
> minor changes below, but afterwards it worked a
Kinsey,
I looked this over and built and tested it on actual hardware. I made the
minor changes below, but afterwards it worked as expected. The change to
`bspmercuryxu5.yml` was required to allow my application to find
`peripheral_maps/xilinx_zynqmp.h`. The other changes were not required,
but
Philip,
When you get a chance, could you verify that this refactoring meets your
expectations as far as functionality? I'm especially interested in whether
the timer interrupts behave as you expect them to on hardware. I don't mind
getting the Xilinx support code updates committed, but I'd like som
Changes from v1 (originally submitted by Philip Kirkpatrick):
Refactoring:
* import Xilinx code before modification
* better use the existing Xilinx support code
Other:
* An additional patch to add cache support (also from Philip) has been
integrated and refactored
This has been tested on Xilinx
