[PATCH 1/3] Docs: RISC-V Update rv64* BSPs to medany and 0x80000000 start address

From: Hesham Almatary Closes #4775 --- user/bsps/bsps-riscv.rst | 27 --- 1 file changed, 12 insertions(+), 15 deletions(-) diff --git a/user/bsps/bsps-riscv.rst b/user/bsps/bsps-riscv.rst index 2ef8327..5269462 100644 --- a/user/bsps/bsps-riscv.rst +++ b/user/bsps/bsps-

[PATCH 3/3] RISC-V: Update docs on running on QEMU and Spike

From: Hesham Almatary --- user/bsps/bsps-riscv.rst | 26 +++--- 1 file changed, 23 insertions(+), 3 deletions(-) diff --git a/user/bsps/bsps-riscv.rst b/user/bsps/bsps-riscv.rst index 28682f6..6604d1f 100644 --- a/user/bsps/bsps-riscv.rst +++ b/user/bsps/bsps-riscv.rst @@ -1

[PATCH 2/3] RISC-V: Remove the RISCV_ENABLE_HTIF_SUPPORT option

From: Hesham Almatary Closes #4779 --- user/bsps/bsps-riscv.rst | 6 +- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/user/bsps/bsps-riscv.rst b/user/bsps/bsps-riscv.rst index 5269462..28682f6 100644 --- a/user/bsps/bsps-riscv.rst +++ b/user/bsps/bsps-riscv.rst @@ -83,10 +83,6

[PATCH 2/2] RISC-V: Test rv32i and rv32imafdc on QEMU

From: Hesham Almatary Updates #4775 --- tester/rtems/testing/bsps/rv32i.ini | 37 tester/rtems/testing/bsps/rv32imafdc.ini | 37 2 files changed, 74 insertions(+) create mode 100644 tester/rtems/testing/bsps/rv32i.ini create mode 100644 te

[PATCH 1/2] RISC-V Default rv64* BSPs to medany and 0x80000000 start address

From: Hesham Almatary To run on both QEMU and Spike Updates #4775 --- .../testing/bsps/rv64imac_medany_spike.ini| 38 --- tester/rtems/testing/bsps/rv64imac_spike.ini | 2 +- .../{rv64imafd_medany.ini => rv64imafd.ini} | 4 +- .../testing/bsps/rv64imafd_medany_spike.ini

[PATCH v2 3/3] RISC-V: Always probe for HTIF and remove RISCV_ENABLE_HTIF_SUPPORT

From: Hesham Almatary Updates #4779 --- bsps/riscv/noel/include/bsp/riscv.h | 2 -- bsps/riscv/riscv/console/console-config.c | 10 ++ bsps/riscv/riscv/console/htif.c | 4 bsps/riscv/riscv/include/bsp/riscv.h | 2 -- bsps/riscv/riscv/irq/irq.c

[PATCH v2 1/3] spec/build/riscv: Default rv64* BSPs to medany cmodel

From: Hesham Almatary Currently generic RISC-V BSPs (riscv/riscv) that start with rv64 and not rv64*_medany will start at 0x7000. This adds high maintenance overhead and deviates from almost all other RISC-V-based OSes and baremetal programs that start at 0x8000. Further, testing now has

[PATCH v2 2/3] spec/build/riscv: Start all riscv/riscv BSPs at 0x80000000

From: Hesham Almatary To follow other RISC-V-based OSes conventions. Delete generic BSPs that start at 0x7000 as BSPs are now medany by default. Updates #4775 --- spec/build/bsps/riscv/optrambegin.yml | 6 -- 1 file changed, 6 deletions(-) diff --git a/spec/build/bsps/riscv/optrambegin

[PATCH 3/3] RISC-V: Always probe for HTIF and remove RISCV_ENABLE_HTIF_SUPPORT

From: Hesham Almatary Updates #4779 --- bsps/riscv/noel/include/bsp/riscv.h | 2 -- bsps/riscv/riscv/console/console-config.c | 10 ++ bsps/riscv/riscv/console/htif.c | 4 bsps/riscv/riscv/include/bsp/riscv.h | 2 -- bsps/riscv/riscv/irq/irq.c

[PATCH 1/3] spec/build/riscv: Default rv64* BSPs to medany cmodel

From: Hesham Almatary Currently generic RISC-V BSPs (riscv/riscv) that start with rv64 and not rv64*_medany will start at 0x7000. This adds high maintenance overhead and deviates from almost all other RISC-V-based OSes and baremetal programs that start at 0x8000. Further, testing now has

[PATCH 2/3] spec/build/riscv: Start all riscv/riscv BSPs at 0x80000000

From: Hesham Almatary To follow other RISC-V-based OSes conventions. Delete generic BSPs that start at 0x7000 as BSPs are now medany by default. Updates #4775 --- spec/build/bsps/riscv/optrambegin.yml | 6 -- 1 file changed, 6 deletions(-) diff --git a/spec/build/bsps/riscv/optrambegin

[PATCH] RISC-V: Always probe for HTIF and remove RISCV_ENABLE_HTIF_SUPPORT

From: Hesham Almatary Updates #4779 --- bsps/riscv/noel/include/bsp/riscv.h | 2 -- bsps/riscv/riscv/console/console-config.c | 10 ++ bsps/riscv/riscv/console/htif.c | 4 bsps/riscv/riscv/include/bsp/riscv.h | 2 -- bsps/riscv/riscv/irq/irq.c

[PATCH] Docs: RISC-V Update BSPs to medany and 0x80000000 start address

From: Hesham Almatary Closes #4775 --- user/bsps/bsps-riscv.rst | 24 +--- 1 file changed, 9 insertions(+), 15 deletions(-) diff --git a/user/bsps/bsps-riscv.rst b/user/bsps/bsps-riscv.rst index 2ef8327..c9813e5 100644 --- a/user/bsps/bsps-riscv.rst +++ b/user/bsps/bsps-risc

[PATCH 1/2] RISC-V Default BSPs to medany and 0x80000000 start address

From: Hesham Almatary To run on both QEMU and Spike Updates #4775 --- .../testing/bsps/rv64imac_medany_spike.ini| 38 --- tester/rtems/testing/bsps/rv64imac_spike.ini | 2 +- .../{rv64imafd_medany.ini => rv64imafd.ini} | 4 +- .../testing/bsps/rv64imafd_medany_spike.ini

[PATCH 2/2] RISC-V: Test rv32i and rv32imafdc on QEMU

From: Hesham Almatary Updates #4775 --- tester/rtems/testing/bsps/rv32i.ini | 37 tester/rtems/testing/bsps/rv32imafdc.ini | 37 2 files changed, 74 insertions(+) create mode 100644 tester/rtems/testing/bsps/rv32i.ini create mode 100644 te

[PATCH 2/2] spec/build/riscv: Start all riscv/riscv BSPs at 0x80000000

From: Hesham Almatary To follow other RISC-V-based OSes conventions. Delete generic BSPs that start at 0x7000 as BSPs are now medany by default. Updates #4775 --- spec/build/bsps/riscv/optrambegin.yml | 6 -- 1 file changed, 6 deletions(-) diff --git a/spec/build/bsps/riscv/optrambegin

[PATCH 1/2] spec/build/riscv: Default all BSPs to medany cmodel

From: Hesham Almatary Currently generic RISC-V BSPs (riscv/riscv) that start with rv* and not rv*_medany will start at 0x7000. This adds high maintenance overhead and deviates from almost all other RISC-V-based OSes and baremetal programs that start at 0x8000. Further, testing now has to

[PATCH] RISC-V: GCC: Apply a patch to build rv32 medany multilibs

From: Hesham Almatary Updates #4775 --- rtems/config/tools/rtems-gcc-12-newlib-head.cfg | 4 1 file changed, 4 insertions(+) diff --git a/rtems/config/tools/rtems-gcc-12-newlib-head.cfg b/rtems/config/tools/rtems-gcc-12-newlib-head.cfg index 3b9354b..3e40a7f 100644 --- a/rtems/config/tool

[PATCH 2/2] bsp/riscv: Add a section about running on QEMU

From: Hesham Almatary --- user/bsps/bsps-riscv.rst | 15 +++ 1 file changed, 15 insertions(+) diff --git a/user/bsps/bsps-riscv.rst b/user/bsps/bsps-riscv.rst index 224506d..db7fd95 100644 --- a/user/bsps/bsps-riscv.rst +++ b/user/bsps/bsps-riscv.rst @@ -141,6 +141,21 @@ They are in

[PATCH 1/2] bsps/riscv: Remove inaccurate statement about reliance on a boot loader

From: Hesham Almatary The BSP is capable of initialising the hardware being the first software that takes control on hardware reset (after the bootrom). For instance, using on QEMU's virt platforms, RTEMS runs as a bios without BBL. Similarily, RTEMS can also be run on harware/FPGA and loaded us

[PATCH] riscv: Mark htif_console_handler in htif.h as extern

From: Hesham Almatary It is defined in htif.c --- bsps/riscv/riscv/include/dev/serial/htif.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bsps/riscv/riscv/include/dev/serial/htif.h b/bsps/riscv/riscv/include/dev/serial/htif.h index b0d83652b..4b16d8746 100644 --- a/bsps/r

[PATCH] riscv: Add an fdt_get_size utility function

From: Hesham Almatary --- bsps/riscv/riscv/start/bspstart.c | 42 +++ 1 file changed, 42 insertions(+) diff --git a/bsps/riscv/riscv/start/bspstart.c b/bsps/riscv/riscv/start/bspstart.c index 888795fca..f6f99c506 100644 --- a/bsps/riscv/riscv/start/bspstart.c +++ b/

[PATCH] networking: Increase _SYS_MBUF_LEGACY_MSIZE to 256 to match FreeBSD

From: Hesham Almatary This commit fixes some run-time errors on 64-bit architectures (e.g., riscv64) in which the tcp header size would overflow 128 bytes. --- cpukit/libnetworking/sys/mbuf.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cpukit/libnetworking/sys/mbuf.h b/c