[PATCH 1/1] Fixed a typo in the /user/bsps/arm/stm32h7.rst file.

--- user/bsps/arm/stm32h7.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/user/bsps/arm/stm32h7.rst b/user/bsps/arm/stm32h7.rst index 9f1f082..6257e0d 100644 --- a/user/bsps/arm/stm32h7.rst +++ b/user/bsps/arm/stm32h7.rst @@ -248,7 +248,7 @@ installed. Please go to its *bin

[PATCH 0/1] Fix a typo in the stm32h7 BSP Documentation

Hi, I found a small typo while going through the BSP documentation for stm32h7 and fixed it in this commit. Thank You Ruturaj Nanoti (1): Fixed a typo in the /user/bsps/arm/stm32h7.rst file. user/bsps/arm/stm32h7.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.34.1

Re: [PATCH 2/2] bsps/riscv: add riscv/kendrytek210 BSP variant

>> >> > diff --git a/bsps/riscv/riscv/start/bspstart.c >> >> > b/bsps/riscv/riscv/start/bspstart.c >> >> > index 30d479ce88..a0b6e683f6 100644 >> >> > --- a/bsps/riscv/riscv/start/bspstart.c >> >> > +++ b/bsps/riscv/riscv/start/bspstart.c >> >> > @@ -201,6 +201,14 @@ static uint32_t get_core_frequ

[PATCH rtems-source-builder] rtems-tools-6.cfg: Update to get RISC-V bsp-builder corrections

--- rtems/config/tools/rtems-tools-6.cfg | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/rtems/config/tools/rtems-tools-6.cfg b/rtems/config/tools/rtems-tools-6.cfg index 8cd4bb1..042e0fa 100644 --- a/rtems/config/tools/rtems-tools-6.cfg +++ b/rtems/config/tools/rtems-tool

Re: [PATCH rtems-tools] rtems-bsps-riscv.ini: Update list to drop medany and add BSPs

On Tue, 14 Mar 2023 at 15:03, Joel Sherrill wrote: > > > > On Tue, Mar 14, 2023 at 9:23 AM Hesham Almatary > wrote: >> >> On Tue, 14 Mar 2023 at 14:14, Joel Sherrill wrote: >> > >> > --- >> > config/rtems-bsps-riscv.ini | 16 +++- >> > 1 file changed, 11 insertions(+), 5 deletions(

Re: [PATCH rtems-tools] rtems-bsps-riscv.ini: Update list to drop medany and add BSPs

On Tue, Mar 14, 2023 at 9:23 AM Hesham Almatary wrote: > On Tue, 14 Mar 2023 at 14:14, Joel Sherrill wrote: > > > > --- > > config/rtems-bsps-riscv.ini | 16 +++- > > 1 file changed, 11 insertions(+), 5 deletions(-) > > > > diff --git a/config/rtems-bsps-riscv.ini b/config/rtems-bsp

Help for GSoC proposal

Hey there, I am thinking of taking #4628 for adding SATA support in libbsd for RTEMS as my GSoC 2023 Project. I have already done the Hello World patch and sent the screenshot to gedare and DrRTEMS. This is my first time in GSoC so it would be a great help if someone could guide me. Thanks & Regar

Re: RISC-V link warning :base_sp.exe has a LOAD segment with RWX permissions

Probably a new binutils made by: commit c58857dfdd8830871236261a3ef8399eff3b9b68 Author: Joel Sherrill Date: Tue Feb 21 09:24:37 2023 -0600 Update to binutils 2.40 for rtems 6 Karel On 3/14/23 15:45, Alan Cudmore wrote: Hi, I noticed that my RISC-V builds with the RTEMS master and R

RISC-V link warning :base_sp.exe has a LOAD segment with RWX permissions

Hi, I noticed that my RISC-V builds with the RTEMS master and RSB master now have this warning on each link: [3405/4331] Linking build/riscv/rv64imafdc/testsuites/samples/minimum.exe /home/alan/rtems/tools/6/lib/gcc/riscv-rtems6/12.2.1/../../../../riscv-rtems6/bin/ld: warning: /home/alan/rtems/rtem

Re: [PATCH rtems-tools] rtems-bsps-riscv.ini: Update list to drop medany and add BSPs

On Tue, 14 Mar 2023 at 14:14, Joel Sherrill wrote: > > --- > config/rtems-bsps-riscv.ini | 16 +++- > 1 file changed, 11 insertions(+), 5 deletions(-) > > diff --git a/config/rtems-bsps-riscv.ini b/config/rtems-bsps-riscv.ini > index 804245e..816675f 100644 > --- a/config/rtems-bsps-r

[PATCH rtems-tools] rtems-bsps-riscv.ini: Update list to drop medany and add BSPs

--- config/rtems-bsps-riscv.ini | 16 +++- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/config/rtems-bsps-riscv.ini b/config/rtems-bsps-riscv.ini index 804245e..816675f 100644 --- a/config/rtems-bsps-riscv.ini +++ b/config/rtems-bsps-riscv.ini @@ -1,6 +1,7 @@ # # RT

Re: [PATCH] bsps/riscv: Clear interrupt complete before disable

On 14.03.23 14:37, padmarao.beg...@microchip.com wrote: On Tue, 2023-03-14 at 13:37 +0100, Sebastian Huber wrote: On 14.03.23 13:31,padmarao.beg...@microchip.com wrote: Hi Sebastian, On Mon, 2023-03-06 at 14:11 +0100, Sebastian Huber wrote: On 06.03.23 13:00,padmarao.beg...@microchip.com

Re: [PATCH] bsps/riscv: Clear interrupt complete before disable

> On Tue, 2023-03-14 at 13:37 +0100, Sebastian Huber wrote: > > On 14.03.23 13:31, padmarao.beg...@microchip.com wrote: > > Hi Sebastian, > > > > > On Mon, 2023-03-06 at 14:11 +0100, Sebastian Huber wrote: > > > > > > > > > On 06.03.23 13:00,padmarao.beg...@microchip.com wrote: > > > > > On Mo

Re: [PATCH] bsps/riscv: Clear interrupt complete before disable

On 14.03.23 13:31, padmarao.beg...@microchip.com wrote: Hi Sebastian, On Mon, 2023-03-06 at 14:11 +0100, Sebastian Huber wrote: On 06.03.23 13:00,padmarao.beg...@microchip.com wrote: On Mon, 2023-03-06 at 11:19 +0100, Sebastian Huber wrote: On 06.03.23 10:24,padmarao.beg...@microchip.com

Re: [PATCH] bsps/riscv: Clear interrupt complete before disable

Hi Sebastian, >On Mon, 2023-03-06 at 14:11 +0100, Sebastian Huber wrote: > > > On 06.03.23 13:00, padmarao.beg...@microchip.com wrote: > > > On Mon, 2023-03-06 at 11:19 +0100, Sebastian Huber wrote: > > > > > > On 06.03.23 10:24,padmarao.beg...@microchip.com wrote: > > > > Hi Sebastian, > > >

Re: [PATCH v2] doxygen: Add groups for related test suites

On 13.03.23 22:57, Chris Johns wrote: Does this catch all RTEMSTestSuites cases? Thanks for the question. No, there were some places left over. I fixed this in the committed version. -- embedded brains GmbH Herr Sebastian HUBER Dornierstr. 4 82178 Puchheim Germany email: sebastian.hu...@embe