On 02.09.22 06:22, Sebastian Huber wrote:
On 02.09.22 04:22, Chris Johns wrote:
On 1/9/2022 6:26 pm, Sebastian Huber wrote:
The VRSAVE feature of the Altivec unit can be used to reduce the
amount of
Altivec registers which need to be saved/restored during interrupt
processing
and context sw
On 02.09.22 04:22, Chris Johns wrote:
On 1/9/2022 6:26 pm, Sebastian Huber wrote:
The VRSAVE feature of the Altivec unit can be used to reduce the amount of
Altivec registers which need to be saved/restored during interrupt processing
and context switches.
Which BSPs and hardware has this been
On 1/9/2022 6:26 pm, Sebastian Huber wrote:
> The VRSAVE feature of the Altivec unit can be used to reduce the amount of
> Altivec registers which need to be saved/restored during interrupt processing
> and context switches.
Which BSPs and hardware has this been tested on?
Thanks
Chris
_
The VRSAVE feature of the Altivec unit can be used to reduce the amount of
Altivec registers which need to be saved/restored during interrupt processing
and context switches.
Update #4712.
---
bsps/powerpc/shared/cpu_asm.S | 156 ++-
.../shared/exceptions/ppc_exc_async
gcc/ChangeLog:
* config/rs6000/rtems.h (CPP_OS_DEFAULT_SPEC): Define __PPC_VRSAVE__ if
-mvrsave is present.
* config/rs6000/t-rtems: Add -mvrsave multilib variants for
-mcpu=e6500.
---
gcc/config/rs6000/rtems.h | 3 ++-
gcc/config/rs6000/t-rtems | 5 +
2 files
