Re: [PATCH] score: Add _CPU_Use_thread_local_storage()

On 29/06/2022 15:07, Sebastian Huber wrote: At some point during system initialization, the idle threads are created. Afterwards, the boot processor basically executes within the context of an idle thread with thread dispatching disabled. On some architectures, the thread-local storage area of t

Re: [PATCH v2] irq/arm-gicv3.h: Customize ICC_IGRPEN0/1 init

On 04/07/2022 03:43, Chris Johns wrote: On 1/7/2022 11:21 pm, Sebastian Huber wrote: Use the existing WRITE_SR() abstraction to access the interrupt group 0 and 1 enable registers. This fixes the build for the AArch32 target. --- bsps/include/dev/irq/arm-gicv3.h | 30

Re: [PATCH v2 00/13] Support gcov instrumentation

OK Thanks Chris On 1/7/2022 9:49 pm, Sebastian Huber wrote: > This patch set adds support to build the RTEMS libraries with gcov > instrumentation to get code and branch coverage. There are some improvements > necessary in the build system to support different compiler flags for > libraries > a

Re: [PATCH] samples/cdtest: Test execeptions during system init

OK Thanks Chris On 1/7/2022 8:02 pm, Sebastian Huber wrote: > Update #4668. > Update #4672. > --- > testsuites/samples/cdtest/main.cc | 44 --- > 1 file changed, 35 insertions(+), 9 deletions(-) > > diff --git a/testsuites/samples/cdtest/main.cc > b/testsuites/sampl

Re: Integrating the Formal Methods part of Qualification

On 2/7/2022 12:59 am, Andrew Butterfield wrote: > On 1 Jul 2022, at 00:59, Chris Johns > wrote: >> >> On 28/6/2022 11:09 pm, andrew.butterfi...@scss.tcd.ie >> wrote: >>> Dear RTEMS Developers, >>> >>> While the validation tests from

Re: [PATCH v2] irq/arm-gicv3.h: Customize ICC_IGRPEN0/1 init

On 1/7/2022 11:21 pm, Sebastian Huber wrote: > Use the existing WRITE_SR() abstraction to access the interrupt group 0 and 1 > enable registers. This fixes the build for the AArch32 target. > --- > bsps/include/dev/irq/arm-gicv3.h | 30 --- > spec/build/bsps/aarch64/a