On 24/8/21 9:50 am, Kinsey Moore wrote:
> This patch set contains the result of the Exception Manager work I
> proposed a while back to manage handling of machine exceptions along
> with a general feature for mapping exceptions to POSIX signals without
> delving into the CPU Port-specific details.
On 24/8/21 8:24 am, Stephen Clark wrote:
> Added I2C drivers for ZynqMP and updated build system accordingly.
> ---
> bsps/aarch64/xilinx-zynqmp/include/bsp.h | 4 ++
> bsps/aarch64/xilinx-zynqmp/include/bsp/i2c.h | 63 +++
> bsps/aarch64/xilinx-zynqmp/include/bsp/irq.h |
Hi,
Could you please explain this file?
Where is the source?
Why would we allow a binay blob into the tester like this?
This seems specific to a set up or a BSP and not the tester. I am not
comfortable with this approach. Have alternative approaches have you considered?
Chris
On 24/8/21 4:46
Add a test to verify that mapping of machine exceptions to POSIX signals
operates properly when the application requests it.
---
spec/build/testsuites/psxtests/grp.yml| 2 +
.../build/testsuites/psxtests/psxsignal09.yml | 22 ++
testsuites/psxtests/psxsignal09/init.c| 73 +
This adds a confdef option allowing an application to request mapping
machine exceptions to POSIX signals. This is required for some languages
such as Ada.
---
cpukit/doxygen/appl-config.h | 25 +-
cpukit/include/rtems/confdefs/extensions.h | 7 ++
cpukit/include/rtems/exception
This adds the call and support functions necessary to add Exception
Manager support to AArch64.
---
.../cpu/aarch64/aarch64-exception-default.S | 50 +
.../cpu/aarch64/aarch64-exception-default.c | 55 ++-
.../cpu/aarch64/aarch64-exception-interrupt.S | 18 -
All other architectures use uint32_t for interrupt levels and there is
no reason not to do so on AArch64.
---
cpukit/score/cpu/aarch64/cpu.c | 4 ++--
cpukit/score/cpu/aarch64/include/rtems/score/cpu.h | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/cpu
This adds the framework necessary to allow more generic handling of
machine exceptions. This initial patch offers the ability to get the
class of exception from the CPU_Exception_frame provided. Future
extensions of the Exception Manager could include the ability to get
the address of the exception
This patch set contains the result of the Exception Manager work I
proposed a while back to manage handling of machine exceptions along
with a general feature for mapping exceptions to POSIX signals without
delving into the CPU Port-specific details. This is a pretty basic
initial implementation, b
Added I2C drivers for ZynqMP and updated build system accordingly.
---
bsps/aarch64/xilinx-zynqmp/include/bsp.h | 4 ++
bsps/aarch64/xilinx-zynqmp/include/bsp/i2c.h | 63 +++
bsps/aarch64/xilinx-zynqmp/include/bsp/irq.h | 2 +
bsps/aarch64/xilinx-zynqmp/start/bspstart.c
Certain files related to the Zynq BSP's I2C driver are useable by the ZynqMP
BSP as well.
Moved these files to shared directory in anticipation of I2C support for ZynqMP.
---
.../include/bsp => include/dev/i2c}/cadence-i2c-regs.h | 0
.../include/bsp => include/dev/i2c}/cadence-i2c.h
---
tester/rtems/testing/bsps/kcu105.dtb | Bin 0 -> 15256 bytes
tester/rtems/testing/bsps/kcu105_qemu.ini | 38 ++
2 files changed, 38 insertions(+)
create mode 100644 tester/rtems/testing/bsps/kcu105.dtb
create mode 100644 tester/rtems/testing/bsps/kcu105_qemu.ini
di
ok
On Mon, Aug 23, 2021 at 9:49 AM Ryan Long wrote:
>
> Removed some ampersands that were left in on accident.
> ---
> tester/covoar/GcovData.cc | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/tester/covoar/GcovData.cc b/tester/covoar/GcovData.cc
> index 44928a9..5
Removed some ampersands that were left in on accident.
---
tester/covoar/GcovData.cc | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/tester/covoar/GcovData.cc b/tester/covoar/GcovData.cc
index 44928a9..59412a6 100644
--- a/tester/covoar/GcovData.cc
+++ b/tester/covoar/Gco
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