Thanks everyone for your help these are some very helpful replies to start.
--sanskar
On Sat, Feb 13, 2021 at 9:30 PM Joel Sherrill wrote:
>
>
> On Sat, Feb 13, 2021, 4:16 AM Hesham Almatary <
> hesham.almat...@cl.cam.ac.uk> wrote:
>
>> On Sat, 13 Feb 2021 at 10:59, Eshan Dhawan
>> wrote:
>> >
The header locations in spec/build/bsps/arm/xilinx-zynq/obj.yml don't look
correct due to the relocation and should probably be removed entirely since
they're now broken out into spec/build/bsps/objdevspizynq.yml, instead.
Kinsey
-Original Message-
From: devel On Behalf Of Jan Sommer
S
This was buried in another thread and I thought it was best separate.
There are now two options. LLVM Rust and GCC Rust.
LLVM Rust is the more mature and commonly used of the two. LLVM is supposed
to work on at least SPARC and RISC-V. There are cross build instructions
for Linux to another CPU Li
On Sat, Feb 13, 2021, 4:16 AM Hesham Almatary
wrote:
> On Sat, 13 Feb 2021 at 10:59, Eshan Dhawan
> wrote:
> >
> >
> > On 13-Feb-2021, at 1:53 PM, Sanskar Khandelwal
> wrote:
> >
> >
> >
> >
> > On Sat, Feb 13, 2021 at 9:30 AM Joel Sherrill wrote:
> >>
> >>
> >>
> >> On Fri, Feb 12, 2021, 8:
---
bsps/headers.am| 5 +
c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am | 3 +++
c/src/lib/libbsp/arm/xilinx-zynqmp/Makefile.am | 3 +++
3 files changed, 11 insertions(+)
diff --git a/bsps/headers.am b/bsps/headers.am
index 1b82382db8..37ce6d6c73 100644
--- a/
---
spec/build/bsps/aarch64/xilinx-zynqmp/grp.yml | 2 ++
spec/build/bsps/arm/xilinx-zynq/grp.yml| 2 ++
spec/build/bsps/arm/xilinx-zynq/obj.yml| 4 ++--
.../bsps/arm/xilinx-zynqmp/bspxilinxzynqmp.yml | 2 ++
spec/build/bsps/objdevspizynq.yml | 18
---
bsps/include/dev/spi/cadence-spi-regs.h | 84 +
bsps/include/dev/spi/cadence-spi.h | 48 +++
bsps/shared/dev/spi/cadence-spi.c | 437
3 files changed, 569 insertions(+)
create mode 100644 bsps/include/dev/spi/cadence-spi-regs.h
create mode 100644 bsp
v2:
- Moved source file to bsps/shared/dev/spi
- Moved include files to bsps/include/dev/spi
- Enabled build in aarch64 BSPs
v1:
This patchset implements a driver for the cadence-spi device of the Xilinx
Zynq-7000 based SoCs using the spidev API.
Jan Sommer (3):
bsps/xilinx_zynq: Add SPI dri
On Sat, 13 Feb 2021 at 10:59, Eshan Dhawan wrote:
>
>
> On 13-Feb-2021, at 1:53 PM, Sanskar Khandelwal wrote:
>
>
>
>
> On Sat, Feb 13, 2021 at 9:30 AM Joel Sherrill wrote:
>>
>>
>>
>> On Fri, Feb 12, 2021, 8:47 PM Rohan kumar wrote:
>>>
>>> I will look into this in more detail and get back t
> On 13-Feb-2021, at 1:53 PM, Sanskar Khandelwal wrote:
>
>
>
>
>> On Sat, Feb 13, 2021 at 9:30 AM Joel Sherrill wrote:
>>
>>
>>> On Fri, Feb 12, 2021, 8:47 PM Rohan kumar wrote:
>>> I will look into this in more detail and get back to you but in mean time I
>>> want to contribute to an
On Sat, Feb 13, 2021 at 9:30 AM Joel Sherrill wrote:
>
>
> On Fri, Feb 12, 2021, 8:47 PM Rohan kumar > wrote:
>
>> I will look into this in more detail and get back to you but in mean time
>> I want to contribute to any issues so can you suggest any thats need to be
>> solved or how do I look fo
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