[PATCH v3 1/2] cpu-supplement: Fix formatting and missing words

--- cpu-supplement/arm.rst | 18 +- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/cpu-supplement/arm.rst b/cpu-supplement/arm.rst index 63aa532..ac9e8c6 100644 --- a/cpu-supplement/arm.rst +++ b/cpu-supplement/arm.rst @@ -34,10 +34,10 @@ for the values. Count Leadi

[PATCH v3 2/2] Add AArch64 documentation

--- cpu-supplement/aarch64.rst | 134 + user/bsps/aarch64/a53.rst | 26 +++ user/bsps/bsps-aarch64.rst | 2 +- 3 files changed, 161 insertions(+), 1 deletion(-) create mode 100644 cpu-supplement/aarch64.rst create mode 100644 user/bsps/aarch64/a53.rst

[PATCH v3 05/10] bsps/shared: Add PSCI-based bspreset implementation

This adds a bsp_reset implementation based on the ARM PSCI specification often present in ARMv8 systems. --- bsps/shared/start/bspreset-arm-psci.c | 56 +++ 1 file changed, 56 insertions(+) create mode 100644 bsps/shared/start/bspreset-arm-psci.c diff --git a/bsps/shared/

[PATCH v3 10/10] bsps: Add Cortex-A53 ILP32 BSP variant

This adds an AArch64 ILP32 BSP variant based on Qemu's Cortex-A53 emulation with interrupt support using GICv3 and clock support using the ARM GPT. --- bsps/aarch64/shared/start/start.S | 16 + spec/build/bsps/aarch64/a53/abi.yml | 7 +- .../bsps/aarch64/a53/bspa53ilp32q

[PATCH v3 09/10] bsps: Add Cortex-A53 LP64 basic BSP

This adds an AArch64 basic BSP based on Qemu's Cortex-A53 emulation with interrupt support using GICv3 and clock support using the ARM GPT. --- bsps/aarch64/a53/console/console.c| 69 ++ bsps/aarch64/a53/include/bsp.h| 74 +++ bsps/aarch64/a53/include/bsp/irq.h

[PATCH v3 07/10] spmsgq_err01: Use correct max values and fix 64bit

Fix spmsgq_err01 on systems with 64-bit pointers and correct max value mismatches and inaccuracies that are more noticable on 64-bit systems. --- testsuites/sptests/spmsgq_err01/init.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/testsuites/sptests/spmsgq_err01/init.c

[PATCH v3 04/10] bsps: Break out AArch32 GICv3 support

This breaks out AArch32-specific code so that the shared GICv3 code can be reused by other architectures. --- bsps/arm/altera-cyclone-v/include/bsp/irq.h | 2 +- bsps/arm/altera-cyclone-v/include/tm27.h | 2 +- bsps/arm/headers.am | 4 - bsps/arm/imx/include/

[PATCH v3 06/10] bsps/arm: Break out linker script for AArch64

This breaks out the common section of the ARM linker script that is usable by AArch64 BSPs to avoid duplication of the vast majority. To do so, it was necessary to add a new linker path at bsps/shared/start. --- bsps/arm/shared/start/linkcmds.base | 381 +--- bsps/shared/start

[PATCH v3 08/10] score: Add AArch64 port

This adds a CPU port for AArch64(ARMv8) with support for exceptions and interrupts. --- cpukit/include/rtems/score/tls.h | 6 +- .../cpu/aarch64/aarch64-context-validate.S| 305 ++ .../aarch64-context-volatile-clobber.S| 100 .../cpu/aarch64/aarch64-exceptio

[PATCH v3 03/10] bsps: Break out AArch32 portions of GPT driver

This breaks AArch32-specific portions of the ARM GPT driver into their own file so that the generic code can be moved for reuse by other architectures. --- bsps/arm/imx/headers.am | 4 + bsps/arm/imx/include/bsp.h| 2 - bsps/arm/imx/start/bspstart.c

[PATCH v3 01/10] Move ARM PL011 UART driver

This UART driver is now needed for BSPs other than ARM. --- bsps/arm/headers.am | 2 -- bsps/arm/raspberrypi/console/console-config.c| 2 +- bsps/arm/realview-pbx-a9/include/bsp/console.h | 2 +- bsps/arm/xen/console/console.c

[PATCH v3 02/10] spec: Add missing spintrcritical24 definition

--- spec/build/bsps/tstnointrcrit.yml | 1 + 1 file changed, 1 insertion(+) diff --git a/spec/build/bsps/tstnointrcrit.yml b/spec/build/bsps/tstnointrcrit.yml index 0460aaabb3..46f7d974c8 100644 --- a/spec/build/bsps/tstnointrcrit.yml +++ b/spec/build/bsps/tstnointrcrit.yml @@ -24,6 +24,7 @@ act

Re: Interest in Virtual RTEMS Workshop

Hi Joel, About two weeks ago, a lady from Seattle organized a kite makers workshop, but virtual, over Google Meet. 3 sessions Friday afternoon, 8 Saturday, and 8 on Sunday. With very little fore notice, she managed to get people from Germany, England, Australia, Columbia, Argentina, as well as

Re: Interest in Virtual RTEMS Workshop

Hi Joel, you know I thought about a workshop/conference/meeting some years ago, but the reasons you list in your message exactly hit the problems. So I think such a virtual workshop would be a good idea (wow, thank you, corona! (at least for this)). Presenting what RTEMS is used for, how certain

Re: Interest in Virtual RTEMS Workshop

Hi, This sounds great! I'd love to learn more about RTEMS through the workshop. On Sat, Oct 3, 2020 at 1:32 AM Joel Sherrill wrote: > Hi > > In the past, we have internally discussed an RTEMS Workshop but always got > hung up on the basic logistics. There had to be a host site which usually > m

Re: [PATCH v4] cpukit/librcxx: Add a C++ thread interface with attributes

Will this show up in documentation somewhere? It does seem like we should say something about C++ threads and this. What about C11 threads? Test doesn't appear to cover much. More interspersed On Sat, Oct 3, 2020, 1:23 AM wrote: > From: Chris Johns > > --- > cpukit/include/rtems/c++/error