Re: Small doubt in how chain works in RTEMS

2020-07-24 Thread Richi Dubey
Yes, it makes perfect sense. Thank you for the clarification. On Fri, Jul 24, 2020 at 11:29 PM Gedare Bloom wrote: > On Fri, Jul 24, 2020 at 8:27 AM Richi Dubey wrote: > > > > Hi, > > > > I have a doubt regarding this. > > > > We do > > rtems_chain_append( &chain1, &node1.Node ); > > > > And

Adding Openat in RTEMS-Libbsd

2020-07-24 Thread Eshan Dhawan
Hello everyone, I tried adding openat to libbsd from freebsd. Got error in not defined _libc_interposing__ Where is that defined or needs to be added from freebsd. link to github repo : https://github.com/eshandhawan51/rtems-libbsd/tree/file_tests added file openat.c in freebsd/lib/libc/sys log:

Re: Small doubt in how chain works in RTEMS

2020-07-24 Thread Gedare Bloom
On Fri, Jul 24, 2020 at 8:27 AM Richi Dubey wrote: > > Hi, > > I have a doubt regarding this. > > We do > rtems_chain_append( &chain1, &node1.Node ); > > And get the node pointer when we use: > rtems_chain_node*p= rtems_chain_first(&chain1), > > After this, Do we really need to use the CON

Re: Strong APA Scheduler : First Draft

2020-07-24 Thread Gedare Bloom
On Fri, Jul 24, 2020 at 8:20 AM Richi Dubey wrote: > > Hi, > > With Dr. Butterfield's help, I've made the changes to implement the FIFO > Queue using chain. I am not accustomed to coding for embedded systems, so I > am not completely sure if I should be using malloc or not. > > Someone, please r

Re: Re: Is rtems available on a 4-cores cortex A72 (ARM-v8a) bsp?

2020-07-24 Thread Gedare Bloom
On Fri, Jul 24, 2020 at 2:28 AM small...@aliyun.com wrote: > > xilinx-zynqmp BSP has a ARM cortex A53 processor. Is it a ARMv8-A architeture? > https://developer.arm.com/ip-products/processors/cortex-a/cortex-a53 > > small...@aliyun.com > > > From: Sebastian Huber

Re: [PATCH] eng: Add recommendations for attributes

2020-07-24 Thread Gedare Bloom
looks good, thanks On Thu, Jul 23, 2020 at 11:11 PM Sebastian Huber wrote: > > Fix formatting. > --- > eng/coding-conventions.rst | 34 ++ > 1 file changed, 30 insertions(+), 4 deletions(-) > > diff --git a/eng/coding-conventions.rst b/eng/coding-conventions.rst >

[PATCH rtems_waf v2 2/2] rtems: Add function to test waf uninstall

2020-07-24 Thread Vijay Kumar Banerjee
--- rtems.py | 46 ++ 1 file changed, 46 insertions(+) diff --git a/rtems.py b/rtems.py index 067a213..7ee3653 100644 --- a/rtems.py +++ b/rtems.py @@ -897,6 +897,52 @@ def _strip_cflags(cflags): def _log_header(conf): conf.to_log('---

[PATCH rtems_waf v2 1/2] rtems: Add uninstall option to the list of commands

2020-07-24 Thread Vijay Kumar Banerjee
--- rtems.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/rtems.py b/rtems.py index ceabcd9..067a213 100644 --- a/rtems.py +++ b/rtems.py @@ -131,7 +131,7 @@ def init(ctx, filters = None, version = None, long_commands = False, bsp_init = # commands = []

Re: Small doubt in how chain works in RTEMS

2020-07-24 Thread Richi Dubey
Hi, I have a doubt regarding this. We do rtems_chain_append( &chain1, &node1.Node ); And get the node pointer when we use: rtems_chain_node*p= rtems_chain_first(&chain1), After this, Do we really need to use the CONTAINER_OF and other such methods? Can we not simply do: test_node nod

Re: Strong APA Scheduler : First Draft

2020-07-24 Thread Richi Dubey
Hi, With Dr. Butterfield's help, I've made the changes to implement the FIFO Queue using chain. I am not accustomed to coding for embedded systems, so I am not completely sure if I should be using malloc

[GSoC 2020]: Doubts in building RSB Recipe for EPICS for multiple architectures

2020-07-24 Thread Mritunjay Sharma
Hello all, To update you all, I have sent the first version of PATCHES that implement an RSB recipe for EPICS7 building with RTEMS5 for pc-386. While the build was successful for pc-386, I have doubts and need suggestions on how to make it work across different BSP targets. I will request Chris t

Re: Re: Is rtems available on a 4-cores cortex A72 (ARM-v8a) bsp?

2020-07-24 Thread small...@aliyun.com
xilinx-zynqmp BSP has a ARM cortex A53 processor. Is it a ARMv8-A architeture? small...@aliyun.com From: Sebastian Huber Date: 2020-07-24 12:49 To: small...@aliyun.com; joel CC: devel Subject: Re: Is rtems available on a 4-cores cortex A72 (ARM-v8a) bsp? On 24/07/2020 03:09, small...@aliyun.co