[PATCH] griscv: add additional cpu configurations

>From 568490a054b9bf27ddad99a6a186e363123dd432 Mon Sep 17 00:00:00 2001 From: Jiri Gaisler Date: Fri, 8 Feb 2019 12:40:45 +0100 Subject: [PATCH] griscv: add additional cpu configurations * Also switch default config to imafd as the C extension is not supported for code coverage --- bsps/ris

Re: Break points with latest SIS

Hello Jiri, thanks, this helped to fix a bug in the SMP user extensions code for thread switches: https://git.rtems.org/rtems/commit/?id=26333f2ad09fc2ecd574fb167862520493c63ee3 I updated also the RSB: https://git.rtems.org/rtems-source-builder/commit/?id=ee40e0bf0bf233902491ee3de1c56d2a93e2

Re: Break points with latest SIS

Hello Sebastian, here is a patch for RSB that improves sis debugging in gdb and on SMP systems: * Correct break-point handling in gdb * Detect and break on NULL pointer derefence (call/jump) * Single stepping (stepi) in gdb/sis keeps focus on debugged cpu * 'sim cpu' command shows active cpu

Re: [PATCH] Change module imports

I checked in another workaround: https://git.rtems.org/rtems-docs/commit/?id=6f110ccf6b2a9e142859874e401888dc9c2c2b2f -- Sebastian Huber, embedded brains GmbH Address : Dornierstr. 4, D-82178 Puchheim, Germany Phone : +49 89 189 47 41-16 Fax : +49 89 189 47 41-09 E-Mail : sebastian.hu...