Re: [apache/tvm] [RFC] [VTA] [TSIM] Enabling Cycle-Accurate Hardware Simulation for VTA #3009 (#3010)

the build command is: verilator build include the "VTASimDPI.v" ![Uploading image.png…]() -- Reply to this email directly or view it on GitHub: https://github.com/apache/tvm/pull/3010#issuecomment-1015008334 You are receiving this because you are subscribed to this thread. Message ID:

Re: [apache/tvm] [RFC] [VTA] [TSIM] Enabling Cycle-Accurate Hardware Simulation for VTA #3009 (#3010)

use https://github.com/apache/tvm-vta/tree/87ce9acfae550d1a487746e9d06c2e250076e54c/apps/tsim_example was OK. but when run "python3 tests/python/verilog_accel.py", it reported: libhw.so: undefined symbol : VTASimDPI ![image](https://user-images.githubusercontent.com/87418712/149775311-18afbfec-e

Re: [apache/tvm] [RFC] [VTA] [TSIM] Enabling Cycle-Accurate Hardware Simulation for VTA #3009 (#3010)

Hi, I download the example at https://github.com/apache/tvm-vta/tree/main/apps/tsim_example, and install Verilator(4.216 2021-12-05 version) on Ubuntu18.04. when i make it(run_verilog), i got the fllowing error, how should i do? ![image](https://user-images.githubusercontent.com/87418712/1492781