Thanks @zhanghaohit
I like to have your opinion on using soft cores for pcie based fpgas. Rather
than going through the high latency communications between the host and fpga or
as you did running all the middle layers on the fpga itself, we can offload
runtime stuff on a soft core (nios, micr
Thank you @zhanghaohit.
In one of your posts above you mentioned that you have implemented theproposal.
Have you tested it with some models? which fpga board you used? what are the
performance numbers compared to vta on fpga soc? Is your code available in a
repo somewhere? I really like to te
Hi
It seems that there is already runtime support for PCIe based FPGAs
(https://discuss.tvm.ai/t/tvm-monthly-july-2019/3600). Is that right?
@liangfu @thierry @hjiang @remotego
@zhanghaohit
Thank you
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Topic](https://discuss.tvm.ai/t/rfc-vta-support-for-cloud-devices-opencl
Hi,
I'm new to TVM and want to use VTA on our Intel Stratix10 FPGA. I have some
questions regarding that, any feedback would be greatly appreciated.
1- Considering that there is no hard core on our FPGA board, how should we use
the runtime? Should we just keep it on the host side/compile mach
