Re: [apache/tvm] [VOTE] Release Apache TVM v0.10.0.rc0 (Issue #13026)

2022-10-12 Thread Siyuan Feng
+1 -- Reply to this email directly or view it on GitHub: https://github.com/apache/tvm/issues/13026#issuecomment-1276961044 You are receiving this because you are subscribed to this thread. Message ID:

Re: [apache/tvm] [VOTE] Release Apache TVM v0.10.0.rc0 (Issue #13026)

2022-10-12 Thread Tianqi Chen
+1. i checked - checksum - gpg - code compiles -- Reply to this email directly or view it on GitHub: https://github.com/apache/tvm/issues/13026#issuecomment-1276854573 You are receiving this because you are subscribed to this thread. Message ID:

Re: [apache/tvm] [VOTE] Release Apache TVM v0.10.0.rc0 (Issue #13026)

2022-10-12 Thread Wuwei Lin
+1 -- Reply to this email directly or view it on GitHub: https://github.com/apache/tvm/issues/13026#issuecomment-1276839145 You are receiving this because you are subscribed to this thread. Message ID:

Re: [apache/tvm-rfcs] [RFC] CodeGenAArch64 backend with Scalable Vector Extension (SVE) (PR #94)

2022-10-12 Thread Tianqi Chen
Thanks @ekalda i don't have further comments at this pt -- Reply to this email directly or view it on GitHub: https://github.com/apache/tvm-rfcs/pull/94#issuecomment-1276158707 You are receiving this because you are subscribed to this thread. Message ID:

Re: [apache/tvm-rfcs] [RFC] CodeGenAArch64 backend with Scalable Vector Extension (SVE) (PR #94)

2022-10-12 Thread Elen Kalda
Thanks for your input and suggestions @tqchen, much appreciated! I added a paragraph about pattern matching TIR, see if it makes sense. Yes, this RFC propses A1 change. A2 style TIR intrinsic is in the plan further down the line, it would let us expose SVE capabilities to the core compiler, so