On Thu, Jun 12, 2025 at 10:47 PM wrote:
>
> From: Pavan Nikhilesh
>
> Add event vector adapter support to CN20K event device.
>
> Signed-off-by: Pavan Nikhilesh
> ---
> v2 Changes:
> - Add depends on series tag.
> - Fix compilation.
> v3 Changes:
> - Rebase.
> - Fix errors from check-meson.p
Thanks, will be fixed in next version.
--
> This nbl PMD (**librte_net_nbl**) provides poll mode driver for
> NebulaMatrix serials NICs.
>
> Features:
> -
> - MTU update
> - promisc mode set
> - xstats
> - Basic stats
>
> S
Thanks, will be fixed in next version.
--
> diff --git a/drivers/net/nbl/nbl_include/nbl_include.h
> b/drivers/net/nbl/nbl_include/nbl_include.h
> new file mode 100644
> index 00..1697f50a75
> --- /dev/null
> +++ b/drivers/net
From: Jun Yang
1) The max size of extract buffer should be size of
"struct dpni_ext_set_rx_tc_dist"(488), which is greater than 256.
2) dpkg_prepare_key_cfg is responsible to clear
extract buffer before preparing.
Fixes: 25d0ae624245 ("net/dpaa2: check IOVA before sending MC command")
Cc:
Hello, Stephen:
Thanks for your review. This patch is particularly important for our NBL
driver because our coexistence implementation depends on it.
Unlike RDMA devices that support hardware page table translation, our hardware
requires a software-managed approach to avoid IOVA conflicts since
On Wed, Jun 11, 2025 at 11:45 AM David Marchand
wrote:
>
> This is a rework of Andre v5, trying to hide the ugly details in a
> driver only macro not exposed publicly.
>
>
> --
> David Marchand
>
> Changes since v6:
> - changed this_pmd_name symbols construction,
>
> Changes since v5:
> - moved de
On 6/9/25 9:23 AM, Hengqi Chen wrote:
Like most dirvers, make the fast path of virtio_xmit_cleanup() behave as
described by the comments of rte_eth_txconf::tx_free_thresh ([0]):
Start freeing Tx buffers if there are
less free descriptors than this value.
The rationale behind this ch
On Thu, Mar 27, 2025 at 4:50 PM wrote:
>
> From: Pavan Nikhilesh
>
> Since driver/common/cnxk has common code that is
> used across multiple platforms, allow use of
> GCC builtin atomic functions.
>
> Signed-off-by: Pavan Nikhilesh
Acked-by: Jerin Jacob
> ---
> Rest of drivers i.e., drivers/
Currently, there are duplicate implementations of Tx mbuf recycle in some
drivers, specifically ixgbe and i40e. Move them into a common header.
Signed-off-by: Anatoly Burakov
Acked-by: Bruce Richardson
---
Notes:
v3 -> v4:
- Use the common desc_done function to check for DD bit status
14/04/2025 10:45, Thomas Monjalon:
> The guides having a diverse list of multiple drivers or tools
> are easier to browse with an index limited
> to the first headings (depth 1).
>
> Signed-off-by: Thomas Monjalon
Applied
On 6/5/25 1:35 PM, Eugenio Pérez wrote:
QEMU's shadow virtqueue and VDUSE exposes these areas as read-only. If
we don't change it, vhost_iova_to_vva do not consider them as valid and
returns that they're not found.
Fixes: eefac9536a90 ("vhost: postpone device creation until rings are mapped")
eal: handle sysconf(_SC_PAGESIZE) negative return value
Coverity reports some defects, where the root cause seems to be negative
return value from sysconf(_SC_PAGESIZE) not being handled.
rte_mem_page_size() was updated to handle negative return value from
sysconf(_SC_PAGESIZE).
All other functi
> Subject: [PATCH v4 3/6] net/intel: add TxPP Support for E830
>
> Add support for Tx Time based queues. This is used to schedule
> packets based on Tx timestamp.
>
> Signed-off-by: Soumyadeep Hore
> ---
> drivers/net/intel/common/tx.h | 14 ++
> drivers/net/intel/ice/base/ice_lan
Hi Kai Ji,
This patch adds a check on cop status after DECRYPT in existing RSA test.There
are
few CI failures for this patch and the failures are very specific to Openssl
1.1.1 variants
used in below platforms:
* Ubuntu 20.04 - Openssl 1.1.1f
* RHEL 8 - Openssl 1.1.1k
When I manually build these
[Public]
Hi Bruce & Anatoly,
We are facing an issue while apply patch 23 individually or series.
We get the following error for individual apply
```
$ git apply p23.patch --verbose
Checking patch drivers/net/intel/common/rx.h...
Checking patch drivers/net/intel/ixgbe/ixgbe_ethdev.c...
Checking
Hi Wathsala,
>
> I have some updates to the previous claims I have made.
Thanks for the update, unfortunately I don't have time to look at it properly
right now.
Will try to return back to it it in 3-4 weeks.
Just one question for now, see below.
>
> > > > > That cannot happen in Arm v8/v9
Updated the recommended MEV-ts release version corresponding
to DPDK release in the cpfl driver documentation.
Signed-off-by: Shaiq Wani
---
doc/guides/nics/cpfl.rst | 2 ++
1 file changed, 2 insertions(+)
diff --git a/doc/guides/nics/cpfl.rst b/doc/guides/nics/cpfl.rst
index 3bfab2136d..aa5bed
Updated the recommended MEV-ts release versions corresponding to
DPDK releases in the idpf driver documentation.
Signed-off-by: Shaiq Wani
---
doc/guides/nics/idpf.rst | 2 ++
1 file changed, 2 insertions(+)
diff --git a/doc/guides/nics/idpf.rst b/doc/guides/nics/idpf.rst
index b55de3abd3..3d69
Array range initialization is non-standard and is not provided by
all compilers. MSVC does not implement it and ends up emitting
errors like the one below:
drivers/net/r8169/r8169_phy.c(380):
error C2143: syntax error: missing ':' before '...'
case CFG_METHOD_48 ... CFG_METHOD_57:
The fix is
Array range initialization is non-standard and is not provided by
all compilers. MSVC does not implement it and ends up emitting
errors like the one below:
drivers/net/r8169/r8169_phy.c(380):
error C2143: syntax error: missing ':' before '...'
case CFG_METHOD_48 ... CFG_METHOD_57:
The fix is
Now that all issues related to drivers are addressed they can be
enabled to be built with MSVC.
Signed-off-by: Andre Muezerie
---
drivers/meson.build | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/meson.build b/drivers/meson.build
index 7b7205dfac..07ff94ff26 100644
--- a/drivers
This patchset solves the last issues preventing drivers from being
compiled with MSVC (array range initialization) and enables the
drivers to be built with it.
Array range initialization is non-standard and is not provided by
all compilers. MSVC does not implement it and ends up emitting
errors li
On Thu, Jun 12, 2025 at 11:14:30AM +0100, Loftus, Ciara wrote:
> > Subject: [PATCH v4 2/6] net/intel: add read clock feature in ICE
>
> Since the change is specific to the ice driver only, I think the title should
> change to "net/ice" and you can drop the mention of "in ICE" in the message
> th
#
June 12, 2025
Attendees
1. Patrick Robb
2. Paul Szczepanek
3. Aaron Conole
4. Manit Mahajan
5. Dean Marx
#
Minutes
On Thu, 12 Jun 2025 08:58:21 +
Kyo Liu wrote:
> This nbl PMD (**librte_net_nbl**) provides poll mode driver for
> NebulaMatrix serials NICs.
>
> Features:
> -
> - MTU update
> - promisc mode set
> - xstats
> - Basic stats
>
> Support NICs:
> -
> - S1205CQ-A00CHT
> - S1
On Thu, 12 Jun 2025 08:58:31 +
Kyo Liu wrote:
> I propose this patch for DPDK to enable coexistence between
> DPDK and kernel drivers for regular NICs.This solution requires
> adding a new pci_ops in rte_pci_driver, through which DPDK will
> retrieve the required IOVA mode from the vendor dri
On Thu, 12 Jun 2025 08:58:21 +
Kyo Liu wrote:
> This nbl PMD (**librte_net_nbl**) provides poll mode driver for
> NebulaMatrix serials NICs.
>
> Features:
> -
> - MTU update
> - promisc mode set
> - xstats
> - Basic stats
>
> Support NICs:
> -
> - S1205CQ-A00CHT
> - S1
On Thu, 12 Jun 2025 08:58:23 +
Kyo Liu wrote:
> diff --git a/drivers/net/nbl/nbl_include/nbl_include.h
> b/drivers/net/nbl/nbl_include/nbl_include.h
> new file mode 100644
> index 00..1697f50a75
> --- /dev/null
> +++ b/drivers/net/nbl/nbl_include/nbl_include.h
> @@ -0,0 +1,53 @@
> +/
On Tue, Jun 10, 2025 at 01:11:59PM +, Soumyadeep Hore wrote:
> E830 adapters currently support Tx Time based queues.
>
> Signed-off-by: Soumyadeep Hore
> ---
> doc/guides/nics/ice.rst | 18 ++
> 1 file changed, 18 insertions(+)
>
> diff --git a/doc/guides/nics/ice.rst b/doc/
Rearrange the topology and DPDK setup/teardown calls during
test runs to ensure the devbind script is not called
while the DPDK tmp directory doesn't exist.
Fixes: 4cef16f1f0a4 ("dts: improve port handling")
Signed-off-by: Dean Marx
---
dts/framework/test_run.py | 4 ++--
1 file changed, 2 inse
From: Pavan Nikhilesh
Add event vector adapter support to CN20K event device.
Signed-off-by: Pavan Nikhilesh
---
v2 Changes:
- Add depends on series tag.
- Fix compilation.
v3 Changes:
- Rebase.
- Fix errors from check-meson.py
v4 Changes:
- Rebase.
drivers/common/cnxk/roc_sso.c
On Thu, Jun 12, 2025 at 11:31:30AM +0100, Loftus, Ciara wrote:
> > Subject: [PATCH v4 3/6] net/intel: add TxPP Support for E830
> >
> > Add support for Tx Time based queues. This is used to schedule
> > packets based on Tx timestamp.
> >
> > Signed-off-by: Soumyadeep Hore
Hi Soumyadeep,
more c
The receive callback was not safe with multiple queues.
If one receive queue callback decides to take a sample it
needs to add that sample and do atomic update to the previous
TSC sample value. Add a new lock for that.
Also, add code to handle TSC wraparound in comparison.
Perhaps this should move
If transmit callback is called, and there are no packets
in the burst with timestamp set, then the expensive operations
of locking and accessing TSC can be skipped.
Signed-off-by: Stephen Hemminger
---
lib/latencystats/rte_latencystats.c | 17 +
1 file changed, 13 insertions(+),
After investigating latencystat test failures, discovered it poorly
designed to handle bursts and multiple queues.
Stephen Hemminger (2):
latencystats: fix receive sample MP issues
latencystats: optimize locking on transmit
lib/latencystats/rte_latencystats.c | 64 +++
From: Vanshika Shukla
This patch adds DPBP APIs for setting and getting the depletion/surplus
thresholds for controlling pause frame generation.
By default, depletion_entry is set as 128 by MC. This API would help user
configure the buffer in depletion state as per requirement.
Signed-off-by: V
From: Jun Yang
Use DPAA2_VADDR_TO_IOVA to convert va to iova for both VA and PA modes.
Signed-off-by: Jun Yang
---
drivers/mempool/dpaa2/dpaa2_hw_mempool.c | 222 +++
1 file changed, 142 insertions(+), 80 deletions(-)
diff --git a/drivers/mempool/dpaa2/dpaa2_hw_mempool.c
V1-logs:
This patch series introduces enhancements and fixes to the
NXP DPAA2 Ethernet driver.
It includes support for
- software taildrop on ordered queues.
- setup speed capabilities.
- DPAA2 resource version.
- MAC level statistics.
- improve PA-VA conversion.
- add buffer pool depletion s
This patch fixes the shaper rate by configuring the
user given rate in bytes. Earlier driver was considering
the user given rate value in bits.
Fixes: ac624068ee25 ("net/dpaa2: support traffic management")
Cc: sta...@dpdk.org
Signed-off-by: Gagandeep Singh
---
drivers/net/dpaa2/dpaa2_tm.c | 8 +
From: Apeksha Gupta
Add support of dpmac counters in xstats.
Signed-off-by: Apeksha Gupta
Signed-off-by: Vanshika Shukla
---
drivers/net/dpaa2/dpaa2_ethdev.c| 118 ++--
drivers/net/dpaa2/dpaa2_ethdev.h| 12 +++
drivers/net/dpaa2/mc/dpni.c | 29 ++-
From: Ioana Ciornei
Previously, the speed_capa field from struct rte_eth_dev_info was
populated with all possible speeds that the MACs on the system could
sustain. What this meant is that the bitmap of speed capability did not
reflect what the MAC could do in the current circumstance.
Fix this b
From: Apeksha Gupta
Added all mac counters including Tx stats buckets for
packet sizes.
Signed-off-by: Apeksha Gupta
Signed-off-by: Vanshika Shukla
---
drivers/net/dpaa2/mc/fsl_dpmac.h | 48 +++-
1 file changed, 47 insertions(+), 1 deletion(-)
diff --git a/drivers
This patch adds support for software taildrop on ordered queues
in the DPAA2 driver.
It also enables congestion notification by default on
traffic management (TM) queues, which is a prerequisite for
software taildrop functionality.
Signed-off-by: Gagandeep Singh
---
drivers/net/dpaa2/dpaa2_rxtx
From: Apeksha Gupta
This patch upgrades the MC firmware release API compatibility
to 10.39.0. Added mc/fsl_dpmac.h file.
Signed-off-by: Apeksha Gupta
---
drivers/net/dpaa2/mc/fsl_dpmac.h | 465 +++
1 file changed, 465 insertions(+)
create mode 100644 drivers/net/dp
From: Apeksha Gupta
Added all mac counters including Tx stats buckets for
packet sizes in xstats.
Signed-off-by: Apeksha Gupta
Signed-off-by: Vanshika Shukla
---
drivers/net/dpaa2/dpaa2_ethdev.c | 20 +++-
drivers/net/dpaa2/dpaa2_ethdev.h | 4 ++--
2 files changed, 21 inserti
From: Ioana Ciornei
The list of availabla DPNI APIs depends on the DPNI API version
available on a system. Retrieve the API version in the init stage and
store it in the private structure so that it can be used at a later
stage.
Signed-off-by: Ioana Ciornei
---
.mailmap
There is certain amount of duplication between different ixgbe, i40e, ice, and
iavf. This patchset specifically focuses on laying groundwork for deduplicating
the Rx side of things - providing common queue definitions, using common Rx
descriptor formats, and some low hanging fruit in terms of Rx co
There are no physical functions that support having VF use 16-byte
descriptors, so remove all 16-byte descriptor related code from the driver.
Suggested-by: Bruce Richardson
Signed-off-by: Anatoly Burakov
Acked-by: Bruce Richardson
---
Notes:
v4 -> v5:
- Remove 16-byte descriptor relat
The `rdh` (read head) field in the `ixgbe_rx_queue` struct is not used
anywhere in the codebase, and can be removed.
Signed-off-by: Anatoly Burakov
Acked-by: Bruce Richardson
---
drivers/net/intel/ixgbe/ixgbe_rxtx.c | 9 ++---
drivers/net/intel/ixgbe/ixgbe_rxtx.h | 1 -
2 files changed, 2 i
Currently, the stats structure is directly embedded in the queue structure.
We're about to move iavf driver to a common Rx queue structure, so we can't
have driver-specific structures that aren't pointers, inside the common
queue structure. To prepare, we replace direct embedding into the queue
str
Currently, the i40e driver has a variable that has the same semantics as
in other drivers, but has a different name. Rename `rx_using_sse` to
`vector_rx` to match it to other drivers.
Signed-off-by: Anatoly Burakov
Acked-by: Bruce Richardson
---
Notes:
v3 -> v4:
- Make this commit separ
Currently, the ice driver has a variable that have the same semantics as
in other drivers, but has a different name. Rename `rx_ring_dma` to
`rx_ring_phys_addr` for consistency with other drivers.
Signed-off-by: Anatoly Burakov
Acked-by: Bruce Richardson
---
Notes:
v3 -> v4:
- Make this
In preparation for having a common definition for 16-byte and 32-byte Rx
descriptors, rename RTE_LIBRTE_ICE_16BYTE_RX_DESC to
RTE_NET_INTEL_USE_16BYTE_DESC.
Suggested-by: Bruce Richardson
Signed-off-by: Anatoly Burakov
Acked-by: Bruce Richardson
---
Notes:
v3 -> v4:
- Add this commit
There are no differences between scalar and vector paths when it comes to
packet type support, and the only data path currently not covered by the
check is the VF representor path, because it's not meant to be used
directly anyway. Simplify the check to reflect that fact.
Signed-off-by: Anatoly Bu
There is no reason why scalar and vector implementations of tx free mbufs
function have to share the same name, in fact it is counter-productive
because including `ixgbe_rxtx_vec_common.h` from `ixgbe_rxtx.c` will cause
naming clashes. Rename the vector implementation to avoid naming clashes.
Sign
Each vector driver provides its own Rx queue setup etc. functions, but
actually they're entirely identical, and can be merged. Rename the
`ixgbe_recycle_mbufs_vec_common.c` to `ixgbe_rxtx_vec_common.c` and move
all common code there from each respective vector driver.
Signed-off-by: Anatoly Burako
Currently, vector Rx queue release mbufs function is only called from
inside the scalar variant. Decouple them to allow both to be defined
separately from each other, and provide a common function that picks
between the two when necessary.
Signed-off-by: Anatoly Burakov
Acked-by: Bruce Richardson
There is wrong indentation in `ixgbe_set_tx_function`. Fix it.
Signed-off-by: Anatoly Burakov
Acked-by: Bruce Richardson
---
Notes:
v5:
- Add this patch
drivers/net/intel/ixgbe/ixgbe_rxtx.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/net/intel/ixgb
This patch does the following cleanups:
- Remove RTE_ and RTE_PMD_ prefix from internal definitions
- Mark vector-PMD related definitions with IXGBE_VPMD_ prefix
Signed-off-by: Anatoly Burakov
Acked-by: Bruce Richardson
---
Notes:
v3 -> v4:
- Add this commit
drivers/net/intel/ixgbe/i
In preparation for deduplication effort, generalize the Rx queue structure.
The entire Rx queue structure is moved to common/rx.h, clarifying the
comments where necessary, and separating common parts from ixgbe-specific
parts.
Signed-off-by: Anatoly Burakov
Acked-by: Bruce Richardson
---
Notes
This commit does the following cleanups:
- Mark vector-PMD related definitions with ICE_VPMD_ prefix
- Remove unused definitions
- Create "descriptors per loop" for different vector implementations
(regular for SSE, Neon, wide for AVX2, AVX512)
Signed-off-by: Anatoly Burakov
Acked-by: Bruce Ri
This commit does the following cleanups:
- Mark vector-PMD related definitions with IAVF_VPMD_ prefix
- Create "descriptors per loop" for different vector implementations
(regular for SSE, Neon, AltiVec, wide for AVX2, AVX512)
- Make definitions' names match naming conventions used in other driv
Add a function to check DD bit status, and use it everywhere we do these
checks.
Signed-off-by: Anatoly Burakov
---
Notes:
v6:
- Move ixgbe_tx_desc_done() to ixgbe_rxtx.h to avoid compile errors on
platforms that do not support vector driver
v5:
- Add this commit
dri
Currently, vector code is guarded by platform checks, and unused functions
are implemented using stubs.
Simplify things the following way:
- Define a compilation flag `IXGBE_VPMD_SUPPORTED` that will enable or
disable vector code support regardless of platform
- Wrap platform checks with said d
There is no reason why bits and pieces of vectorized code should be
defined in `ixgbe_rxtx.c`, so move them to the vec common file.
Signed-off-by: Anatoly Burakov
Acked-by: Bruce Richardson
---
Notes:
v5:
- Add this patch
drivers/net/intel/ixgbe/ixgbe_rxtx.c | 41
There is an option `RTE_PMD_PACKET_PREFETCH` in `rte_config.h` that is
always set to 1 by default, and that controls some prefetch behavior in the
driver. However, there's another prefetch behavior that is controlled by
`RTE_PMD_USE_PREFETCH`, which is always defined unconditionally (literally
usin
Make the i40e driver use the new common Rx queue structure.
The i40e driver supports 16-byte and 32-byte Rx descriptor formats, which
is shared by other drivers. To have fewer driver-specific definitions in
common structures, add a header file defining shared descriptor formats,
and switch between
Make the ice driver use the new common Rx queue structure.
In addition to 16-byte and 32-byte descriptors supported by other drivers
which we adjust ice driver to use where necessary, ice driver also
supports flex descriptor format that is also shared by some of the other
drivers, so add a common
Make the iavf driver use the new common Rx queue structure.
The iavf driver only supports 32-byte descriptors but they are of a common
format, so replace all usages of iavf-specific descriptors with the
common ones, and force the common queue structure to only use 32-byte
descriptor formats for IA
There is certain amount of duplication between various drivers when it
comes to Rx ring rearm. This patch takes implementation from ice driver
as a base because it has support for no IOVA in mbuf as well as all
vector implementations, and moves them to a common file.
While we're at it, also make s
The iavf driver has implementations of vectorized mbuf rearm code that
is identical to the ones in the common code, so just use those.
While we're at it, also make sure to use common definitions for things like
burst size, rearm threshold, and descriptors per loop, which is currently
defined separ
The i40e driver has an implementation of vectorized mbuf rearm code that
is identical to the one in the common code, so just use that.
In addition, the i40e has implementations of Rx queue rearm for Neon and
AltiVec instruction sets, so create common headers for each of the
instruction sets, and u
Currently, for 32-byte descriptor format, only SSE instruction set is
supported. Add implementation for AVX2 and AVX512 instruction sets. Since
we are using Rx descriptor definitions from common code, we can just use
the generic descriptor definition, as we only ever write the first 16 bytes
of it,
The ixgbe driver has implementations of vectorized mbuf rearm code that
is identical to the ones in the common code, so just use those.
Since ixgbe Rx descriptors are always 16-byte wide, force using 16-byte
definitions in the common headers with a define flag.
While we're at it, also make sure t
Currently, there are duplicate implementations of Rx mbuf recycle in some
drivers, specifically ixgbe and i40e. Move them into a common header.
While we're at it, also support no-IOVA-in-mbuf case.
Signed-off-by: Anatoly Burakov
Acked-by: Bruce Richardson
---
Notes:
v5:
- Renamed paddr
Some of the things that are only used by vector drivers is guarded by
platform define checks, but there is actually no real reason to have those
checks, because this code won't run anyway. Remove all of the unnecessary
platform checks, and provide function stubs where necessary to make
compilation
[Public]
> -Original Message-
> From: Bruce Richardson
> Sent: Thursday, June 12, 2025 3:49 PM
> To: Varghese, Vipin
> Cc: Anatoly Burakov ; dev@dpdk.org; Vladimir
> Medvedkin
> Subject: Re: [PATCH v6 23/33] net/ixgbe: create common Rx queue structure
>
> Caution: This message originate
In preparation for having a common definition for 16-byte and 32-byte Rx
descriptors, rename `RTE_LIBRTE_I40E_16BYTE_RX_DESC` to
`RTE_NET_INTEL_USE_16BYTE_DESC``.
Suggested-by: Bruce Richardson
Signed-off-by: Anatoly Burakov
Acked-by: Bruce Richardson
---
Notes:
v3 -> v4:
- Add this co
This commit does the following cleanups:
- Remove RTE_ and RTE_PMD_ prefix from internal definitions
- Mark vector-PMD related definitions with I40E_VPMD_ prefix
- Remove unused definitions
- Create "descriptors per loop" for different vector implementations
(regular for SSE, Neon, AltiVec, wide
Currently, the ixgbe driver has variables that have the same semantics as
in other drivers, but have different names. Rename these variables to match
ones in other drivers:
- rdt_reg_addr -> qrx_tail (Rx ring tail register address)
- rx_using_sse -> vector_rx (indicates if vectorized path is enabl
[Public]
> -Original Message-
> From: Bruce Richardson
> Sent: Wednesday, June 11, 2025 4:23 PM
> To: dev@dpdk.org
> Cc: Varghese, Vipin ; Bruce Richardson
>
> Subject: [PATCH v5] build: reduce use of AVX compiler flags
>
> Caution: This message originated from an External Source. Use pr
On 6/9/2025 6:23 PM, Stephen Hemminger wrote:
On Mon, 9 Jun 2025 11:16:41 +0100
Anatoly Burakov wrote:
+ ret_val = hw->phy.ops.write_reg_locked(hw, E1000_PHY_TIMEOUTS_REG,
+ phy_timeout);
+
+ return ret_val;
Why use temporary value (r
On 6/12/2025 1:11 PM, Anatoly Burakov wrote:
Add a function to check DD bit status, and use it everywhere we do these
checks.
Signed-off-by: Anatoly Burakov
---
Missed Bruce's ack from v5 and v6:
Acked-by: Bruce Richardson
--
Thanks,
Anatoly
Hi Danylo,
On 6/4/25 10:32 AM, Danylo Vodopianov wrote:
Hello, Maxime
Thank you for your review.
If I understand correctly, you propose modifying the |
VHOST_USER_ASSERT_LOCK()| macro so that a |VHOST_USER_SET_MEM_TABLE|
request does not trigger an assertion.
However, I believe such modific
On Wed, Jun 4, 2025 at 6:13 PM wrote:
>
> From: Pavan Nikhilesh
>
> Add event vector adapter support to CN20K event device.
>
> Signed-off-by: Pavan Nikhilesh
> ---
> v2 Changes:
> - Add depends on series tag.
> - Fix compilation.
> v3 Changes:
> - Rebase.
> - Fix errors from check-meson.py
Updated the recommended MEV-ts release version corresponding
to DPDK release in the cpfl driver documentation.
Signed-off-by: Shaiq Wani
---
doc/guides/nics/cpfl.rst | 2 ++
1 file changed, 2 insertions(+)
diff --git a/doc/guides/nics/cpfl.rst b/doc/guides/nics/cpfl.rst
index 3bfab2136d..aa5bed
Updated the recommended MEV-ts release versions corresponding to
DPDK releases in the idpf driver documentation.
Signed-off-by: Shaiq Wani
---
doc/guides/nics/idpf.rst | 2 ++
1 file changed, 2 insertions(+)
diff --git a/doc/guides/nics/idpf.rst b/doc/guides/nics/idpf.rst
index b55de3abd3..3d69
v1 - fixed the series name.
Shaiq Wani (2):
doc: update recommended matching list for cpfl PMD
doc: update recommended matching list for idpf PMD
doc/guides/nics/cpfl.rst | 2 ++
doc/guides/nics/idpf.rst | 2 ++
2 files changed, 4 insertions(+)
--
2.34.1
Extend the original fix to gen3 and gen4 code.
Fixes: 317d05f3721c ("crypto/qat: fix out-of-place chain/cipher/auth headers")
Cc: arkadiuszx.kusz...@intel.com
Cc: sta...@dpdk.org
Signed-off-by: Radu Nicolau
---
drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c | 13 -
drivers/crypto/qat/
> Subject: [PATCH v4 2/6] net/intel: add read clock feature in ICE
Since the change is specific to the ice driver only, I think the title should
change to "net/ice" and you can drop the mention of "in ICE" in the message
that follows the colon.
>
> Adding eth_ice_read_clock() feature to get cu
On Thu, Jun 12, 2025 at 10:12:23AM +, Varghese, Vipin wrote:
> [Public]
>
> Hi Bruce & Anatoly,
>
> We are facing an issue while apply patch 23 individually or series.
>
> We get the following error for individual apply
>
> ```
> $ git apply p23.patch --verbose
> Checking patch drivers/net/
Due to changes in the specification related to IV size and initialization
sequence remove ZUC 256 support from Gen 3 and 5 hardware
Signed-off-by: Radu Nicolau
Acked-by: Kai Ji
---
v3: updated description
doc/guides/rel_notes/release_25_07.rst | 5 ++
drivers/common/qat/qat_adf/icp_qat_
Due to changes in the specification related to IV size and initialization
sequence remove ZUC 256 support from Gen 3 and 5 hardware
Signed-off-by: Radu Nicolau
Acked-by: Kai Ji
---
v3: update description
doc/guides/rel_notes/release_25_07.rst | 6 +++
drivers/common/qat/qat_adf/icp_qat_
David Marchand writes:
> Some trivial builds warnings with MSVC were missed as those were not
> treated as errors.
>
> Signed-off-by: David Marchand
> ---
Acked-by: Aaron Conole
> .github/workflows/build.yml | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/.github/wor
On Tue, Jun 10, 2025 at 4:14 PM Stephen Hemminger
wrote:
>
> No need for loop and memset() here. Just use structure
> initialization. Remove unnecessary initializations.
>
> Look at the number of samples, min, max and average
> numbers to make sure they look correct.
> Forward for longer to make
On Thu, Jun 12, 2025 at 3:56 PM Maxime Coquelin
wrote:
>
>
>
> On 6/5/25 1:35 PM, Eugenio Pérez wrote:
> > QEMU's shadow virtqueue and VDUSE exposes these areas as read-only. If
> > we don't change it, vhost_iova_to_vva do not consider them as valid and
> > returns that they're not found.
> >
> >
On Thu, Jun 12, 2025 at 03:01:03AM +0200, Thomas Monjalon wrote:
> 05/05/2025 22:40, Andre Muezerie:
> > Existing DPDK code uses getline(), which is a POSIX function and is
> > not available in the Windows APIs.
> >
> > Instead of rewriting it or coming up with some other replacement, this
> > pat
On Thu, Jun 12, 2025 at 02:41:05AM +0200, Thomas Monjalon wrote:
> 06/05/2025 03:43, Andre Muezerie:
> > The asprintf function is not part of the C standard library but is a
> > GNU extension commonly available in Unix-like systems. It dynamically
> > allocates memory to store the formatted output
On Thu, Jun 12, 2025 at 07:17:20AM -0700, Andre Muezerie wrote:
> Array range initialization is non-standard and is not provided by
> all compilers. MSVC does not implement it and ends up emitting
> errors like the one below:
>
> drivers/net/r8169/r8169_phy.c(380):
> error C2143: syntax error:
This patch fixes a few issues which were preventing this test from
getting compiled on Windows:
1) VLAs were removed: Variable Length Arrays are not supported by MSVC.
Where possible constant C arrays were used. Where that approach was not
possible alloca() was called instead.
2) rte_os_shim is i
1 - 100 of 122 matches
Mail list logo
