Port over VLAN capabilities test suite from old DTS. This test
suite verifies that VLAN filtering, stripping, and header
insertion all function as expected. When a VLAN ID is in the
filter list, all packets with that ID should be forwarded
and all others should be dropped. While stripping is enable
Test suite for verifying VLAN filtering, stripping, and insertion
functionality on Poll Mode Driver.
Depends-on: Patch-145473 ("dts: add VLAN methods to testpmd shell")
Signed-off-by: Dean Marx
Reviewed-by: Jeremy Spewock
---
dts/framework/config/conf_yaml_schema.json | 3 +-
dts/tests/TestS
Previously when running rte_fib_lookup IPv4 addresses must have been in
host byte order.
This patch adds a new flag RTE_FIB_FLAG_LOOKUP_BE that can be passed on
fib create, which will allow to have IPv4 in network byte order on
lookup.
Signed-off-by: Vladimir Medvedkin
---
app/test/test_fib.c
Hi Maxime,
> -Original Message-
> From: Maxime Coquelin
> Sent: Tuesday, October 8, 2024 12:52 AM
> To: Vargas, Hernan ; dev@dpdk.org;
> gak...@marvell.com; t...@redhat.com
> Cc: Chautru, Nicolas ; Zhang, Qi Z
>
> Subject: Re: [PATCH v2 05/10] baseband/acc: enhance SW ring alignment
>
On Tue, 8 Oct 2024 17:16:05 +
Vladimir Medvedkin wrote:
> Previously when running rte_fib_lookup IPv4 addresses must have been in
> host byte order.
>
> This patch adds a new flag RTE_FIB_FLAG_LOOKUP_BE that can be passed on
> fib create, which will allow to have IPv4 in network byte order
> -Original Message-
> From: Stephen Hemminger
> Sent: Tuesday, October 8, 2024 11:09 PM
> To: Kusztal, ArkadiuszX
> Cc: dev@dpdk.org; gak...@marvell.com; Dooley, Brian
>
> Subject: Re: [PATCH v4 2/4] cryptodev: add ec points to sm2 op
>
> On Tue, 8 Oct 2024 21:00:50 +
> "Kusztal
Queue start/stop suite ensures the Poll Mode Driver can functionally
enable and disable Rx/Tx queues on ports. The suite contains two test
cases:
1. All queues enabled - verifies that packets are received when all
queues on all ports are enabled.
2. Queue start/stop - verifies that packets are not
This suite tests the ability of the Poll Mode Driver to enable
and disable Rx/Tx queues on a port.
Depends-on: patch-12 ("dts: add port queue modification
and forwarding stats to testpmd")
Signed-off-by: Dean Marx
Reviewed-by: Jeremy Spewock
---
dts/framework/config/conf_yaml_schema.json |
> We have been working on optimizing the latency of calls to
> rte_eth_dev_start(), on ports spawned by mlx5 PMD. Most of the work
> requires changes in the implementation of
> .dev_start() PMD callback, but I also wanted to start a discussion
> regarding configuration re
This patch introduces a comprehensive refactor to the core power
management library. The primary focus is on improving modularity
and organization by relocating specific driver implementations
from the 'lib/power' directory to dedicated directories within
'drivers/power/core/*'. The adjustment of m
This patchset refactors the power management library, addressing both
core and uncore power management. The primary changes involve the
creation of dedicated directories for each driver within
'drivers/power/core/*' and 'drivers/power/uncore/*'.
This refactor significantly improves code organizati
After refactoring the power library, power management operations are now
consistently supported regardless of the operating environment, making
function pointer checks unnecessary and thus removed from applications.
v2:
- removed function pointer validation in l3fwd-power app.
Signed-off-by: Siv
On Tue, 8 Oct 2024 17:55:23 +
Vladimir Medvedkin wrote:
> @@ -569,7 +600,60 @@ dir24_8_free(void *p)
> {
> struct dir24_8_tbl *dp = (struct dir24_8_tbl *)p;
>
> + if (dp->dq != NULL)
> + rte_rcu_qsbr_dq_delete(dp->dq);
> +
Side note:
rte_rcu_qsbr_dq_delete should be
On Tue, Oct 8, 2024 at 4:28 AM David Marchand
wrote:
>
> This series can't be merged until the (UNH and LoongArch) CI are ready
> for such a change.
>
> TL;DR: the meson minimum version is being changed from 0.53.2 to 0.57
> in the current release.
>
> @UNH @Min Zhou
> How long would it take for
On Tue, Oct 08, 2024 at 03:49:12PM -0400, Patrick Robb wrote:
>On Tue, Oct 8, 2024 at 4:28 AM David Marchand
><[1]david.march...@redhat.com> wrote:
>
> This series can't be merged until the (UNH and LoongArch) CI are
> ready
> for such a change.
> TL;DR: the meson minim
On Tue, Oct 08, 2024 at 03:25:43PM -0400, Patrick Robb wrote:
> There is a proposed increase in the minimum meson version to .57
> This patch aligns the linux setup ci script with this change.
>
> Signed-off-by: Patrick Robb
> ---
> .ci/linux-setup.sh | 2 +-
> 1 file changed, 1 insertion(+), 1
Haha... I guess that serves as a lesson.
Thanks Bruce.
From: Jun Yang
refactor the driver code with changes in:
- multiple HW queues
- SMA single copy and SG copy
- silent mode
Signed-off-by: Jun Yang
---
doc/guides/dmadevs/dpaa2.rst |8 +
drivers/dma/dpaa2/dpaa2_qdma.c | 2208
drivers/dma/dpaa2/dpaa2
From: Jun Yang
add user configurable DMA error checks.
Signed-off-by: Jun Yang
Signed-off-by: Gagandeep Singh
---
doc/guides/dmadevs/dpaa.rst | 6 ++
drivers/dma/dpaa/dpaa_qdma.c | 135 ++-
drivers/dma/dpaa/dpaa_qdma.h | 42 ++
drivers/net/d
From: Jun Yang
ERR050757 on LS104x indicates:
For outbound PCIe read transactions, a completion buffer is used
to store the PCIe completions till the data is passed back to the
initiator. At most 16 outstanding transactions are allowed and
maximum read request is 256 bytes. The completion buffer
From: Jun Yang
add silent mode support.
Signed-off-by: Jun Yang
Signed-off-by: Gagandeep Singh
---
drivers/dma/dpaa/dpaa_qdma.c | 46
drivers/dma/dpaa/dpaa_qdma.h | 1 +
2 files changed, 42 insertions(+), 5 deletions(-)
diff --git a/drivers/dma/dpaa/dpaa
From: Jun Yang
Support copy_sg operation for scatter gather.
Signed-off-by: Jun Yang
Signed-off-by: Gagandeep Singh
---
drivers/dma/dpaa/dpaa_qdma.c | 55
drivers/dma/dpaa/dpaa_qdma.h | 10 ++-
2 files changed, 64 insertions(+), 1 deletion(-)
diff --g
From: Jun Yang
Non-prefetchable read setting in the source descriptor may be
required for targets other than local memory. Prefetchable read
setting will offer better performance for misaligned transfers
in the form of fewer transactions and should be set if possible.
This patch also fixes QDMA s
From: Jun Yang
This patch refactor the DPAA DMA driver code with changes:
- HW descriptors rename and update with details.
- update qdma engine and queue structures
- using rte_ring APIs for enqueue and dequeue.
Signed-off-by: Jun Yang
Signed-off-by: Gagandeep Singh
---
drivers/dma/dpaa/dp
From: Jun Yang
Short FD can be used for single transfer scenario which shows higher
performance than FLE.
1) Save index context in FD att field for short and FLE(NonSG).
2) Identify FD type by att of FD.
3) Force 48 bits address for source address and fle according to spec.
Signed-off-by: Jun Ya
From: Jun Yang
Include rte_pmd_dpaax_qdma.h instead of rte_pmd_dpaa2_qdma.h
and change code accordingly.
Signed-off-by: Jun Yang
---
doc/api/doxy-api-index.md | 2 +-
doc/api/doxy-api.conf.in | 2 +-
drivers/common/dpaax/meson.build | 3 +-
drivers/
From: Jun Yang
This patch improves the dpaa qdma driver and
adds dpaa_qdma_burst_capacity API which returns the
remaining space in the descriptor ring.
Signed-off-by: Jun Yang
Signed-off-by: Gagandeep Singh
---
drivers/dma/dpaa/dpaa_qdma.c | 10 ++
1 file changed, 10 insertions(+)
di
From: Jun Yang
The return value of DMA copy/sg copy should be index of
descriptor copied in success.
Signed-off-by: Jun Yang
---
drivers/dma/dpaa2/dpaa2_qdma.c | 14 +++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/dma/dpaa2/dpaa2_qdma.c b/drivers/dma/dpaa2
On 10/3/24 22:49, Hernan Vargas wrote:
Some implementation in the PMD is based on some size assumption from
the bbdev structure, which should use sizeof instead to be more future
proof in case these structures change.
Signed-off-by: Hernan Vargas
---
drivers/baseband/acc/acc_common.h | 4 +
On 10/3/24 22:49, Hernan Vargas wrote:
Calculate the aligned total size required for queue rings, ensuring that
the size is a power of two for proper memory allocation.
Signed-off-by: Hernan Vargas
---
drivers/baseband/acc/acc_common.h | 7 ---
1 file changed, 4 insertions(+), 3 delet
On Thu, Oct 3, 2024 at 5:13 PM Stephen Hemminger
wrote:
> On Thu, 3 Oct 2024 15:05:02 +0100
> Bruce Richardson wrote:
>
> > On Thu, Oct 03, 2024 at 03:26:03PM +0300, Isaac Boukris wrote:
> > > In practice, the frequency is often not a nice round number, while
> > > the estimation results are rath
On 10/3/24 22:49, Hernan Vargas wrote:
Removing soft output bypass capability due to device limitations.
It should be specified this is for VRB2 device variant.
And this should be backported, so pass Fixes tag and cc stable as it was
introduced in v23.11 LTS.
Fixes: b49fe052f9cd ("baseband
From: Jun Yang
struct {
uint64_t coreid : 4; /**--rbp.sportid / rbp.dportid*/
uint64_t pfid : 8; /**--rbp.spfid / rbp.dpfid*/
uint64_t vfen : 1; /**--rbp.svfa / rbp.dvfa*/
uint64_t vfid : 16; /**--rbp.svfid / rbp.dvfid*/
.
} pcie;
Signed-off-by: Jun Ya
From: Jun Yang
Multiple DQ storages are used among multiple cores, the single dq
storage of first union is leak if multiple storages are allocated.
It does not make sense to keep the single dq storage of union,
remove it and reuse the first dq storage of multiple storages
for this case.
Signed-o
V4 changes:
* rebased series to latest commit and patches reduced.
V3 changes:
* fix 32 bit compilation issue
V2 changes:
* fix compilation issue on ubuntu 22.04
Hemant Agrawal (1):
bus/dpaa: add port bmi stats
Jun Yang (14):
dma/dpaa2: configure route by port by PCIe port param
dma/dpaa2
From: Jun Yang
For non-SG format, the index is saved in FD with
DPAA2_QDMA_FD_ATT_TYPE_OFFSET(13) bits width.
The max descriptor number of ring is power of 2, so the
eventual max number is:
((1 << DPAA2_QDMA_FD_ATT_TYPE_OFFSET) / 2)
Signed-off-by: Jun Yang
---
drivers/dma/dpaa2/dpaa2_qdma.h |
From: Hemant Agrawal
Add BMI statistics and fixing the existing extended
statistics
Signed-off-by: Hemant Agrawal
Signed-off-by: Gagandeep Singh
---
drivers/bus/dpaa/base/fman/fman_hw.c | 65 +++-
drivers/bus/dpaa/include/fman.h | 4 +-
drivers/bus/dpaa/include/f
Due to complex ways of handling asymmetric cryptography algorithms,
capabilities may differ between hardware and software PMDs,
or even between hardware PMDs. One of the examples are algorithms that
need an additional round of hashing, like SM2.
Signed-off-by: Arkadiusz Kusztal
---
lib/cryptodev
In the case when PMD cannot support the full process of the SM2,
but elliptic curve computation only, additional fields
are needed to handle such a case.
Points C1, kP therefore were added to the SM2 crypto operation struct.
Signed-off-by: Arkadiusz Kusztal
---
lib/cryptodev/rte_crypto_asym.h |
On 10/3/24 22:49, Hernan Vargas wrote:
Configure max_queues based on the number of queue groups and numbers of
AQS per device variant.
Signed-off-by: Hernan Vargas
---
drivers/baseband/acc/rte_vrb_pmd.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
Reviewed-by: Maxime
Hi Nicolas,
On 10/7/24 18:45, Chautru, Nicolas wrote:
Hi Maxime,
-Original Message-
From: Maxime Coquelin
Sent: Monday, October 7, 2024 2:31 AM
To: Chautru, Nicolas ; Vargas, Hernan
; dev@dpdk.org; gak...@marvell.com;
t...@redhat.com
Cc: Zhang, Qi Z
Subject: Re: [PATCH v2 02/10] base
Acked-by: Arkadiusz Kusztal
> -Original Message-
> From: Kusztal, ArkadiuszX
> Sent: Monday, October 7, 2024 6:04 PM
> To: Gowrishankar Muthukrishnan ;
> dev@dpdk.org; Akhil Goyal ; Fan Zhang
>
> Cc: Anoob Joseph ; Richardson, Bruce
> ; jer...@marvell.com; Ji, Kai ;
> jack.bond-pres...@
Added an internal API for PMDs to get raw device pointer
from a device id.
Signed-off-by: Akhil Goyal
---
- resend patch for main branch separated from rvu_lf raw driver
https://patches.dpdk.org/project/dpdk/list/?series=32949
lib/rawdev/rte_rawdev_pmd.h | 24
1 file ch
This commit adds tests cases to be used when C1 or kP elliptic
curve points need to be computed.
Signed-off-by: Arkadiusz Kusztal
---
app/test/test_cryptodev_asym.c | 148 -
app/test/test_cryptodev_sm2_test_vectors.h | 112 +-
2 files c
This commit adds SM2 elliptic curve based asymmetric
encryption and decryption to the Intel QuickAssist
Technology PMD.
Signed-off-by: Arkadiusz Kusztal
---
doc/guides/cryptodevs/features/qat.ini | 1 +
doc/guides/rel_notes/release_24_11.rst | 4 +
drivers/common/qat/qat_ad
Hi graph guys,
On Sat, Sep 7, 2024 at 9:31 AM Nitin Saxena wrote:
>
> Feature arc represents an ordered list of features/protocols at a given
> networking layer. It is a high level abstraction to connect various
> rte_graph nodes, as feature nodes, and allow packets steering across
> these nodes
On 10/3/24 22:49, Hernan Vargas wrote:
Automatically reset HARQ memory to prevent errors and simplify usage.
In a way we can assume that the HARQ output operation will always
overwrite the buffer, so we can reset this from the driver to prevent
an error being reported when application fails to
On 10/3/24 22:49, Hernan Vargas wrote:
Reverting to MS1 version of the algorithm to improve MU1 fading
conditions.
Signed-off-by: Hernan Vargas
---
drivers/baseband/acc/rte_vrb_pmd.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
Reviewed-by: Maxime Coquelin
Thanks,
Maxi
On 10/3/24 22:49, Hernan Vargas wrote:
Reset only the valid bit to keep info ring data notably for dumping.
Signed-off-by: Hernan Vargas
---
drivers/baseband/acc/rte_vrb_pmd.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/baseband/acc/rte_vrb_pmd.c
b/drivers
On 10/3/24 22:49, Hernan Vargas wrote:
Cosmetic code changes.
No functional impact.
Signed-off-by: Hernan Vargas
---
drivers/baseband/acc/rte_acc100_pmd.c | 2 +-
drivers/baseband/acc/rte_vrb_pmd.c| 62 +++
2 files changed, 44 insertions(+), 20 deletions(-)
Hello Kiran,
On Thu, Aug 22, 2024 at 8:38 AM Kiran Kumar Kokkilagadda
wrote:
> > -Original Message-
> > From: pbhagavat...@marvell.com
> > Sent: Friday, August 16, 2024 8:39 PM
> > To: Jerin Jacob ; Nithin Kumar Dabilpuram
> > ; Kiran Kumar Kokkilagadda
> > ; zhirun@intel.com; Zhirun
Hello CI guys,
On Fri, Sep 20, 2024 at 2:57 PM Bruce Richardson
wrote:
>
> This patchset proposed increasing the minimum meson version to 0.57
> and makes changes to update our build files appropriately for that
> change: replacing deprecated functions, removing unnecessary version
> checks and t
> From: Stephen Hemminger [mailto:step...@networkplumber.org]
> Sent: Sunday, 29 September 2024 17.35
>
> The allocation functions take a alignment argument that
> can be useful to hint the compiler optimizer.
>
> This is supported by Gcc and Clang but only useful with
> Gcc because Clang gives w
On Fri, Sep 20, 2024 at 2:58 PM Bruce Richardson
wrote:
>
> Since minimum meson version is now 0.57 we can remove all version checks
> for versions lower than that.
>
> Signed-off-by: Bruce Richardson
> ---
> config/meson.build | 2 +-
> doc/api/meson.build | 2 +-
> drivers/meson.build | 3 ---
> > > > > +/**
> > > > > + * EdDSA operation params
> > > > > + */
> > > > > +struct rte_crypto_eddsa_op_param {
> > > > > + enum rte_crypto_asym_op_type op_type;
> > > > > + /**< Signature generation or verification */
> > > > > +
> > > > > + rte_crypto_param message;
> > > > > + /
On Tue, 8 Oct 2024 15:25:43 -0400
Patrick Robb wrote:
> There is a proposed increase in the minimum meson version to .57
> This patch aligns the linux setup ci script with this change.
>
> Signed-off-by: Patrick Robb
I wonder if we shouldn't push it to something later.
Debian stable is using
> Acked-by: Arkadiusz Kusztal
Thanks.
> With some comments.
>
> > diff --git a/drivers/crypto/openssl/rte_openssl_pmd_ops.c
> > b/drivers/crypto/openssl/rte_openssl_pmd_ops.c
> > index b7b612fc57..6f81bcb110 100644
> > --- a/drivers/crypto/openssl/rte_openssl_pmd_ops.c
> > +++ b/drivers/crypt
On Wed, 9 Oct 2024 02:23:42 +
Chengwen Feng wrote:
> The mvneta_ifnames_get() function will save 'iface' value to ifnames,
> it will out-of-bounds write if passed many iface pairs (e.g.
> 'iface=xxx,iface=xxx,...').
>
> Fixes: 4ccc8d770d3b ("net/mvneta: add PMD skeleton")
> Cc: sta...@dpdk.o
Recheck-request: loongarch-compilation
--
Just for a test, please ignore.
On Tue, 8 Oct 2024 21:00:50 +
"Kusztal, ArkadiuszX" wrote:
> Hi Stephen,
>
> > -Original Message-
> > From: Stephen Hemminger
> > Sent: Tuesday, October 8, 2024 10:46 PM
> > To: Kusztal, ArkadiuszX
> > Cc: dev@dpdk.org; gak...@marvell.com; Dooley, Brian
> >
> > Subject: Re: [PATCH
Hi Stephen,
> -Original Message-
> From: Stephen Hemminger
> Sent: Tuesday, October 8, 2024 10:46 PM
> To: Kusztal, ArkadiuszX
> Cc: dev@dpdk.org; gak...@marvell.com; Dooley, Brian
>
> Subject: Re: [PATCH v4 2/4] cryptodev: add ec points to sm2 op
>
> On Tue, 8 Oct 2024 19:14:31 +0100
On 10/4/2024 2:05 AM, Joshua Washington wrote:
> Without memory barriers, there is no guarantee that the CPU will
> actually wait until after the descriptor has been fully written before
> loading descriptor data. In this case, it is possible that stale data is
> read and acted on by the driver whe
Acked-by: Chengwen Feng
On 2024/10/4 10:48, Stephen Hemminger wrote:
> From: Fidaullah Noonari
>
> when app is launched with -m proc-info exit without
> rte_eal_cleanup() causing memory leakage. This commit resolves the
> memory leakage issue and closes app properly.
>
> Bugzilla id: 898
> Sig
>
> > > 1. rte_ring_generic_pvt.h:
> > > =
> > >
> > > pseudo-c-code //related
> > > armv8 instructions
> > >
> > > --
> > >
Patrick Robb writes:
> Haha... I guess that serves as a lesson.
>
> Thanks Bruce.
Probably worth it to try that patch out and add your tested-by tag :)
On 10/7/2024 8:33 PM, Serhii Iliushyk wrote:
> @@ -682,7 +682,7 @@ static void
> qsfp28_wait_for_ready_after_reset(nim_i2c_ctx_p ctx)
> init_complete_flag_present = (data & (1 << 4)) != 0;
> }
>
> - NT_LOG(DBG, NTHW, "NIM InitCompleteFlagPresent = %d",
> init_complete_fl
Recheck-request: loongarch-compilation
--
Just for a test, please ignore.
On Monday, October 10/07/24, 2024 at 13:18:30 -0700, Stephen Hemminger wrote:
> On Thu, 13 Jun 2024 16:05:10 +0200
> David Marchand wrote:
>
> > On Thu, Jun 13, 2024 at 3:44 PM David Marchand
> > wrote:
> > >
> > > On Wed, Jun 12, 2024 at 10:16 AM David Marchand
> > > wrote:
> > > >
> > > > O
> > > 1. rte_ring_generic_pvt.h:
> > > =
> > >
> > > pseudo-c-code //related
> > > armv8 instructions
> > >
> > > --
> > > hea
The mvneta_ifnames_get() function will save 'iface' value to ifnames,
it will out-of-bounds write if passed many iface pairs (e.g.
'iface=xxx,iface=xxx,...').
Fixes: 4ccc8d770d3b ("net/mvneta: add PMD skeleton")
Cc: sta...@dpdk.org
Signed-off-by: Chengwen Feng
Acked-by: Ferruh Yigit
---
driver
On 10/7/2024 8:33 PM, Serhii Iliushyk wrote:
> The list of updates provided by the patchset:
> * Update the supported version of the FPGA to 9563.55.49
> * Fix Coverity issues
> * Fix issues related to release 24.07
> * Extended and fixed the implementation of the logging
> * Added NT flo
The rte_kvargs_process() was used to handle key=value (e.g.
socket_id=0), it also supports to handle only-key (e.g. socket_id).
But many drivers's callback can only handle key=value, it will segment
fault if handles only-key. so the patchset [1] was introduced.
Because the patchset [1] modified to
The nfp_parse_class_options() function could handle both key=value and
only-key, so it should use rte_kvargs_process_opt() instead of
rte_kvargs_process() to parse.
Signed-off-by: Chengwen Feng
---
drivers/common/nfp/nfp_common_pci.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
d
Add sfc_kvargs_process_opt() function to handle only-key case, and
remove redundancy NULL judgement of value because the rte_kvargs_process
(which invoked in sfc_kvargs_process()) will handle it.
Signed-off-by: Chengwen Feng
---
drivers/common/sfc_efx/sfc_efx.c | 3 ---
drivers/net/sfc/sfc_ethd
The rte_kvargs_process() was used to parse key-value (e.g. socket_id=0),
it also supports to parse only-key (e.g. socket_id). But many drivers's
callback can only handle key-value, it will segment fault if handles
only-key. so the patchset [1] was introduced.
Because the patchset [1] modified too
Some kvargs could be key=value or only-key, it should use
rte_kvargs_process_opt() instead of rte_kvargs_process() to handle
these kvargs.
Signed-off-by: Chengwen Feng
---
drivers/net/tap/rte_eth_tap.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/net/tap
Hi Stephen,
On 2024/10/5 9:19, Stephen Hemminger wrote:
> On Mon, 6 Nov 2023 07:31:19 +
> Chengwen Feng wrote:
>
>> The rte_kvargs_process() was used to parse key-value (e.g. socket_id=0),
>> it also supports to parse only-key (e.g. socket_id). But many drivers's
>> callback can only handle
Output debug information according to various modes.
Signed-off-by: Jun Yang
Signed-off-by: Gagandeep Singh
---
drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 72 +
1 file changed, 46 insertions(+), 26 deletions(-)
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
b/
> On Oct 9, 2024, at 00:47, Stephen Hemminger
> wrote:
>
> External email: Use caution opening links or attachments
>
>
> The pointer bdev is allocated with rte_zmalloc() and then
> incorrectly freed with free() which will lead pool corruption.
>
> Bugzilla ID: 1553
> Fixes: c19beb3f38cd ("
This patch introduces a comprehensive refactor to the core power
management library. The primary focus is on improving modularity
and organization by relocating specific driver implementations
from the 'lib/power' directory to dedicated directories within
'drivers/power/core/*'. The adjustment of m
This patch introduces driver support for power management of uncore
components in AMD EPYC processors.
v2:
- fixed typo in comments section.
- added fabric frequency get support for legacy platforms.
Signed-off-by: Sivaprasad Tummala
---
drivers/power/amd_uncore/amd_uncore.c | 328 +++
This patch refactors the power management library, addressing uncore
power management. The primary changes involve the creation of dedicated
directories for each driver within 'drivers/power/uncore/*'. The
adjustment of meson.build files enables the selective activation
of individual drivers.
This
This patchset refactors the power management library, addressing both
core and uncore power management. The primary changes involve the
creation of dedicated directories for each driver within
'drivers/power/core/*' and 'drivers/power/uncore/*'.
This refactor significantly improves code organizati
After refactoring the power library, power management operations are now
consistently supported regardless of the operating environment, making
function pointer checks unnecessary and thus removed from applications.
v2:
- removed function pointer validation in l3fwd-power app.
Signed-off-by: Siv
This patchset refactors the power management library, addressing both
core and uncore power management. The primary changes involve the
creation of dedicated directories for each driver within
'drivers/power/core/*' and 'drivers/power/uncore/*'.
This refactor significantly improves code organizati
Update maintainers for drivers/power/*.
Signed-off-by: Sivaprasad Tummala
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 812463fe9f..7d2868fe30 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1737,6 +1737,7 @@ M: Anatoly Burakov
M: David Hunt
AVX512 lookup function requires CPU to support RTE_CPUFLAG_AVX512DQ and
RTE_CPUFLAG_AVX512BW. Add runtime checks of these two flags when deciding
if vector function can be used.
Fixes: c3e12e0f0354 ("fib: add dataplane algorithm for IPv6")
Cc: sta...@dpdk.org
Signed-off-by: Vladimir Medvedkin
--
On 9/17/24 13:36, David Marchand wrote:
On Wed, Sep 11, 2024 at 9:32 PM Maxime Coquelin
wrote:
This patch introduces uAPI headers import into the DPDK
repository. This import is possible thanks to Linux Kernel
licence exception for syscalls:
https://git.kernel.org/pub/scm/linux/kernel/git/
>-Original Message-
>From: Stephen Hemminger
>Sent: Tuesday, October 8, 2024 6:11 AM
>To: Ankur Dwivedi
>Cc: dev@dpdk.org; tho...@monjalon.net; Jerin Jacob
>Subject: [EXTERNAL] Re: [PATCH v6 0/2] devtools: add tracepoint check in
>checkpatch
>
>On Wed, 17 Jul 2024 12: 09: 53 + Ank
The mvneta_ifnames_get() function will save 'iface' value to ifnames,
it will out-of-bounds write if passed many iface pairs (e.g.
'iface=xxx,iface=xxx,...').
Fixes: 4ccc8d770d3b ("net/mvneta: add PMD skeleton")
Cc: sta...@dpdk.org
Signed-off-by: Chengwen Feng
Acked-by: Ferruh Yigit
---
v2: ad
Reviewed-by: Hemant Agrawal
On 08-10-2024 13:10, Akhil Goyal wrote:
Added an internal API for PMDs to get raw device pointer
from a device id.
Signed-off-by: Akhil Goyal
---
- resend patch for main branch separated from rvu_lf raw driver
https://patches.dpdk.org/project/dpdk/list/?series=329
Current MEV TS IPU support FW version 1.6. Hence,
updating the same in documentation
Signed-off-by: Soumyadeep Hore
---
doc/guides/nics/cpfl.rst | 2 ++
1 file changed, 2 insertions(+)
diff --git a/doc/guides/nics/cpfl.rst b/doc/guides/nics/cpfl.rst
index 69eabf5616..154201e745 100644
--- a/doc
Hi lads,
Looking at rte_ring move_head functions I noticed that all of them
use slightly different approach to guarantee desired order of memory accesses:
1. rte_ring_generic_pvt.h:
=
pseudo-c-code //related armv8
instructions
--
> 1. rte_ring_generic_pvt.h:
> =
>
> pseudo-c-code //related armv8
> instructions
>
> --
> head.load()
>
> lda can be replaced with ldapr (LDA with release consistency - processor
> consistency) which is more performant as lda is allowed to rise above stlr.
> Can
> be done with -mcpu=+rcpc
>
Correction: lapr is allowed to rise above stlr.
-- wathsala
On Thu, Sep 19, 2024 at 10:02 AM Bruce Richardson
wrote:
> > I was then surprised to read the result:
> > ...
> > 2024-09-19T07:22:12.6485260Z Checking for size of "void *" : 8
> > 2024-09-19T07:22:12.6485592Z Checking for size of "void *" : 8
> > ...
> >
> >
> > *scratch* *scratch*
> > So I retes
On Tue, Oct 1, 2024 at 1:19 PM Bruce Richardson
wrote:
>
> The meson code to detect CPU and compiler support for AVX512 was duplicated
> across multiple drivers. Do all detection in just a single place to simplify
> the code.
>
> v2: ensure that target_has_avx512 is always defined on x86 to fix bu
On Mon, 12 Aug 2024 15:31:24 +0800
Yong Zhang wrote:
> diff --git a/doc/guides/rawdevs/zxdh.rst b/doc/guides/rawdevs/zxdh.rst
> new file mode 100644
> index 00..fa7ada1004
> --- /dev/null
> +++ b/doc/guides/rawdevs/zxdh.rst
> @@ -0,0 +1,30 @@
> +.. SPDX-License-Identifier: BSD-3-Clause
>
On Tue, Oct 8, 2024 at 12:03 PM Bruce Richardson
wrote:
>
> On Tue, Oct 08, 2024 at 10:49:39AM +0200, David Marchand wrote:
> > On Tue, Oct 1, 2024 at 1:19 PM Bruce Richardson
> > wrote:
> > >
> > > The meson code to detect CPU and compiler support for AVX512 was
> > > duplicated
> > > across mu
On Tue, Oct 08, 2024 at 01:33:16PM +0200, David Marchand wrote:
> On Tue, Oct 8, 2024 at 12:03 PM Bruce Richardson
> wrote:
> >
> > On Tue, Oct 08, 2024 at 10:49:39AM +0200, David Marchand wrote:
> > > On Tue, Oct 1, 2024 at 1:19 PM Bruce Richardson
> > > wrote:
> > > >
> > > > The meson code to
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