Re: [dpdk-dev] mlx5 vxlan match filter vni endianness

2017-04-06 Thread Legacy, Allain
> -Original Message- > From: Nélio Laranjeiro [mailto:nelio.laranje...@6wind.com] > Sent: Thursday, April 06, 2017 10:43 AM <...> > You are facing some kind of issue? Ok, thanks for the clarification. No, I am no longer experiencing an issue... the problem was between the keyboard and t

Re: [dpdk-dev] mlx5 vxlan match filter vni endianness

2017-04-06 Thread Nélio Laranjeiro
On Wed, Apr 05, 2017 at 08:23:35PM +, Legacy, Allain wrote: > Hi, > None of the comments in the rte_flow.h file (or the programmers guide) > specify what endianness should be applied to spec/mask fields. Based > on the testing I have done so far using a CX4 device (mlx5 driver) > fields like V

[dpdk-dev] mlx5 vxlan match filter vni endianness

2017-04-05 Thread Legacy, Allain
Hi, None of the comments in the rte_flow.h file (or the programmers guide) specify what endianness should be applied to spec/mask fields. Based on the testing I have done so far using a CX4 device (mlx5 driver) fields like VLAN ID and UDP ports are expected in network byte order. There seems t