Fix in v7, thanks
On 2021/5/24 18:03, Ruifeng Wang wrote:
>> -Original Message-
>> From: fengchengwen
>> Sent: Monday, May 24, 2021 4:44 PM
>> To: Ruifeng Wang ; tho...@monjalon.net;
>> ferruh.yi...@intel.com
>> Cc: dev@dpdk.org; jer...@marvell.com; vikto...@rehivetech.com;
>> bruce.richa
> -Original Message-
> From: fengchengwen
> Sent: Monday, May 24, 2021 4:44 PM
> To: Ruifeng Wang ; tho...@monjalon.net;
> ferruh.yi...@intel.com
> Cc: dev@dpdk.org; jer...@marvell.com; vikto...@rehivetech.com;
> bruce.richard...@intel.com; Honnappa Nagarahalli
> ; jerinjac...@gmail.com;
>
On 2021/5/24 13:38, Ruifeng Wang wrote:
>> -Original Message-
>> From: fengchengwen
>> Sent: Friday, May 21, 2021 2:53 PM
>> To: Ruifeng Wang ; tho...@monjalon.net;
>> ferruh.yi...@intel.com
>> Cc: dev@dpdk.org; jer...@marvell.com; vikto...@rehivetech.com;
>> bruce.richard...@intel.com;
> -Original Message-
> From: fengchengwen
> Sent: Friday, May 21, 2021 2:53 PM
> To: Ruifeng Wang ; tho...@monjalon.net;
> ferruh.yi...@intel.com
> Cc: dev@dpdk.org; jer...@marvell.com; vikto...@rehivetech.com;
> bruce.richard...@intel.com; Honnappa Nagarahalli
> ; jerinjac...@gmail.com;
>
On 2021/5/21 13:21, Ruifeng Wang wrote:
>> -Original Message-
>> From: fengchengwen
>> Sent: Thursday, May 20, 2021 6:55 PM
>> To: Ruifeng Wang ; tho...@monjalon.net;
>> ferruh.yi...@intel.com
>> Cc: dev@dpdk.org; jer...@marvell.com; vikto...@rehivetech.com;
>> bruce.richard...@intel.co
> -Original Message-
> From: fengchengwen
> Sent: Thursday, May 20, 2021 6:55 PM
> To: Ruifeng Wang ; tho...@monjalon.net;
> ferruh.yi...@intel.com
> Cc: dev@dpdk.org; jer...@marvell.com; vikto...@rehivetech.com;
> bruce.richard...@intel.com; Honnappa Nagarahalli
> ; jerinjac...@gmail.com;
On 2021/5/20 16:24, Ruifeng Wang wrote:
>> -Original Message-
>> From: Chengwen Feng
>> Sent: Wednesday, May 19, 2021 9:26 PM
>> To: tho...@monjalon.net; ferruh.yi...@intel.com
>> Cc: dev@dpdk.org; jer...@marvell.com; Ruifeng Wang
>> ; vikto...@rehivetech.com;
>> bruce.richard...@intel.
> -Original Message-
> From: Chengwen Feng
> Sent: Wednesday, May 19, 2021 9:26 PM
> To: tho...@monjalon.net; ferruh.yi...@intel.com
> Cc: dev@dpdk.org; jer...@marvell.com; Ruifeng Wang
> ; vikto...@rehivetech.com;
> bruce.richard...@intel.com; Honnappa Nagarahalli
> ; jerinjac...@gmail.co
On 5/20/2021 2:11 AM, fengchengwen wrote:
>
>
> On 2021/5/19 23:02, Ferruh Yigit wrote:
>> On 5/19/2021 2:25 PM, Chengwen Feng wrote:
>>> Currently, the SVE code is compiled only when -march supports SVE
>>> (e.g. '-march=armv8.2a+sve'), there maybe some problem[1] with this
>>> approach.
>>>
>>>
On 2021/5/19 23:02, Ferruh Yigit wrote:
> On 5/19/2021 2:25 PM, Chengwen Feng wrote:
>> Currently, the SVE code is compiled only when -march supports SVE
>> (e.g. '-march=armv8.2a+sve'), there maybe some problem[1] with this
>> approach.
>>
>> The solution:
>> a. If the minimum instruction set s
On 5/19/2021 2:25 PM, Chengwen Feng wrote:
> Currently, the SVE code is compiled only when -march supports SVE
> (e.g. '-march=armv8.2a+sve'), there maybe some problem[1] with this
> approach.
>
> The solution:
> a. If the minimum instruction set support SVE then compiles it.
> b. Else if the comp
Currently, the SVE code is compiled only when -march supports SVE
(e.g. '-march=armv8.2a+sve'), there maybe some problem[1] with this
approach.
The solution:
a. If the minimum instruction set support SVE then compiles it.
b. Else if the compiler support SVE then compiles it.
c. Otherwise don't com
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