IMO, this can be merged into 4/6.
> -Original Message-
> From: Ruifeng Wang
> Sent: Thursday, July 11, 2019 10:09 PM
> To: vladimir.medved...@intel.com; bruce.richard...@intel.com
> Cc: dev@dpdk.org; Honnappa Nagarahalli ;
> Gavin Hu (Arm Technology China) ; nd ;
> Ruifeng Wang (Arm Techn
The table entries were updated field by field. There were two issues:
1. bitwise operations are read-modify-write sequences and not atomic,
nor efficient.
2. the above non-atomic operations causes entries out of synchronization
and inconsistency.
This patch combines the fields into a one-go 3
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