Hi Konstantin,
> -Original Message-
> From: Ananyev, Konstantin
> Sent: Friday, March 22, 2019 2:43 AM
> To: Joyce Kong (Arm Technology China) ;
> dev@dpdk.org
> Cc: nd ; jer...@marvell.com; chao...@linux.vnet.ibm.com;
> Richardson, Bruce ; tho...@monjalon.net;
> hemant.agra...@nxp.com; H
> -Original Message-
> From: Joyce Kong [mailto:joyce.k...@arm.com]
> Sent: Wednesday, March 20, 2019 6:25 AM
> To: dev@dpdk.org
> Cc: n...@arm.com; jer...@marvell.com; Ananyev, Konstantin
> ; chao...@linux.vnet.ibm.com; Richardson,
> Bruce ; tho...@monjalon.net;
> hemant.agra...@nxp.c
The __sync builtin based implementation generates full memory
barriers ('dmb ish') on Arm platforms. Using C11 atomic builtins
to generate one way barriers.
Here is the assembly code of __sync_compare_and_swap builtin.
__sync_bool_compare_and_swap(dst, exp, src);
0x0090f1b0 <+16>:e0
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