> >>> Currently, the SVE code is compiled only when -march supports SVE
> >>> (e.g. '- march=armv8.2a+sve'), there maybe some problem[1] with this
> >> approach.
> >>>
> >>> The solution:
> >>> a. If the minimum instruction set support SVE then compiles it.
> >>> b. Else if the compiler support S
On Wed, May 12, 2021 at 11:12:36PM +, Honnappa Nagarahalli wrote:
>
>
> >
> > Currently, the SVE code is compiled only when -march supports SVE (e.g. '-
> > march=armv8.2a+sve'), there maybe some problem[1] with this approach.
> >
> > The solution:
> > a. If the minimum instruction set supp
On 2021/5/13 7:21, Honnappa Nagarahalli wrote:
>
>
>>
>>>
>>> Currently, the SVE code is compiled only when -march supports SVE
>>> (e.g. '- march=armv8.2a+sve'), there maybe some problem[1] with this
>> approach.
>>>
>>> The solution:
>>> a. If the minimum instruction set support SVE then com
>
> >
> > Currently, the SVE code is compiled only when -march supports SVE
> > (e.g. '- march=armv8.2a+sve'), there maybe some problem[1] with this
> approach.
> >
> > The solution:
> > a. If the minimum instruction set support SVE then compiles it.
> > b. Else if the compiler support SVE then
>
> Currently, the SVE code is compiled only when -march supports SVE (e.g. '-
> march=armv8.2a+sve'), there maybe some problem[1] with this approach.
>
> The solution:
> a. If the minimum instruction set support SVE then compiles it.
> b. Else if the compiler support SVE then compiles it.
> c.
Currently, the SVE code is compiled only when -march supports SVE
(e.g. '-march=armv8.2a+sve'), there maybe some problem[1] with this
approach.
The solution:
a. If the minimum instruction set support SVE then compiles it.
b. Else if the compiler support SVE then compiles it.
c. Otherwise don't com
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