H
>> ; Stillwell Jr, Paul M
>>
>> Subject: Re: [dpdk-dev] [PATCH 04/28] net/ice/base: read PSM clock frequency
>> from register
>>
>> On 09/03/2020 11:43, Qi Zhang wrote:
>>> Read the GLGEN_CLKSTAT_SRC register to determine which PSM clock
>>
Hi Kevin:
> -Original Message-
> From: Kevin Traynor
> Sent: Monday, March 9, 2020 11:45 PM
> To: Zhang, Qi Z ; Yang, Qiming
> ; Xing, Beilei
> Cc: Ye, Xiaolong ; dev@dpdk.org; Shelton, Benjamin H
> ; Stillwell Jr, Paul M
>
> Subject: Re: [dpdk-dev] [PATCH 04
On 09/03/2020 11:43, Qi Zhang wrote:
> Read the GLGEN_CLKSTAT_SRC register to determine which PSM clock
> frequency is selected. This ensures that the rate limiter profile
> calculations will be correct.
>
This seems to be a fix whereby a default and possibly incorrect
frequency was used previou
Read the GLGEN_CLKSTAT_SRC register to determine which PSM clock
frequency is selected. This ensures that the rate limiter profile
calculations will be correct.
Signed-off-by: Ben Shelton
Signed-off-by: Paul M Stillwell Jr
Signed-off-by: Qi Zhang
---
drivers/net/ice/base/ice_common.c | 1 +
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