26/12/2019 02:46, Wu, Jingjing:
> From: Li, Xiaoyun
> > All buffers and ring info should be written before tail register update.
> > This patch relocates the write memory barrier before updating tail register
> > to avoid potential issues.
> >
> > Fixes: 11b5c7daf019 ("raw/ntb: add enqueue and de
> -Original Message-
> From: Li, Xiaoyun
> Sent: Wednesday, December 4, 2019 11:19 PM
> To: Wu, Jingjing
> Cc: dev@dpdk.org; Li, Xiaoyun ; sta...@dpdk.org
> Subject: [PATCH] raw/ntb: fix write memory barrier issue
>
> All buffers and ring info should be written before tail register up
Reviewed-by: Gavin Hu
[dpdk-dev] [PATCH] raw/ntb: fix write memory barrier issue
>
> Hi Xiaoyun,
>
> > -Original Message-
> > From: dev On Behalf Of Xiaoyun Li
> > Sent: Wednesday, December 4, 2019 11:19 PM
> > To: jingjing...@intel.com
> > Cc: dev@dpdk.org; Xiaoyun Li
Hi Xiaoyun,
> -Original Message-
> From: dev On Behalf Of Xiaoyun Li
> Sent: Wednesday, December 4, 2019 11:19 PM
> To: jingjing...@intel.com
> Cc: dev@dpdk.org; Xiaoyun Li ; sta...@dpdk.org
> Subject: [dpdk-dev] [PATCH] raw/ntb: fix write memory barrier issue
>
&
All buffers and ring info should be written before tail register update.
This patch relocates the write memory barrier before updating tail register
to avoid potential issues.
Fixes: 11b5c7daf019 ("raw/ntb: add enqueue and dequeue functions")
Cc: sta...@dpdk.org
Signed-off-by: Xiaoyun Li
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