07/11/2018 12:47, Ferruh Yigit:
> On 11/7/2018 10:14 AM, Burakov, Anatoly wrote:
> > On 07-Nov-18 9:44 AM, Alejandro Lucero wrote:
> >> Current code has different max DMA mask width values for 32 and 64
> >> bits systems. IOMMU hardware could report a higher supported width
> >> than current MAX_DM
On 11/7/2018 10:14 AM, Burakov, Anatoly wrote:
> On 07-Nov-18 9:44 AM, Alejandro Lucero wrote:
>> Current code has different max DMA mask width values for 32 and 64
>> bits systems. IOMMU hardware could report a higher supported width
>> than current MAX_DMA_MASK_BITS when RTE_ARCH_64 is not define
On 07-Nov-18 9:44 AM, Alejandro Lucero wrote:
Current code has different max DMA mask width values for 32 and 64
bits systems. IOMMU hardware could report a higher supported width
than current MAX_DMA_MASK_BITS when RTE_ARCH_64 is not defined. This
is actually true with a 32 bits kernel running i
Current code has different max DMA mask width values for 32 and 64
bits systems. IOMMU hardware could report a higher supported width
than current MAX_DMA_MASK_BITS when RTE_ARCH_64 is not defined. This
is actually true with a 32 bits kernel running in a 64 bits server
with IOMMU hardware. This cou
4 matches
Mail list logo