nzhuo
> > Subject: [dpdk-dev] [PATCH] igb: fix crash with offload on 82575 chipset
> >
> > On the 82575 chipset, there is a pool of global TX contexts instead of 2
> > per queues on 82576. See Table A-1 "Changes in Programming Interface
> > Relative to 82575"
> -Original Message-
> From: dev [mailto:dev-bounces at dpdk.org] On Behalf Of Olivier Matz
> Sent: Friday, March 25, 2016 10:32 AM
> To: dev at dpdk.org
> Cc: Lu, Wenzhuo
> Subject: [dpdk-dev] [PATCH] igb: fix crash with offload on 82575 chipset
>
> On the 8
On the 82575 chipset, there is a pool of global TX contexts instead of 2
per queues on 82576. See Table A-1 "Changes in Programming Interface
Relative to 82575" of Intel? 82576EB GbE Controller datasheet (*).
In the driver, the contexts are attributed to a TX queue: 0-1 for txq0,
2-3 for txq1, and
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