28/04/2017 04:14, Jianbo Liu:
> On 27 April 2017 at 00:29, Jerin Jacob wrote:
> > armv8 implementations may have 64B or 128B cache line.
> > Setting to the maximum available cache line size in generic config to
> > address minimum DMA alignment across all arm64 implementations.
> >
> > Increasing
-Original Message-
> Date: Fri, 28 Apr 2017 10:14:11 +0800
> From: Jianbo Liu
> To: Jerin Jacob
> Cc: dev@dpdk.org, tho...@monjalon.net, Hemant Agrawal
> , christian.ehrha...@canonical.com
> Subject: Re: [dpdk-dev] [PATCH] config: set cache line as 128B in the
>
Hi Jerin,
On Wednesday 26 April 2017 09:59 PM, Jerin Jacob wrote:
> armv8 implementations may have 64B or 128B cache line.
> Setting to the maximum available cache line size in generic config to
> address minimum DMA alignment across all arm64 implementations.
>
> Increasing the cacheline size ha
On 27 April 2017 at 00:29, Jerin Jacob wrote:
> armv8 implementations may have 64B or 128B cache line.
> Setting to the maximum available cache line size in generic config to
> address minimum DMA alignment across all arm64 implementations.
>
> Increasing the cacheline size has no negative impact
armv8 implementations may have 64B or 128B cache line.
Setting to the maximum available cache line size in generic config to
address minimum DMA alignment across all arm64 implementations.
Increasing the cacheline size has no negative impact to cache invalidation
on systems with a smaller cache li
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