On 9/29/2022 7:19 AM, Feifei Wang wrote:
-邮件原件-
发件人: Feifei Wang
发送时间: Tuesday, September 27, 2022 10:48 AM
抄送: dev@dpdk.org; nd ; Feifei Wang
主题: [PATCH v2 0/3] Direct re-arming of buffers on receive side
Currently, the transmit side frees the buffers into the lcore cache and the
> -邮件原件-
> 发件人: Feifei Wang
> 发送时间: Tuesday, September 27, 2022 10:48 AM
> 抄送: dev@dpdk.org; nd ; Feifei Wang
>
> 主题: [PATCH v2 0/3] Direct re-arming of buffers on receive side
>
> Currently, the transmit side frees the buffers into the lcore cache and the
Currently, the transmit side frees the buffers into the lcore cache and
the receive side allocates buffers from the lcore cache. The transmit
side typically frees 32 buffers resulting in 32*8=256B of stores to
lcore cache. The receive side allocates 32 buffers and stores them in
the receive side so
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