eca_cryptodev_cdev_flush() is internal function and called with
valid range of cdevs.
crypto_cdev_info structure is allocated at adapter creation time
and retrieved from the adapter for a valid cdevs which cannot be NULL
and hence no need for NULL check.
Fixes: 2ae84b39ae7b ("eventdev/crypto: sto
Hi Kevin,
> -Original Message-
> From: Kevin Traynor
> Sent: Tuesday, February 22, 2022 3:39 PM
> To: Jerin Jacob ; Jayatheerthan, Jay
>
> Cc: Weiguo Li ; Kundapura, Ganapati
> ; Naga Harish K, S V
> ; step...@networkplumber.org; dev@dpdk.org
> Subject: Re: [PATCH v6] eventdev/eth_rx: fi
> From: Stephen Hemminger [mailto:step...@networkplumber.org]
> Sent: Tuesday, 22 February 2022 17.03
>
> On Tue, 22 Feb 2022 15:13:53 +0100
> Morten Brørup wrote:
>
> > > From: Megha Ajmera [mailto:megha.ajm...@intel.com]
> > > Sent: Tuesday, 22 February 2022 14.19
> > >
> > > Masking of core m
Cast 1 to type uint64_t to avoid overflow.
CID 375812 (#1 of 1):
Unintentional integer overflow (OVERFLOW_BEFORE_WIDEN)
overflow_before_widen: Potentially overflowing expression 1 << 2 * i + 1
with type int (32 bits, signed) is evaluated using 32-bit arithmetic, and
then used in a context that exp
For indexed pool with local cache, when a new trunk is allocated,
half of the trunk's index was fetched to the local cache. In case
of local cache size was less then half of the trunk size, memory
overlap happened.
This commit adds the check of the fetch size, if local cache size
is less than fetc
Question for stable maintainers.
DTS WG would like this patch to be merged in 21.11 and 20.11 stable releases
even though it is not a bug fix. This allows for a single DTS version to be
used with both those stable releases and master.
Do you have any objections?
Thank you,
Honnappa
> -O
Make RX and TX queue sizes configurable from the command line.
This helps DTS write better test cases.
Signed-off-by: Honnappa Nagarahalli
Reviewed-by: Kathleen Capella
Reviewed-by: Ruifeng Wang
Acked-by: Bruce Richardson
---
examples/l3fwd/main.c | 54
nb_rxd and nb_txd are used in polling mode and event mode of
operation. nb_rxd and nb_txd are already global in polling mode
but are not visible to event mode code. Make them visible to all
parts of the application.
Signed-off-by: Honnappa Nagarahalli
Reviewed-by: Kathleen Capella
Reviewed-by: R
Add testpmd support for the rte_flow_async_action_handle API.
Provide the command line interface for operations dequeue.
Usage example:
flow queue 0 indirect_action 0 create action_id 9
ingress postpone yes action rss / end
flow queue 0 indirect_action 0 update action_id 9
action queue
Add testpmd support for the rte_flow_pull API.
Provide the command line interface for pulling operations results.
Usage example: flow pull 0 queue 0
Signed-off-by: Alexander Kozyrev
Acked-by: Ori Kam
---
app/test-pmd/cmdline_flow.c | 56 +++-
app/test-pmd/config.c
Add testpmd support for the rte_flow_push API.
Provide the command line interface for pushing operations.
Usage example: flow queue 0 push 0
Signed-off-by: Alexander Kozyrev
Acked-by: Ori Kam
---
app/test-pmd/cmdline_flow.c | 56 -
app/test-pmd/config.c
Add testpmd support for the rte_flow_table API.
Provide the command line interface for the flow
table creation/destruction. Usage example:
testpmd> flow template_table 0 create table_id 6
group 9 priority 4 ingress mode 1
rules_number 64 pattern_template 2 actions_template 4
testpmd> fl
Add testpmd support for the rte_flow_q_create/rte_flow_q_destroy API.
Provide the command line interface for enqueueing flow
creation/destruction operations. Usage example:
testpmd> flow queue 0 create 0 postpone no
template_table 6 pattern_template 0 actions_template 0
patt
Add testpmd support for the rte_flow_configure API.
Provide the command line interface for the Flow management.
Usage example: flow configure 0 queues_number 8 queues_size 256
Implement rte_flow_info_get API to get available resources:
Usage example: flow info 0
Signed-off-by: Alexander Kozyrev
Add testpmd support for the rte_flow_pattern_template and
rte_flow_actions_template APIs. Provide the command line interface
for the template creation/destruction. Usage example:
testpmd> flow pattern_template 0 create pattern_template_id 2
template eth dst is 00:16:3e:31:15:c3 / end
Queue-based flow rules management mechanism is suitable
not only for flow rules creation/destruction, but also
for speeding up other types of Flow API management.
Indirect action object operations may be executed
asynchronously as well. Provide async versions for all
indirect action operations, nam
A new, faster, queue-based flow rules management mechanism is needed for
applications offloading rules inside the datapath. This asynchronous
and lockless mechanism frees the CPU for further packet processing and
reduces the performance impact of the flow rules creation/destruction
on the datapath.
Treating every single flow rule as a completely independent and separate
entity negatively impacts the flow rules insertion rate. Oftentimes in an
application, many flow rules share a common structure (the same item mask
and/or action list) so they can be grouped and classified together.
This knowl
The flow rules creation/destruction at a large scale incurs a performance
penalty and may negatively impact the packet processing when used
as part of the datapath logic. This is mainly because software/hardware
resources are allocated and prepared during the flow rule creation.
In order to optimi
Three major changes to a generic RTE Flow API were implemented in order
to speed up flow rule insertion/destruction and adapt the API to the
needs of a datapath-focused flow rules management applications:
1. Pre-configuration hints.
Application may give us some hints on what type of resources are
> -Original Message-
> From: Zhang, RobinX
> Sent: Wednesday, February 16, 2022 3:45 PM
> To: dev@dpdk.org
> Cc: Yang, Qiming ; Zhang, Qi Z
> ; Guo, Junfeng ; Yang, SteveX
> ; Zhang, RobinX
> Subject: [PATCH v2] net/ice/base: support E824S and E825 devices
>
> Add support for E824S an
On Tue, Feb 22, 2022 at 10:18 AM Weiguo Li wrote:
>
> This series fix some memory leaks in error handling.
>
> I write a coccinelle script to detect these issues, and
> fix them after exclude a small number of false positives.
>
> FYI, the script is as follows:
> //
> // Find possible memory leaks
When both shared and non-shared RSS actions were present in single
flow rule shared RSS index was unset by mistake.
For example:
1. flow indirect_action 0 create action_id 3 ingress action RSS ...
2. set sample_actions 0 mark id 43690 / queue index 0 / end
3. flow create 0 ingress group 107 patter
On 2/22/2022 10:24 PM, Ferruh Yigit wrote:
On 2/22/2022 6:11 PM, Michal Krawczyk wrote:
From: Stanislaw Kardach
Due to how the ena_com compatibility layer is written, all AQ commands
triggering functions use stack to save results of AQ and then copy them
to user given function.
Therefore to ke
This patch adds the SGL out of place support to QAT PMD
Signed-off-by: Kai Ji
Acked-by: Fan Zhang
---
drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c | 28 --
drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c | 14 -
drivers/crypto/qat/dev/qat_sym_pmd_gen1.c| 55 +---
3
This patch unifies QAT's raw dp api implementations
to the same enqueue/dequeue methods used in crypto operations.
The specific functions for different QAT generation are updated
respectively. The qat_sym_hw_dp.c is removed as no longer required.
Signed-off-by: Kai Ji
Acked-by: Fan Zhang
---
dr
This patch enable the op_build_request function in
qat_enqueue_op_burst, and the qat_dequeue_process_response
function in qat_dequeue_op_burst.
The op_build_request invoked in crypto build request op is based
on crypto operations setup'd during session init.
Signed-off-by: Kai Ji
Acked-by: Fan Zh
This patch removes qat_asym_pmd.c and integrates all the
functions into qat_asym.c. The unified/integrated asym crypto
pmd functions should make them easier to maintain.
Signed-off-by: Kai Ji
Acked-by: Fan Zhang
---
drivers/common/qat/meson.build| 2 +-
drivers/crypto/qat/qat_asym.c |
This patch removes qat_sym_pmd.c and integrates all the functions into
qat_sym.c. The unified/integrated qat sym crypto pmd functions should
make them easier to maintain.
Signed-off-by: Kai Ji
Acked-by: Fan Zhang
---
drivers/common/qat/meson.build | 4 +-
drivers/common/qat/qat_device.c
This patch reworks the asymmetric crypto data path
implementation in QAT driver. The changes include asymmetric
crypto data path separation for QAT hardware generations, and
code optimisation of the device capabilities declaration.
Signed-off-by: Kai Ji
Acked-by: Fan Zhang
---
drivers/common/qa
This patch introduces a set of set_session methods to QAT
generations. In addition, the reuse of QAT session between
generations is prohibit as the support of min_qat_dev_gen_id'
is removed.
Signed-off-by: Kai Ji
Acked-by: Fan Zhang
---
drivers/crypto/qat/dev/qat_asym_pmd_gen1.c | 9 +-
dri
This patch adds common inline functions for QAT symmetric
crypto driver to process crypto op, and the implementation of
build op request function for QAT generation 1.
Signed-off-by: Kai Ji
Acked-by: Fan Zhang
---
drivers/crypto/qat/dev/qat_crypto_pmd_gens.h | 832 ++-
drivers/c
This patch introduce build request and dequeue op function
pointers to the qat queue pair implementation. The function
poniters are assigned during qat session generation based on input
crypto operation request.
Signed-off-by: Kai Ji
Acked-by: Fan Zhang
---
drivers/common/qat/qat_qp.c
v11 - v12:
- fixed a compile issue
v10:
- rebase to the lastest for-main
- fix of build rerror when RTE_LOG_DEBUG enabled
v9:
- commit messages reword
- fix of unused function error
v8:
- rebase to 22.03-rc1
v7:
- fix of pointer cast compile error in x86
v6:
- fix of pointer cast error in x86
Coverity issue: 375803, 375813, 375819, 375827, 375831
The actual maximum number of gather pointers should have been limited
Fixes: 5ad5060f8f7a ("baseband/acc100: add LDPC processing functions")
Signed-off-by: Nicolas Chautru
---
drivers/baseband/acc100/rte_acc100_pmd.c | 3 +--
drivers/baseban
In the vector Tx path, the function iavf_xmit_pkts_vec_xxx compares nb_pkts
and the txq->rs_thresh and passes the minimum of these as an argument to
iavf_xmit_fixed_burst_vec_xxx. Inside iavf_xmit_fixed_burst_vec_xxx, the
same check is performed again. This patch removes the redundant check from
th
On 2/22/2022 6:11 PM, Michal Krawczyk wrote:
From: Stanislaw Kardach
Due to how the ena_com compatibility layer is written, all AQ commands
triggering functions use stack to save results of AQ and then copy them
to user given function.
Therefore to keep the compatibility layer common, introduce
On 2/22/2022 6:11 PM, Michal Krawczyk wrote:
Hi,
this set contains new ENA features:
* New xstats.
* Reconfigurable link status event.
* Usage of the optimized memcpy on arm/arm64.
* Better MP support.
* Reconfigurable Tx completion timeout value using devarg.
Beside that, this patchset contai
Add test for map and unmap external RxQs.
This patch adds to Testpmd app a runtime function to test the mapping
API.
For insert mapping use this command:
testpmd> port (port_id) ext_rxq map (rte_queue_id) (hw_queue_id)
For insert mapping use this command:
testpmd> port (port_id) ext_rxq unm
Add support queue/RSS action for external RxQ.
In indirection table creation, the queue index will be taken from
mapping array.
Signed-off-by: Michael Baum
---
doc/guides/nics/mlx5.rst | 1 +
doc/guides/rel_notes/release_22_03.rst | 6 ++
drivers/net/mlx5/mlx5.c
External queue is a queue that has been created and managed outside the
PMD. The queues owner might use PMD to generate flow rules using these
external queues.
When the queue is created in hardware it is given an ID represented by
32 bits. In contrast, the index of the queues in PMD is represented
The RxQ/TxQ control structure has a field named type. This type is enum
with values for standard and hairpin.
The use of this field is to check whether the queue is of the hairpin
type or standard.
This patch replaces it with a boolean variable that saves whether it is
a hairpin.
Signed-off-by: M
Add option to probe common device using import CTX/PD functions instead
of create functions.
This option requires accepting the context FD and the PD handle as
devargs.
This sharing can be useful for applications that use PMD for only some
operations. For example, an app that generates queues itse
Add support for rdma-core API to import device.
The API gets ibv_context file descriptor and returns an ibv_context
pointer that is associated with the given file descriptor.
Add also support for rdma-core API to import PD.
The API gets ibv_context and PD handle and returns a protection domain
(PD)
These patches add support to external Rx queues.
External queue is a queue that is managed by a process external to PMD,
but uses PMD process to generate its flow rules.
For the hardware to allow the DPDK process to set rules for it, the
process needs to use the same PD of the external process. In
From: Kai Ji
This patch adds the SGL out of place support to QAT PMD
Signed-off-by: Kai Ji
Acked-by: Fan Zhang
---
drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c | 28 --
drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c | 14 -
drivers/crypto/qat/dev/qat_sym_pmd_gen1.c| 55 +
From: Kai Ji
This patch unifies QAT's raw dp api implementations
to the same enqueue/dequeue methods used in crypto operations.
The specific functions for different QAT generation are updated
respectively. The qat_sym_hw_dp.c is removed as no longer required.
Signed-off-by: Kai Ji
Acked-by: Fan
From: Kai Ji
This patch enable the op_build_request function in
qat_enqueue_op_burst, and the qat_dequeue_process_response
function in qat_dequeue_op_burst.
The op_build_request invoked in crypto build request op is based
on crypto operations setup'd during session init.
Signed-off-by: Kai Ji
A
From: Kai Ji
This patch removes qat_asym_pmd.c and integrates all the
functions into qat_asym.c. The unified/integrated asym crypto
pmd functions should make them easier to maintain.
Signed-off-by: Kai Ji
Acked-by: Fan Zhang
---
drivers/common/qat/meson.build| 2 +-
drivers/crypto/qat/q
From: Kai Ji
This patch removes qat_sym_pmd.c and integrates all the functions into
qat_sym.c. The unified/integrated qat sym crypto pmd functions should
make them easier to maintain.
Signed-off-by: Kai Ji
Acked-by: Fan Zhang
---
drivers/common/qat/meson.build | 4 +-
drivers/common/q
From: Kai Ji
This patch reworks the asymmetric crypto data path
implementation in QAT driver. The changes include asymmetric
crypto data path separation for QAT hardware generations, and
code optimisation of the device capabilities declaration.
Signed-off-by: Kai Ji
Acked-by: Fan Zhang
---
dr
From: Kai Ji
This patch introduces a set of set_session methods to QAT
generations. In addition, the reuse of QAT session between
generations is prohibit as the support of min_qat_dev_gen_id'
is removed.
Signed-off-by: Kai Ji
Acked-by: Fan Zhang
---
drivers/crypto/qat/dev/qat_asym_pmd_gen1.c
From: Kai Ji
This patch adds common inline functions for QAT symmetric
crypto driver to process crypto op, and the implementation of
build op request function for QAT generation 1.
Signed-off-by: Kai Ji
Acked-by: Fan Zhang
---
drivers/crypto/qat/dev/qat_crypto_pmd_gens.h | 832 +++
From: Kai Ji
This patch introduce build request and dequeue op function
pointers to the qat queue pair implementation. The function
poniters are assigned during qat session generation based on input
crypto operation request.
Signed-off-by: Kai Ji
Acked-by: Fan Zhang
---
drivers/common/qat/qat
This patch reworks QAT symmetric crypto datapatch implementation where each
generation request building separated and the crypto operation under the
raw datapath api implementation are unified.
In addtion this patchset also enables QAT OOP support in raw datapath api
implementation.
v11:
- fixed
Hi Volodymyr,
Could you please rebase this series to current TOT of dpdk-next-crypto?
> Following test cases were added:
> - IPv4 TTL
> - IPv6 hop limit
> - IPv4 L4 checksum in transport mode
>
> Volodymyr Fialko (2):
> test/crypto: add TTL and hop limit decrement cases
> test/crypto: add L4
> Add support for TTL if IPv4 or hop limit if IPv6 decrement for cn10k.
>
> Signed-off-by: Volodymyr Fialko
> Acked-by: Anoob Joseph
> ---
Applied to dpdk-next-crypto
Thanks.
Add table for environment variables used by cnxk drivers.
Signed-off-by: Nithin Dabilpuram
---
doc/guides/platform/cnxk.rst | 21 +
1 file changed, 21 insertions(+)
diff --git a/doc/guides/platform/cnxk.rst b/doc/guides/platform/cnxk.rst
index 97e38c8..1cce2f9 100644
--- a/d
Add support for inline inbound SPI range via devargs
instead of just max SPI value and range being 0..max.
Signed-off-by: Nithin Dabilpuram
---
doc/guides/nics/cnxk.rst | 28 +-
drivers/common/cnxk/roc_nix.h | 5 ++-
drivers/common/cnxk/roc_nix_inl.c | 68
Add option to override outbound inline SA IV for debug
purposes via environment variable. User can set env variable as:
export CN10K_ETH_SEC_IV_OVR="0x0, 0x0,..."
Signed-off-by: Nithin Dabilpuram
---
drivers/net/cnxk/cn10k_ethdev_sec.c | 62 +
1 file changed,
Enable flow control by default on device configuration
instead of basing it on Kernel behaviour.
Signed-off-by: Nithin Dabilpuram
Signed-off-by: Harman Kalra
---
drivers/net/cnxk/cnxk_ethdev.c | 24 +++-
1 file changed, 11 insertions(+), 13 deletions(-)
diff --git a/drivers
Enable packet pool tail drop on RQ when inbound security is not
enabled. This is only part of the config. It is a NOP if
tail drop is not enabled on NPA_AURA_CTX_S. And tail drop
on packet pool AURA is enabled only when that packet pool aura
is used by inline device RQ.
Signed-off-by: Nithin Dabil
Currently meta buffers are freed in bursts of one LMT line
i.e 15 pointers. Instead free them in bursts of 16 LMTlines
which is 240 ptrs for better perf.
Also mark mempool objects as get and put in missing places.
Signed-off-by: Nithin Dabilpuram
---
drivers/event/cnxk/cn10k_worker.h | 13
Use raw mbuf free on inline security error to simulate
HW NPA free instead of doing rte_pktmbuf_free(). This
is needed as the callback will not be called from
DPDK lcore.
Fixes: 69daa9e5022b ("net/cnxk: support inline security setup for cn10k")
Cc: sta...@dpdk.org
Signed-off-by: Nithin Dabilpuram
Realloc inline dev XAQ when Rx/Tx security ie enabled with
new packet pool as XAQ should be large enough to hold all
mbufs if inline outbound reports error or all mbufs.
Signed-off-by: Nithin Dabilpuram
---
drivers/net/cnxk/cnxk_ethdev.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/d
Register callback early to handle initial error packets from
inline device.
Fixes: 69daa9e5022b ("net/cnxk: support inline security setup for cn10k")
Cc: sta...@dpdk.org
Signed-off-by: Nithin Dabilpuram
---
drivers/net/cnxk/cn10k_ethdev.c | 6 ++
drivers/net/cnxk/cn10k_ethdev.h | 3
Fix inline device rq tagmask to get packets with receive errors
as type ETHDEV packets to callback handler so that packet buffers
can get freed. Currently only ipsec denied packets get the right
tag mask.
Fixes: ee48f711f3b0 ("common/cnxk: support NIX inline inbound and outbound
setup")
Cc: sta..
From: Satha Rao
Removed roc NPC APIs which tracks addition and deletion of
mark actions. It was earlier needed to track number of mark
actions added as part of flow rules. If mark actions count
is > 0, then the function pointer for Rx would get updated
to even read mark value from CQE/WQE and pop
From: Satha Rao
Added rx_metadata_negotiate api to enable mark update RX offload.
Removed software logic to enable/disable mark update inside flow
create/destroy APIs.
Signed-off-by: Satha Rao
---
drivers/net/cnxk/cn10k_ethdev.c | 26 ++
drivers/net/cnxk/cn10k_rte_flo
Allow force use of SSO pffunc even when inline dev is available
so that in case driver needs events directly delivered to
event device.
Signed-off-by: Nithin Dabilpuram
---
drivers/common/cnxk/roc_nix.h | 1 +
drivers/common/cnxk/roc_nix_inl.c | 7 ++-
2 files changed, 7 insertions(+), 1
Enable time counter based threshold for raising SSO
EXE_INT instead of IAQ threshold. Time counter based
threshold helps getting periodic interrupts and process
pkts in burst instead of getting HW to raise an interrupt
for every new work.
Signed-off-by: Nithin Dabilpuram
---
drivers/common/cnxk/
Add support to enable AURA tail drop via RQ specifically
for inline device RQ's pkt pool. This is better than RQ
RED drop as it can be applied to all RQ's that are not
having security enabled but using same packet pool.
Signed-off-by: Nithin Dabilpuram
---
drivers/common/cnxk/roc_nix.h
From: Vidya Sagar Velumuri
Enable the field in SA to write back l2, l3 hdrs in case of errors
during inline processing.
Signed-off-by: Vidya Sagar Velumuri
---
drivers/common/cnxk/roc_ie_ot.c | 1 +
drivers/common/cnxk/roc_ie_ot.h | 3 ++-
2 files changed, 3 insertions(+), 1 deletion(-)
diff
From: Vidya Sagar Velumuri
Use common SA init API before doing initialization based on
params. This is better so that all HW specific default values
are at single place for lookaside and inline.
Signed-off-by: Vidya Sagar Velumuri
Signed-off-by: Nithin Dabilpuram
---
drivers/common/cnxk/cnxk_
From: Vidya Sagar Velumuri
Update the inline device functions to work when roc_nix is NULL.
This is required, as IPsec driver have to use these APIs to work
with inline IPsec device, but the IPsec driver might not have roc_nix
information.
Signed-off-by: Vidya Sagar Velumuri
---
drivers/common
From: Satha Rao
Provide a method to get floor values for a requested shaper rate,
which can assure packets should never be transmitted at a rate higher
than configured.
Keep the old API to get HW suggested values.
And introduce new parameter to select appropriate API.
Signed-off-by: Satha Rao
Add support to realloc inline device XAQ AURA with more
buffers of new packet pool AURA.
Signed-off-by: Nithin Dabilpuram
---
drivers/common/cnxk/roc_nix_inl.h | 1 +
drivers/common/cnxk/roc_nix_inl_dev.c | 110 +-
drivers/common/cnxk/roc_nix_inl_dev_irq
From: Satha Rao
CN10K supports up to 832 resources at SMQ level, so increase
bitmap count to 1024.
Signed-off-by: Satha Rao
---
v2:
- Addressed comments from Jerin on patches 1/20, 3/20, 7/20,
8/20, 10/20, 11/20, 15/20 and 20/20.
- Added another patch to update documentation on environment v
Hi Pablo,
> KASUMI, SNOW3G and ZUC require lengths and offsets to
> be set in bits or bytes depending on the algorithm.
> There were some algorithms that were mixing these two,
> so this commit is fixing this issue.
>
> Fixes: ae8e085c608d ("crypto/aesni_mb: support KASUMI F8/F9")
> Fixes: 6c42e0
> This patch fixes misspelled RTE_RSA_KEY_TYPE_QT,
> this will prevent checkpach from complaining wherever
> change to RSA is being made.
>
> Fixes: 26008aaed14c ("cryptodev: add asymmetric xform and op definitions")
>
> Signed-off-by: Arek Kusztal
> ---
> v2:
> - added ignore hint to abidiff su
> Add NULL cipher and auth support to AESNI-MB PMD type.
>
> Signed-off-by: Fan Zhang
> Signed-off-by: Declan Doherty
> Signed-off-by: Radu Nicolau
> ---
Applied to dpdk-next-crypto
Thanks.
22/02/2022 00:00, eagost...@nvidia.com:
> From: Elena Agostini
>
> Use rte_gpu_mem_cpu_map with the GPU memory
> pointer.
>
> Signed-off-by: Elena Agostini
> ---
> app/test-gpudev/main.c | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
Squashed with gpudev API update.
> > > When creating the asymmetric session mempool, the maximum private
> > > session size of all devices is used when creating the mempool object
> > > size.
> > > The return value for ``rte_cryptodev_asym_get_private_session_size``
> > > is unsigned int, whereas the variable was uint8_t, leading
> -Original Message-
> From: Ji, Kai
> Sent: Tuesday, February 22, 2022 5:02 PM
> To: dev@dpdk.org
> Cc: gak...@marvell.com; Zhang, Roy Fan ; Ji, Kai
>
> Subject: [dpdk-dev v10 9/9] crypto/qat: support out of place SG list
>
> This patch adds the SGL out of place support to QAT PMD
>
>
> From: Stephen Hemminger
> Sent: Tuesday, February 22, 2022 9:33 PM
>
> On Tue, 22 Feb 2022 15:13:53 +0100
> Morten Brørup wrote:
>
> > > From: Megha Ajmera [mailto:megha.ajm...@intel.com]
> > > Sent: Tuesday, 22 February 2022 14.19
> > >
> > > Masking of core mask was incorrect. Instead of us
> -Original Message-
> From: Ji, Kai
> Sent: Tuesday, February 22, 2022 5:02 PM
> To: dev@dpdk.org
> Cc: gak...@marvell.com; Zhang, Roy Fan ; Ji, Kai
>
> Subject: [dpdk-dev v10 8/9] crypto/qat: unify raw data path functions
>
> This patch unifies QAT's raw dp api implementations
> to the
> -Original Message-
> From: Ji, Kai
> Sent: Tuesday, February 22, 2022 5:02 PM
> To: dev@dpdk.org
> Cc: gak...@marvell.com; Zhang, Roy Fan ; Ji, Kai
>
> Subject: [dpdk-dev v10 7/9] crypto/qat: rework burst data path
>
> This patch enable the op_build_request function in
> qat_enqueue_op
> -Original Message-
> From: Ji, Kai
> Sent: Tuesday, February 22, 2022 5:02 PM
> To: dev@dpdk.org
> Cc: gak...@marvell.com; Zhang, Roy Fan ; Ji, Kai
>
> Subject: [dpdk-dev v10 5/9] crypto/qat: unify symmetric functions
>
> This patch removes qat_sym_pmd.c and integrates all the function
> -Original Message-
> From: Ji, Kai
> Sent: Tuesday, February 22, 2022 5:02 PM
> To: dev@dpdk.org
> Cc: gak...@marvell.com; Zhang, Roy Fan ; Ji, Kai
>
> Subject: [dpdk-dev v10 4/9] crypto/qat: rework asymmetric op build
> operation
>
> This patch reworks the asymmetric crypto data path
> -Original Message-
> From: Ji, Kai
> Sent: Tuesday, February 22, 2022 5:02 PM
> To: dev@dpdk.org
> Cc: gak...@marvell.com; Zhang, Roy Fan ; Ji, Kai
>
> Subject: [dpdk-dev v10 3/9] crypto/qat: rework session functions
>
> This patch introduces a set of set_session methods to QAT
> gener
> -Original Message-
> From: Ji, Kai
> Sent: Tuesday, February 22, 2022 5:02 PM
> To: dev@dpdk.org
> Cc: gak...@marvell.com; Zhang, Roy Fan ; Ji, Kai
>
> Subject: [dpdk-dev v10 2/9] crypto/qat: support symmetric build op request
>
> This patch adds common inline functions for QAT symmetr
> -Original Message-
> From: Ji, Kai
> Sent: Tuesday, February 22, 2022 5:02 PM
> To: dev@dpdk.org
> Cc: gak...@marvell.com; Zhang, Roy Fan ; Ji, Kai
>
> Subject: [dpdk-dev v10 6/9] crypto/qat: unify asymmetric functions
>
> This patch removes qat_asym_pmd.c and integrates all the
> func
> -Original Message-
> From: Ji, Kai
> Sent: Tuesday, February 22, 2022 5:02 PM
> To: dev@dpdk.org
> Cc: gak...@marvell.com; Zhang, Roy Fan ; Ji, Kai
>
> Subject: [dpdk-dev v10 1/9] common/qat: define build request and dequeue
> ops
>
> This patch introduce build request and dequeue op f
22/02/2022 01:22, eagost...@nvidia.com:
> From: Elena Agostini
>
> rte_gpu_mem_cpu_map() exposes a GPU memory area to the CPU.
> In gpudev communication list this is useful to store the
> status flag.
>
> A communication list status flag allocated on GPU memory
> and mapped for CPU visibility ca
On Fri, Feb 18, 2022 at 1:14 PM Jerin Jacob wrote:
>
> On Fri, Feb 18, 2022 at 11:48 AM Kiran Kumar Kokkilagadda
> wrote:
> >
> >
> >
> > > -Original Message-
> > > From: jer...@marvell.com
> > > Sent: Wednesday, February 9, 2022 10:20 PM
> > > To: dev@dpdk.org; Nithin Kumar Dabilpuram ;
Please see inline.
Thanks
Nithin
On 2/17/22 7:03 PM, Jerin Jacob wrote:
On Mon, Feb 7, 2022 at 1:01 PM Nithin Dabilpuram
wrote:
From: Satha Rao
Added rx_metadata_negotiate api to enable mark update RX offload.
Removed software logic to enable/disable mark update inside flow
create/destroy
From: Jerin Jacob
Except for the cn*_rte_flow* files, none of the other
file has rte in the file name, remove the
rte to unify the file name across the directory.
Signed-off-by: Jerin Jacob
Acked-by: Kiran Kumar K
---
v2..v1:
-Missed renaming cn10k_rte* and cn9k_rte* and fixed it
drivers/
When rxp_create_mkey() failed the function return, 'ptr' was not
freed which caused a memory leak.
Fixes: 9fa82d287f65 ("regex/mlx5: move RXP to CrSpace")
Signed-off-by: Weiguo Li
---
drivers/regex/mlx5/mlx5_rxp.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/re
1) in ntb_rxq_setup():
When 'rxq_conf->rx_mp' validation failed and return, the memory to
'rxq' is leaked. We can move the validation ahead the allocation for
'rxq' to avoid it.
2) in ntb_txq_setup():
The memory 'txq' is stored to 'hw->tx_queues[qp_id]' at the end of
the function when
Hi Kai,
This is again not compiling. It has been v10 and most of the version are fixing
one or the other compilation error.
You should fix your build system before sending out the next version.
/usr/bin/ld:
drivers/a715181@@tmp_rte_common_qat@sta/crypto_qat_qat_sym.c.o:/home/gakhil/up/dpdk-next
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