All,
21.02 validation test from Intel part is almost finished and no critical issue
is found.
# Basic Intel(R) NIC testing
* PF/VF(i40e,ixgbe and igb): 100%. 6 issues are found but no big issues.
* PF/VF(ICE): 100%. 11 issues are found regarding to AVL rule, rss rule, dcf,
ice package and so
Add 64-bit input_set_mask_f for outer inputset. input_set_mask_f is
used for inner fields or non-tunnel fields. Adjust indentation of
ice_pattern_match_item list in switch, ACL, RSS and FDIR for easy
review. For fields in tunnel layer, put them in outer part.
Signed-off-by: Zhirun Yan
---
driver
Distinguish inner/outer input_set. And avoid too many nested
conditionals in each type's parser. input_set_f is used for
outer fields, input_set_l is used for inner or non-tunnel
fields.
To align with shared code behavior, set GTPU as non-tunnel flow.
Ideally, GTPU packet should be parsed as tunne
Currently, the macro of input set use 2 bits, one bit for protocol and
inner/outer, another bit for src/dst field. But this ccould not distinguish
a rule with inner and outer fields for tunnel packet.
Redefine input set macro to make it clear. Only use these two bits for
protocol and field. Ignore
V2:
Meld patch 4,5 into 3.
Update ACL input set.
Clear PPPoE GTPU input set in RSS.
Put p_v4/6 assignment earlier to reduce redundant code in FDIR.
This patch set refactor FDIR pattern parser.
Redefine input set. Ignore the redundant inner/outer info.
Align the parser action with hardware, us
> -Original Message-
> From: Joyce Kong
> Sent: Tuesday, January 26, 2021 5:58 PM
> To: maxime.coque...@redhat.com; david.march...@redhat.com;
> i.maxim...@ovn.org; Ruifeng Wang ; Honnappa
> Nagarahalli
> Cc: dev@dpdk.org; nd ; Subhi Masri
> Subject: [PATCH v2] net/virtio: fix compiling
> -Original Message-
> From: Joyce Kong
> Sent: Friday, January 15, 2021 5:58 PM
> To: jer...@marvell.com; david.march...@redhat.com; Ruifeng Wang
> ; Honnappa Nagarahalli
>
> Cc: dev@dpdk.org; nd ; sta...@dpdk.org
> Subject: [PATCH v1] eal/arm: fix gcc build for 128-bit atomic compare
>
> -Original Message-
> From: dapengx...@intel.com
> Sent: Tuesday, January 26, 2021 5:52 PM
> To: Xing, Beilei ; Guo, Jia
> Cc: dev@dpdk.org; Yu, DapengX ; sta...@dpdk.org
> Subject: [PATCH] net/i40e: fix register setting for hash enable
>
> From: Dapeng Yu
>
> The original code cau
Except a minor typo inline.
Acked-by: Xiaoyun Li
> -Original Message-
> From: Yigit, Ferruh
> Sent: Tuesday, January 26, 2021 02:16
> To: Lu, Wenzhuo ; Li, Xiaoyun ;
> Iremonger, Bernard ; Yang, SteveX
>
> Cc: Yigit, Ferruh ; dev@dpdk.org; sta...@dpdk.org;
> lance.richard...@broadcom.co
Hi Andrew,
>-Original Message-
>From: Andrew Rybchenko
>Sent: Friday, January 22, 2021 4:21 PM
>To: Xueming(Steven) Li
>Cc: dev@dpdk.org; Slava Ovsiienko ; Asaf Penso
>
>Subject: Re: [dpdk-dev] [PATCH v5 0/9] ethdev: support SubFunction
>representor
>
>On 1/19/21 5:24 PM, Xueming(Steven)
Add support for new MODIFY_FIELD action to the Mellanox PMD.
This is the generic API that allows to manipulate any packet
header field by copying data from another packet field or
mark, metadata, tag, or immediate value (or pointer to it).
Since the API is generic and covers a lot of action under
Hi Beilei,
The pctype translation is introduced by i40e RSS refactor commit: ef4c16fd9148
by mistake, its behavior is inconsistent with the implementation before the
refactor.
This inconsistency can be gotten from the comparison of the running of the code.
I have also confirmed with the autho
> -Original Message-
> From: dapengx...@intel.com
> Sent: Tuesday, January 26, 2021 5:52 PM
> To: Xing, Beilei ; Guo, Jia
> Cc: dev@dpdk.org; Yu, DapengX ; sta...@dpdk.org
> Subject: [PATCH] net/i40e: fix register setting for hash enable
>
> From: Dapeng Yu
>
> The original code cau
On 1/26/2021 9:30 PM, Nalla Pradeep wrote:
Adding bare minimum PMD library and doc build infrastructure
and claim the maintainership for octeontx end point PMD.
Signed-off-by: Nalla Pradeep
Hi Nalla,
As I quickly checked many comments not addressed, can you please add a change
log to the co
On 1/25/2021 6:00 PM, Jerin Jacob wrote:
On Sat, Jan 23, 2021 at 12:49 AM wrote:
From: Liron Himi
This patch series align the mainline driver with all changes since 19.11
some of the patches are fixes which should be pushed to stable
v2:
- fix commit msg styling
- Addressed various review c
On 1/26/2021 6:05 PM, Liron Himi wrote:
-Original Message-
From: Ferruh Yigit
Sent: Tuesday, 26 January 2021 20:02
To: Liron Himi ; Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Yuri Chipchev
Subject: [EXT] Re: [dpdk-dev] [PATCH v2 07/37] net/mvpp2: update RSS tables
reservation
Exte
On 1/22/2021 7:19 PM, lir...@marvell.com wrote:
From: Liron Himi
Extend the config file with 'start-hdr' field.
currently 'eth' (default) and 'dsa' headers are supported.
Signed-off-by: Liron Himi
There are multiple update to the config file in this series, but the
documentation is not upd
On 1/22/2021 7:19 PM, lir...@marvell.com wrote:
From: Liron Himi
Extend the config file with 'start-hdr' field.
currently 'eth' (default) and 'dsa' headers are supported.
Signed-off-by: Liron Himi
<...>
@@ -575,13 +607,15 @@ mrvl_get_qoscfg(const char *key __rte_unused, const char
*path,
On 1/22/2021 7:19 PM, lir...@marvell.com wrote:
From: Liron Himi
Currently the HW is configured with only one pool which its
buffer size may be larger than the rx-fifo-size.
In that situation, frame size larger than the fifo-size
is gets dropped due to fifo overrun.
this is cause because the HW
On 1/22/2021 7:19 PM, lir...@marvell.com wrote:
From: Liron Himi
mbuf->port can be override and used for eventdev
so saving the port-id information in another field
that can be queried by application
Signed-off-by: Liron Himi
---
drivers/net/mvpp2/mrvl_ethdev.c | 1 +
1 file changed, 1 ins
On 1/26/2021 6:07 PM, Liron Himi wrote:
-Original Message-
From: Ferruh Yigit
Sent: Tuesday, 26 January 2021 18:59
To: Jerin Jacob ; Liron Himi
Cc: Jerin Jacob Kollanukkaran ; dpdk-dev ; Michael
Shamis
Subject: [EXT] Re: [dpdk-dev] [PATCH v2 00/37] net/mvpp2: misc updates
External E
Add documentation to support i40e PMD on Windows.
Update the release notes and features list for the same.
v2 changes:
- updated doc/guides/nics/features/i40e.ini file
- Replaced the name UIO with NetUIO
Signed-off-by: Pallavi Kadam
Reviewed-by: Ranjit Menon
---
doc/guides/nics
On 1/22/2021 7:18 PM, lir...@marvell.com wrote:
From: Yuri Chipchev
Save configuration that was done prior 'start' as
only then the ppio is being configured.
Can you please give more details on what is saved and why?
Signed-off-by: Yuri Chipchev
Reviewed-by: Liron Himi
---
drivers/net/
26/01/2021 19:18, Nick Connolly:
> Hi Tal,
>
> Thanks for the comments.
>
> >> + /* Try and find PCI class ID */
> >> + for (cp = buf; !(cp[0] == 0 && cp[1] == 0); cp++)
> > How about
> > for (cp = buf; cp[0] || cp[1]; cp++)
> That would be my preferred idiom, but the DPDK coding styl
Dev start and stop operations are added. To accomplish this internal
functions to enable or disable io queues are incorporated.
Signed-off-by: Nalla Pradeep
---
drivers/net/octeontx_ep/otx2_ep_vf.c| 107
drivers/net/octeontx_ep/otx_ep_common.h | 10 ++
drivers/net/octeo
1. Packet transmit function for both otx and otx2 are added.
2. Flushing transmit(command) queue when pending commands are more than
maximum allowed value (currently 16).
3. Scatter gather support if the packet spans multiple buffers.
Signed-off-by: Nalla Pradeep
---
drivers/net/octeontx_ep/o
Configuring hardware registers with command queue(iq) and droq(oq)
parameters.
Signed-off-by: Nalla Pradeep
---
drivers/net/octeontx_ep/otx2_ep_vf.c| 120 +++
drivers/net/octeontx_ep/otx_ep_common.h | 65 +
drivers/net/octeontx_ep/otx_ep_vf.c | 121 ++
Transmit queue setup involves allocating memory for the command queue
considering tx descriptor count and initializing data structure
representing the queue. Transmit queue release function frees the
command queue.
Signed-off-by: Nalla Pradeep
---
drivers/net/octeontx_ep/otx_ep_common.h | 89 ++
Function to deliver packets from DROQ to application is added. It also
fills DROQ with receive buffers timely such that device can fill them
with incoming packets.
Signed-off-by: Nalla Pradeep
---
drivers/net/octeontx_ep/otx_ep_common.h | 2 +
drivers/net/octeontx_ep/otx_ep_ethdev.c | 3 +
d
Add device information get and device configure operations.
Signed-off-by: Nalla Pradeep
---
drivers/net/octeontx_ep/otx_ep_common.h | 15 +
drivers/net/octeontx_ep/otx_ep_ethdev.c | 89 -
drivers/net/octeontx_ep/otx_ep_rxtx.h | 10 +++
3 files changed, 111 insertio
Functions to setup device, basic IQ and OQ registers are added.
Signed-off-by: Nalla Pradeep
---
drivers/net/octeontx_ep/meson.build | 2 +
drivers/net/octeontx_ep/otx2_ep_vf.c| 133 +
drivers/net/octeontx_ep/otx2_ep_vf.h| 11 ++
drivers/net/octeontx_ep/otx_ep_
Receive queue setup involves allocating memory for the queue,
initializing data structure representing the queue and filling queue
with receive buffers of rx descriptor count. Receive queues are referred
as droq. Hardware fills the receive buffers in queue with the packet.
In receive queue release
Adding bare minimum PMD library and doc build infrastructure
and claim the maintainership for octeontx end point PMD.
Signed-off-by: Nalla Pradeep
---
MAINTAINERS | 9 +
doc/guides/nics/features/octeontx_ep.ini | 8
doc/guides/nics/index.rst
Add basic init and uninit function which includes
initializing fields of ethdev private structure.
Signed-off-by: Nalla Pradeep
---
drivers/net/octeontx_ep/otx_ep_common.h | 22 ++-
drivers/net/octeontx_ep/otx_ep_ethdev.c | 88 +++--
2 files changed, 104 insertions(+), 6
add basic PCIe ethdev probe and remove.
Signed-off-by: Nalla Pradeep
---
drivers/common/octeontx2/otx2_common.h| 5 +-
drivers/net/octeontx_ep/meson.build | 2 +
drivers/net/octeontx_ep/otx_ep_common.h | 14 +
drivers/net/octeontx_ep/otx_ep_ethdev.c | 62 +
For CI builds, turn on the checking of includes.
Signed-off-by: Bruce Richardson
---
.ci/linux-build.sh | 1 +
1 file changed, 1 insertion(+)
diff --git a/.ci/linux-build.sh b/.ci/linux-build.sh
index afa3689a09..fdbeb5a616 100755
--- a/.ci/linux-build.sh
+++ b/.ci/linux-build.sh
@@ -57,6 +57,7
The check-includes script allowed checking header files in a given
directory to ensure that each header compiled alone without requiring
any other header inclusions.
With header checking now being done by the chkincs app in the build
system this script can be removed.
Signed-off-by: Bruce Richard
To verify that all DPDK headers are ok for inclusion directly in a C file,
and are not missing any other pre-requisite headers, we can auto-generate
for each header an empty C file that includes that header. Compiling these
files will throw errors if any header has unmet dependencies.
To ensure on
For some libraries, there may be some header files which are not for direct
inclusion, but rather are to be included via other header files. To allow
later checking of these files for missing includes, we separate out the
indirect include files from the direct ones.
Signed-off-by: Bruce Richardson
The rte_rib6 header was using RTE_MIN macro from rte_common.h but not
including the header file.
Fixes: f7e861e21c46 ("rib: support IPv6")
Cc: vladimir.medved...@intel.com
Signed-off-by: Bruce Richardson
---
lib/librte_rib/rte_rib6.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/lib/librt
The rte_ethdev_driver.h, rte_ethdev_vdev.h and rte_ethdev_pci.h files are
for drivers only and should be a private to DPDK and not installed.
Signed-off-by: Bruce Richardson
---
app/test/test_link_bonding.c | 2 +-
app/test/test_pdump.c
Clang does not have an "error" attribute for functions, so for marking
internal functions we need to check for the error attribute, and provide
a fallback if it is not present. For clang, we can use "diagnose_if"
attribute, similarly checking for its presence before use.
Fixes: fba5af82adc8 ("eal:
Include 'rte_branch_prediction.h' to get the likely/unlikely macro
definitions.
Fixes: 2173fb61 ("mcslock: add MCS queued lock implementation")
Cc: sta...@dpdk.org
Signed-off-by: Bruce Richardson
---
lib/librte_eal/include/generic/rte_mcslock.h | 1 +
1 file changed, 1 insertion(+)
diff --
As a general principle, each header file should include any other
headers it needs to provide data type definitions or macros. For
example, any header using the uintX_t types in structures or function
prototypes should include "stdint.h" to provide those type definitions.
In practice, while many,
Function to deliver packets from DROQ to application is added. It also
fills DROQ with receive buffers timely such that device can fill them
with incoming packets.
Signed-off-by: Nalla Pradeep
---
drivers/net/octeontx_ep/otx_ep_common.h | 2 +
drivers/net/octeontx_ep/otx_ep_ethdev.c | 3 +
d
Dev start and stop operations are added. To accomplish this internal
functions to enable or disable io queues are incorporated.
Signed-off-by: Nalla Pradeep
---
drivers/net/octeontx_ep/otx2_ep_vf.c| 107
drivers/net/octeontx_ep/otx_ep_common.h | 10 ++
drivers/net/octeo
Receive queue setup involves allocating memory for the queue,
initializing data structure representing the queue and filling queue
with receive buffers of rx descriptor count. Receive queues are referred
as droq. Hardware fills the receive buffers in queue with the packet.
In receive queue release
1. Packet transmit function for both otx and otx2 are added.
2. Flushing transmit(command) queue when pending commands are more than
maximum allowed value (currently 16).
3. Scatter gather support if the packet spans multiple buffers.
Signed-off-by: Nalla Pradeep
---
drivers/net/octeontx_ep/o
Adding bare minimum PMD library and doc build infrastructure
and claim the maintainership for octeontx end point PMD.
Signed-off-by: Nalla Pradeep
---
MAINTAINERS | 9 +
doc/guides/nics/features/octeontx_ep.ini | 8
doc/guides/nics/index.rst
Transmit queue setup involves allocating memory for the command queue
considering tx descriptor count and initializing data structure
representing the queue. Transmit queue release function frees the
command queue.
Signed-off-by: Nalla Pradeep
---
drivers/net/octeontx_ep/otx_ep_common.h | 89 ++
Configuring hardware registers with command queue(iq) and droq(oq)
parameters.
Signed-off-by: Nalla Pradeep
---
drivers/net/octeontx_ep/otx2_ep_vf.c| 120 +++
drivers/net/octeontx_ep/otx_ep_common.h | 65 +
drivers/net/octeontx_ep/otx_ep_vf.c | 121 ++
Add basic init and uninit function which includes
initializing fields of ethdev private structure.
Signed-off-by: Nalla Pradeep
---
drivers/net/octeontx_ep/otx_ep_common.h | 22 ++-
drivers/net/octeontx_ep/otx_ep_ethdev.c | 88 +++--
2 files changed, 104 insertions(+), 6
Functions to setup device, basic IQ and OQ registers are added.
Signed-off-by: Nalla Pradeep
---
drivers/net/octeontx_ep/meson.build | 2 +
drivers/net/octeontx_ep/otx2_ep_vf.c| 133 +
drivers/net/octeontx_ep/otx2_ep_vf.h| 11 ++
drivers/net/octeontx_ep/otx_ep_
Add device information get and device configure operations.
Signed-off-by: Nalla Pradeep
---
drivers/net/octeontx_ep/otx_ep_common.h | 15 +
drivers/net/octeontx_ep/otx_ep_ethdev.c | 89 -
drivers/net/octeontx_ep/otx_ep_rxtx.h | 10 +++
3 files changed, 111 insertio
add basic PCIe ethdev probe and remove.
Signed-off-by: Nalla Pradeep
---
drivers/common/octeontx2/otx2_common.h| 5 +-
drivers/net/octeontx_ep/meson.build | 2 +
drivers/net/octeontx_ep/otx_ep_common.h | 14 +
drivers/net/octeontx_ep/otx_ep_ethdev.c | 62 +
Use C11-style GCC built-in functions for atomic operations.
Signed-off-by: Mattias Rönnblom
---
drivers/event/dsw/dsw_evdev.c | 5 +
drivers/event/dsw/dsw_evdev.h | 6 +++---
drivers/event/dsw/dsw_event.c | 37 --
drivers/event/dsw/dsw_xstats.c | 4 ++--
The following changes since commit 7be7dc6dea927da7d458cb4172d70338f9eea164:
build: force pkg-config for dependency detection (2021-01-26 00:43:59 +0100)
are available in the Git repository at:
http://dpdk.org/git/next/dpdk-next-eventdev
for you to fetch changes up to 77c4f861b5f72afdfa5922
On Tue, Jan 19, 2021 at 12:43 PM Gujjar, Abhinandan S
wrote:
>
> Acked-by: abhinandan.guj...@intel.com
Applied to dpdk-next-eventdev/for-main. Thanks.
>
> Thanks & Regards
> Abhinandan
>
> > -Original Message-
> > From: Ankur Dwivedi
> > Sent: Monday, January 18, 2021 9:50 PM
> > To:
From: Igor Chauskin
Add per-tx-ring flag for packets that were pushed to HW but await
doorbell. That is to prevent a situation when a doorbell is sent due to
reaching Tx burst threshold and next send fails (e.g., due to queue
full). In such case we shouldn't send another doorbell because there ar
From: Igor Chauskin
Before starting transmission of Tx burst, the driver checked the
available space in the sq and limited the number of packets for
transmission accordingly.
The calculation was incorrect for fragmented packets and potentially had
significantly limited the length of Tx bursts.
T
Instead of veryfing the Rx descriptor each time it's being used in the
driver code, now the verification happens on the HAL side.
This simplifies code a lot as instead of doing 2 validations, only
single one is needed. The driver have to check the rc value returned
by the ena_com upon reading the
From: Amit Bernstein
Increment Tx doorbell statistics on tx_pkt_burst
after writing to doorbell and in case max burst size achieved
Fixes: c7519ea5eb8d ("net/ena: call additional doorbells if needed")
Cc: sta...@dpdk.org
Signed-off-by: Amit Bernstein
Reviewed-by: Michal Krawczyk
Reviewed-by:
From: Ido Segev
As the refill called as part of ena_start(), we end up the refill
progress with stuck buffers at the caller core cache.
Calling to flush the cache results with invalidate this cache and free
those stuck buffers.
Fixes: 1173fca25af9 ("ena: add polling-mode driver")
Cc: sta...@dpd
Hi,
this patchset contains few bug fixes for the ENA PMD and the version
upgrade to v2.2.1. Besides that, the validation of the Rx req ID was
optimized.
Best regards,
Michal
---
v2:
* Add patch preventing double doorbell on Tx.
Amit Bernstein (1):
net/ena: Tx doorbell statistics fix
Ido Se
On 1/22/2021 7:18 PM, lir...@marvell.com wrote:
From: Yuri Chipchev
Add xstats_by_id callbacks
Signed-off-by: Yuri Chipchev
Reviewed-by: Liron Himi
---
drivers/net/mvpp2/mrvl_ethdev.c | 98 -
1 file changed, 95 insertions(+), 3 deletions(-)
diff --git a/dr
From: Maxime Coquelin
> On 1/26/21 11:45 AM, Matan Azrad wrote:
> >
> >
> > From: Maxime Coquelin
> >>> From: Maxime Coquelin
> On 1/14/21 4:23 PM, Matan Azrad wrote:
> >
> >
> > From: Maxime Coquelin
> >> On 1/14/21 2:09 PM, Matan Azrad wrote:
> >>>
> >>>
> >>> F
Hi Tal,
Thanks for the comments.
+ /* Try and find PCI class ID */
+ for (cp = buf; !(cp[0] == 0 && cp[1] == 0); cp++)
How about
for (cp = buf; cp[0] || cp[1]; cp++)
That would be my preferred idiom, but the DPDK coding style (1.9.1) says
'do not use ! for tests unless it is a boo
-Original Message-
From: Ferruh Yigit
Sent: Tuesday, 26 January 2021 18:59
To: Jerin Jacob ; Liron Himi
Cc: Jerin Jacob Kollanukkaran ; dpdk-dev ;
Michael Shamis
Subject: [EXT] Re: [dpdk-dev] [PATCH v2 00/37] net/mvpp2: misc updates
External Email
---
-Original Message-
From: Ferruh Yigit
Sent: Tuesday, 26 January 2021 20:02
To: Liron Himi ; Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Yuri Chipchev
Subject: [EXT] Re: [dpdk-dev] [PATCH v2 07/37] net/mvpp2: update RSS tables
reservation
External Email
-
On 1/22/2021 7:18 PM, lir...@marvell.com wrote:
From: Yuri Chipchev
In kernel-4.14 the pp2 kernel occupied 4 RSS tables
as opposed to 1 RSS table in older version.
Signed-off-by: Yuri Chipchev
Reviewed-by: Liron Himi
---
drivers/net/mvpp2/mrvl_ethdev.c | 2 +-
1 file changed, 1 insertion(
> Subject: [PATCH] bus/pci: nvme on Windows requires class id and bus
>
> External email: Use caution opening links or attachments
>
>
> Attaching to an NVMe disk on Windows using SPDK requires the PCI class ID
> and device.bus fields. Decode the class ID from the PCI device info strings
> if i
19/01/2021 04:39, Dong Zhou:
> This patch introduces new parameter "--meter" to generate flows with meter
> action in test-flow-perf application.
>
> V2:
> Divide this patch to 2 patches, one includes the split calculation and output
> used cpu time for all insertion items, another includes the su
On 1/26/2021 5:25 PM, Liron Himi wrote:
-Original Message-
From: Ferruh Yigit
Sent: Tuesday, 26 January 2021 19:03
To: Liron Himi ; Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Yuri Chipchev ; sta...@dpdk.org; Andrew
Rybchenko
Subject: [EXT] Re: [dpdk-stable] [PATCH v2 03/37] net/mv
-Original Message-
From: Ferruh Yigit
Sent: Tuesday, 26 January 2021 19:03
To: Liron Himi ; Jerin Jacob Kollanukkaran
Cc: dev@dpdk.org; Yuri Chipchev ; sta...@dpdk.org; Andrew
Rybchenko
Subject: [EXT] Re: [dpdk-stable] [PATCH v2 03/37] net/mvpp2: fix Rx/Tx bytes
statistics
Externa
> Subject: [dpdk-dev] [PATCH] net/i40e: fix mingw build error
>
> External email: Use caution opening links or attachments
>
>
> Disable i40e avx512 code path for windows build to avoid the mingw build
> error.
>
> Fixes: e6a6a138919f ("net/i40e: add AVX512 vector path")
>
> Signed-off-by: Ley
On 1/22/2021 7:18 PM, lir...@marvell.com wrote:
From: Yuri Chipchev
4B of CRC was not included in the bytes statistics
Fixes: bdffe0c70 ("net/mrvl: support basic stats")
Cc: sta...@dpdk.org
Signed-off-by: Yuri Chipchev
Reviewed-by: Liron Himi
---
drivers/net/mvpp2/mrvl_ethdev.c | 4 ++--
On 1/25/2021 6:00 PM, Jerin Jacob wrote:
On Sat, Jan 23, 2021 at 12:49 AM wrote:
From: Liron Himi
This patch series align the mainline driver with all changes since 19.11
some of the patches are fixes which should be pushed to stable
v2:
- fix commit msg styling
- Addressed various review c
On 1/26/2021 4:48 PM, Thomas Monjalon wrote:
26/01/2021 17:39, Ferruh Yigit:
On 1/26/2021 4:22 PM, Thomas Monjalon wrote:
26/01/2021 17:17, Rong, Leyi:
On 1/20/2021 11:21 PM, Ferruh Yigit wrote:
And for the mingw, I have same result with Ali, I can reproduce with (Fedora
MinGW 9.2.1-6.fc32).
26/01/2021 17:39, Ferruh Yigit:
> On 1/26/2021 4:22 PM, Thomas Monjalon wrote:
> > 26/01/2021 17:17, Rong, Leyi:
> On 1/20/2021 11:21 PM, Ferruh Yigit wrote:
>
> And for the mingw, I have same result with Ali, I can reproduce with
> (Fedora
> >>> MinGW 9.2.1-6.fc32).
>
> >
On 1/26/2021 4:22 PM, Thomas Monjalon wrote:
26/01/2021 17:17, Rong, Leyi:
On 1/20/2021 11:21 PM, Ferruh Yigit wrote:
And for the mingw, I have same result with Ali, I can reproduce with (Fedora
MinGW 9.2.1-6.fc32).
But different from the CI, I am getting the error [1] for all following file
26/01/2021 17:17, Rong, Leyi:
> > > On 1/20/2021 11:21 PM, Ferruh Yigit wrote:
> > >
> > > And for the mingw, I have same result with Ali, I can reproduce with
> > > (Fedora
> > MinGW 9.2.1-6.fc32).
> > >
> > > But different from the CI, I am getting the error [1] for all following
> > > files:
>
On 1/26/2021 7:38 AM, Leyi Rong wrote:
Disable i40e avx512 code path for windows build to
avoid the mingw build error.
Fixes: e6a6a138919f ("net/i40e: add AVX512 vector path")
Signed-off-by: Leyi Rong
---
Tested-by: Pallavi Kadam
Verified on Windows using MinGW and clang compiler.
> -Original Message-
> From: David Marchand
> Sent: Monday, January 25, 2021 10:35 PM
> To: Kadam, Pallavi
> Cc: Yigit, Ferruh ; Ali Alnubani ;
> NBU-Contact-Thomas Monjalon ; Richardson, Bruce
> ; Tal Shnaiderman ; Odi Assli
> ; Rong, Leyi ; Zhang, Qi Z
> ; Lu, Wenzhuo ; Xing, Beilei
>
Disable i40e avx512 code path for windows build to
avoid the mingw build error.
Fixes: e6a6a138919f ("net/i40e: add AVX512 vector path")
Signed-off-by: Leyi Rong
---
config/x86/cross-mingw | 3 +++
drivers/net/i40e/meson.build | 2 +-
2 files changed, 4 insertions(+), 1 deletion(-)
diff
On Tue, Jan 26, 2021 at 04:35:16PM +0100, Thomas Monjalon wrote:
> 26/01/2021 16:32, Bruce Richardson:
> > On Tue, Jan 26, 2021 at 04:07:22PM +0100, Thomas Monjalon wrote:
> > > When removing the label "arm_cross_build_getting_the_prerequisite_library"
> > > in the rework of cross_build_dpdk_for_ar
On Mon, Jan 25, 2021 at 11:19 PM Pavan Nikhilesh Bhagavatula
wrote:
>
> >For the wmb in order_process_stage_1 and
> >order_process_stage_invalid in
> >the order test, they can be removed. This is because when the test
> >results
> >are wrong, the worker core writes 'true' to t->err. Then other wor
26/01/2021 16:42, Bruce Richardson:
> On Tue, Jan 26, 2021 at 04:31:36PM +0100, Thomas Monjalon wrote:
> > 26/01/2021 15:39, Bruce Richardson:
> > > Removing the ALLOW_INTERNAL_API is probably a good idea, but it does
> > > indeed
> > > throw up the errors with clang - but not gcc, which is strang
> -Original Message-
> From: Alexander Kozyrev
> Sent: Monday, January 25, 2021 19:01
> To: dev@dpdk.org
> Cc: Raslan Darawsheh ; Slava Ovsiienko
> ; Matan Azrad
> Subject: [PATCH] common/mlx5: add GTP TEID modification field ID
>
> Define hardware ID for GTP TEID modification. This valu
On Tue, Jan 26, 2021 at 04:31:36PM +0100, Thomas Monjalon wrote:
> 26/01/2021 15:39, Bruce Richardson:
> > Removing the ALLOW_INTERNAL_API is probably a good idea, but it does indeed
> > throw up the errors with clang - but not gcc, which is strange. The
> > offending headers seem to be (initially)
26/01/2021 16:32, David Marchand:
> On Tue, Jan 26, 2021 at 4:08 PM Thomas Monjalon wrote:
> >
> > When removing the label "arm_cross_build_getting_the_prerequisite_library"
> > in the rework of cross_build_dpdk_for_arm64.rst,
> > the reference to this section got broken.
> > It went unnoticed bec
On 1/18/2021 9:35 AM, Nalla Pradeep wrote:
Adding bare minimum PMD library and doc build infrastructure
and claim the maintainership for octeontx end point PMD.
Signed-off-by: Nalla Pradeep
For the series,
First of all sorry for the late review, I put some comments on some patches.
Overall
If the count action was presented in sample actions list, MLX5 PMD
created the counter resource and saved the index of counter in the
sample resource only, the counter index of flow was not updated.
This patch removes the counter index in the sampler resource and
saves it into the flow, and adds t
On 1/18/2021 9:36 AM, Nalla Pradeep wrote:
1. Packet transmit function for both otx and otx2 are added.
2. Flushing transmit(command) queue when pending commands are more than
maximum allowed value (currently 16).
3. Scatter gather support if the packet spans multiple buffers.
Signed-off-by:
26/01/2021 16:32, Bruce Richardson:
> On Tue, Jan 26, 2021 at 04:07:22PM +0100, Thomas Monjalon wrote:
> > When removing the label "arm_cross_build_getting_the_prerequisite_library"
> > in the rework of cross_build_dpdk_for_arm64.rst,
> > the reference to this section got broken.
> > It went unnoti
On 1/18/2021 9:36 AM, Nalla Pradeep wrote:
Function to deliver packets from DROQ to application is added. It also
fills DROQ with receive buffers timely such that device can fill them
with incoming packets.
Signed-off-by: Nalla Pradeep
<...>
@@ -327,7 +333,8 @@ otx_ep_init_droq(struct otx_e
On 1/18/2021 9:36 AM, Nalla Pradeep wrote:
Dev start and stop operations are added. To accomplish this internal
functions to enable or disable io queues are incorporated.
Signed-off-by: Nalla Pradeep
<...>
+static int
+otx_ep_dev_start(struct rte_eth_dev *eth_dev)
+{
+ struct otx_ep_d
On Tue, Jan 26, 2021 at 4:08 PM Thomas Monjalon wrote:
>
> When removing the label "arm_cross_build_getting_the_prerequisite_library"
> in the rework of cross_build_dpdk_for_arm64.rst,
> the reference to this section got broken.
> It went unnoticed because "ninja -C doc" does not regenerate the fi
On Tue, Jan 26, 2021 at 04:07:22PM +0100, Thomas Monjalon wrote:
> When removing the label "arm_cross_build_getting_the_prerequisite_library"
> in the rework of cross_build_dpdk_for_arm64.rst,
> the reference to this section got broken.
> It went unnoticed because "ninja -C doc" does not regenerate
On 1/18/2021 9:35 AM, Nalla Pradeep wrote:
Configuring hardware registers with command queue(iq) and droq(oq)
parameters.
Can you please elaborate what functionalit is configured, registers setup is not
clear on its own?
Signed-off-by: Nalla Pradeep
<...>
+static void
+otx2_vf_setup_o
26/01/2021 15:39, Bruce Richardson:
> Removing the ALLOW_INTERNAL_API is probably a good idea, but it does indeed
> throw up the errors with clang - but not gcc, which is strange. The
> offending headers seem to be (initially):
>
> * rte_ethdev_vdev.h
> * rte_ethdev_pci.h
>
> Are these public hea
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