Signed-off-by: Xueming Li
---
lib/librte_ether/rte_eth_ctrl.h | 4 +++-
lib/librte_ether/rte_ethdev.h | 2 ++
lib/librte_ether/rte_flow.c | 1 +
lib/librte_ether/rte_flow.h | 7 +++
4 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/lib/librte_ether/rte_eth_ctrl.h b/lib/
Signed-off-by: Xueming Li
---
app/test-pmd/cmdline_flow.c | 9 +
app/test-pmd/config.c | 3 +++
2 files changed, 12 insertions(+)
diff --git a/app/test-pmd/cmdline_flow.c b/app/test-pmd/cmdline_flow.c
index 1d1835ad6..a2ca03c07 100644
--- a/app/test-pmd/cmdline_flow.c
+++ b/app/tes
Add new L3 VXLAN packet type, no inner L2 layer comparing to standard
VXLAN
Signed-off-by: Xueming Li
---
lib/librte_mbuf/rte_mbuf_ptype.c | 1 +
lib/librte_mbuf/rte_mbuf_ptype.h | 13 +
2 files changed, 14 insertions(+)
diff --git a/lib/librte_mbuf/rte_mbuf_ptype.c b/lib/librte_mb
Signed-off-by: Xueming Li
---
app/test-pmd/cmdline_flow.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/app/test-pmd/cmdline_flow.c b/app/test-pmd/cmdline_flow.c
index df16d2ab9..1d1835ad6 100644
--- a/app/test-pmd/cmdline_flow.c
+++ b/app/test-pmd/cmdline_flow.c
@@ -194,6 +194,7 @
There was no RSS hash fields level definition on tunnel, implementations
default RSS on tunnel to outer or inner. Adding rss level enable users
to specifiy the tunnel level of RSS hash fields.
0: outer most,
1: inner,
-1: inner most(PMD auto detection if nested tunnel specified in fields)
Signe
Some tunnel enhancements:
1. support GRE tunnel type
2. support L3 VXLAN tunnel type - no inner L2 header
3. introduce RSS tunnel level into rte_flow_action_rss
RSS on inner or outer tunnel headers
4. implementation of rss tunnel level parsing in testpmd
v2:
1. Change rss default level to 0 in
On Fri, Dec 1, 2017 at 12:48 AM, Hemant Agrawal
wrote:
> On 11/30/2017 8:27 AM, Chas Williams wrote:
>
>> From: Chas Williams
>>
>> The IOMMU in some machines report that they can only support
>> limited widths. IOVA virtual addresses may exceed this width
>> making the use of IOVA virtual addr
The particular machine in my case is a Dell Optiplex 790 which is fairly
similar to another system that has basically the same problem. The IOMMU
advertises that is can only handle 39 bits of addressing. The DMAR address
tables have a width of 36 bits, so all is well when using IOVA physical
addr
-Original Message-
From: Yuanhan Liu
Date: Thursday, November 30, 2017 at 10:28 PM
To: Harish Patil
Cc: dpdk stable , "dev@dpdk.org" , "Xu,
Qian Q" , Dept-Eng DPDK Dev
Subject: Re: [dpdk-dev] 17.08.1 patches review and test
>On Thu, Nov 30, 2017 at 07:09:28PM +, Patil, Harish wrot
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