Re: [PATCH] Add riscv-sim.exp

2020-07-23 Thread Rob Savoye
On 7/20/20 9:11 PM, Kito Cheng wrote: > Oh, thanks for telling me this, it seems like a pretty new file in the > DejaGNU , I'll take a look at this. It's very new, I've been using it due to a lack of target hardware. I even got GDB testing to work for both bare metal and cross linux. On a si

Re: [PATCH] Add riscv-sim.exp

2020-07-22 Thread Joel Sherrill
On 7/22/2020 8:53 AM, Rob Savoye wrote: > On 7/21/20 11:02 PM, Kito Cheng wrote: > >> Remote protocols need a port which means it's harder to parallel >> testing in a single machine, >> but I guess it could add some mechanism to randomly pick a port to prevent >> that. >Actually that's support

Re: [PATCH] Add riscv-sim.exp

2020-07-22 Thread Tom Tromey
Kito> Remote protocols need a port which means it's harder to parallel Kito> testing in a single machine, but I guess it could add some Kito> mechanism to randomly pick a port to prevent that. The gdb test suite already handles this; but also maybe it could be changed to use the pipe feature of "t

Re: [PATCH] Add riscv-sim.exp

2020-07-22 Thread Rob Savoye
On 7/21/20 11:02 PM, Kito Cheng wrote: > Remote protocols need a port which means it's harder to parallel > testing in a single machine, > but I guess it could add some mechanism to randomly pick a port to prevent > that. Actually that's supported for the remote protocol, it increments the por

Re: [PATCH] Add riscv-sim.exp

2020-07-21 Thread Kito Cheng
On Tue, Jul 21, 2020 at 7:43 PM Tom Tromey wrote: > > > "Rob" == Rob Savoye writes: > > Rob> On 7/20/20 9:11 PM, Kito Cheng wrote: > >>> Do I correctly infer that this patch works with the sim tool shipped with > >>> GDB? > >> Tested with GDB simulator and qemu, but we use a tricky way to te

Re: [PATCH] Add riscv-sim.exp

2020-07-21 Thread Tom Tromey
> "Rob" == Rob Savoye writes: Rob> On 7/20/20 9:11 PM, Kito Cheng wrote: >>> Do I correctly infer that this patch works with the sim tool shipped with >>> GDB? >> Tested with GDB simulator and qemu, but we use a tricky way to test >> with qemu, add a wrapper to qemu to made the interface sam

Re: [PATCH] Add riscv-sim.exp

2020-07-20 Thread Rob Savoye
On 7/20/20 9:11 PM, Kito Cheng wrote: >> Do I correctly infer that this patch works with the sim tool shipped with >> GDB? > Tested with GDB simulator and qemu, but we use a tricky way to test > with qemu, add a wrapper to qemu to made the interface same as gdb > simulator[1]. QEMU supports th

Re: [PATCH] Add riscv-sim.exp

2020-07-20 Thread Kito Cheng
Hi Rob: Thanks for you adding the qemu support for RISC-V! I will try it these days! On Tue, Jul 21, 2020 at 8:25 AM Rob Savoye wrote: > > On 7/20/20 5:23 PM, Jacob Bachmeyer wrote: > > >Do I correctly infer that this patch works with the sim tool shipped > > with GDB? > > That's the defau

Re: [PATCH] Add riscv-sim.exp

2020-07-20 Thread Kito Cheng
Hi Jocob: I signed an FSF copyright assignment for most gnu toolchain projects many years ago, but I didn't list DejaGNU, so I'll do the paperwork soon. > Do I correctly infer that this patch works with the sim tool shipped with GDB? Tested with GDB simulator and qemu, but we use a tricky way to

Re: [PATCH] Add riscv-sim.exp

2020-07-20 Thread Rob Savoye
On 7/20/20 5:23 PM, Jacob Bachmeyer wrote: >    Do I correctly infer that this patch works with the sim tool shipped > with GDB? That's the default instruction set level simulator, often used when working hardware is unavailable. QEMU does have riscv support, so the new baseboard for generic QE

Re: [PATCH] Add riscv-sim.exp

2020-07-20 Thread Jacob Bachmeyer
We are happy (in principle) to add this support to DejaGNU, however the FSF does not currently have a copyright assignment for changes to DejaGNU from SiFive or from you. I note that riscv-sim.exp has an FSF copyright notice, but we do not have the papers to substantiate that notice for contri

[PATCH] Add riscv-sim.exp

2020-07-13 Thread Kito Cheng
ChangeLog * baseboards/riscv-sim.exp: New. * Makefile.am (baseboard_DATA): Add riscv-sim.exp. * Makefile.in: Regen. --- Makefile.am | 1 + Makefile.in | 10 ++-- baseboards/riscv-sim.exp | 54 3 files