On 7/20/20 9:11 PM, Kito Cheng wrote:
>> Do I correctly infer that this patch works with the sim tool shipped with
>> GDB?
> Tested with GDB simulator and qemu, but we use a tricky way to test
> with qemu, add a wrapper to qemu to made the interface same as gdb
> simulator[1].
QEMU supports th
Hi Rob:
Thanks for you adding the qemu support for RISC-V! I will try it these days!
On Tue, Jul 21, 2020 at 8:25 AM Rob Savoye wrote:
>
> On 7/20/20 5:23 PM, Jacob Bachmeyer wrote:
>
> >Do I correctly infer that this patch works with the sim tool shipped
> > with GDB?
>
> That's the defau
Hi Jocob:
I signed an FSF copyright assignment for most gnu toolchain projects
many years ago, but I didn't list DejaGNU, so I'll do the paperwork
soon.
> Do I correctly infer that this patch works with the sim tool shipped with GDB?
Tested with GDB simulator and qemu, but we use a tricky way to
On 7/20/20 5:23 PM, Jacob Bachmeyer wrote:
> Do I correctly infer that this patch works with the sim tool shipped
> with GDB?
That's the default instruction set level simulator, often used when
working hardware is unavailable. QEMU does have riscv support, so the
new baseboard for generic QE
We are happy (in principle) to add this support to DejaGNU, however the
FSF does not currently have a copyright assignment for changes to
DejaGNU from SiFive or from you. I note that riscv-sim.exp has an FSF
copyright notice, but we do not have the papers to substantiate that
notice for contri
