On Sat, 19 Oct 2024 09:25:12 GMT, Jatin Bhateja wrote:
>> IMO until C2 type system starts to track bitwise constant information
>> ([JDK-8001436](https://bugs.openjdk.org/browse/JDK-8001436) et al), there
>> are not enough benefits to rely on IGVN here. So far, all the discussed
>> patterns ar
On Fri, 11 Oct 2024 16:54:23 GMT, Quan Anh Mai wrote:
> I am having a similar idea that is to group those transformations together
> into a `Phase` called `PhaseLowering`
I think such a phase could be quite useful in general. Recently I was trying to
implement the BMI1 instruction `bextr` for
On Sun, 29 Sep 2024 04:21:19 GMT, Jatin Bhateja wrote:
> This patch optimizes LongVector multiplication by inferring VPMUL[U]DQ
> instruction for following IR pallets.
>
>
>MulVL ( AndV SRC1, 0x) ( AndV SRC2, 0x)
>MulVL (URShiftVL SRC1 , 32) (URShif
On Wed, 9 Oct 2024 09:59:11 GMT, Jatin Bhateja wrote:
>> This patch optimizes LongVector multiplication by inferring VPMULUDQ
>> instruction for following IR pallets.
>>
>>
>>MulL ( And SRC1, 0x) ( And SRC2, 0x)
>>MulL (URShift SRC1 , 32) (URShift S
On Wed, 9 Oct 2024 09:59:11 GMT, Jatin Bhateja wrote:
>> This patch optimizes LongVector multiplication by inferring VPMULUDQ
>> instruction for following IR pallets.
>>
>>
>>MulL ( And SRC1, 0x) ( And SRC2, 0x)
>>MulL (URShift SRC1 , 32) (URShift S
On Wed, 9 Oct 2024 09:59:11 GMT, Jatin Bhateja wrote:
>> This patch optimizes LongVector multiplication by inferring VPMULUDQ
>> instruction for following IR pallets.
>>
>>
>>MulL ( And SRC1, 0x) ( And SRC2, 0x)
>>MulL (URShift SRC1 , 32) (URShift S
On Fri, 11 Oct 2024 16:54:23 GMT, Quan Anh Mai wrote:
> I am having a similar idea that is to group those transformations together
> into a `Phase` called `PhaseLowering`
I think such a phase could be quite useful in general. Recently I was trying to
implement the BMI1 instruction `bextr` for
On Wed, 9 Oct 2024 09:59:11 GMT, Jatin Bhateja wrote:
>> This patch optimizes LongVector multiplication by inferring VPMULUDQ
>> instruction for following IR pallets.
>>
>>
>>MulL ( And SRC1, 0x) ( And SRC2, 0x)
>>MulL (URShift SRC1 , 32) (URShift S
On Mon, 12 Aug 2024 06:29:03 GMT, Jatin Bhateja wrote:
> its usage in existing patch is limited to [type
> comparison.](https://github.com/openjdk/jdk/pull/20507/files#diff-3559dcf23b719805be5fd06fd5c1851dbd8f53e47afe6d99cba13a3de0ebc6b2R1542)
Ah, that makes sense to me. I took a closer look an
On Thu, 8 Aug 2024 17:20:06 GMT, Jatin Bhateja wrote:
>> Hi All,
>>
>> As per the discussion on panama-dev mailing list[1], patch adds the support
>> following new vector operators.
>>
>>
>> . SATURATING_UADD : Saturating unsigned addition.
>> . SATURATING_ADD: Saturating sig
Hi all,
This patch fixes `cmovL_imm_01*` instructions matching against an integer
immediate 1 instead of a long immediate 1. I noticed while looking at the
backend implementation of CMove that the rules specify `immI_1` instead of
`immL1`, which means that the instructions can't be matched and i
On Wed, 17 Jul 2024 09:18:31 GMT, Galder Zamarreño wrote:
> Do you want a microbenchmark for the performance of vectorized max/min long?
Yeah, I think a simple benchmark that tests for long min/max vectorization and
reduction would be good. I worry that checking performance manually like in
`R
On Tue, 9 Jul 2024 12:07:37 GMT, Galder Zamarreño wrote:
> This patch intrinsifies `Math.max(long, long)` and `Math.min(long, long)` in
> order to help improve vectorization performance.
>
> Currently vectorization does not kick in for loops containing either of these
> calls because of the fo
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