[clang] [compiler-rt] [UBSan] Diagnose assumption violation (PR #104741)

dtcxzyw wrote: Ping. https://github.com/llvm/llvm-project/pull/104741 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [FMV][Clang][CodeGen] Resolves corresponding callee for multi-versioning callers (PR #107822)

https://github.com/dtcxzyw created https://github.com/llvm/llvm-project/pull/107822 Closes #94949. >From 110eea45aaaca6508f41032641a083df1c43092f Mon Sep 17 00:00:00 2001 From: Yingwei Zheng Date: Mon, 9 Sep 2024 15:53:05 +0800 Subject: [PATCH 1/2] [FMV][Clang][CodeGen] Add pre-commit tests.

[clang] [llvm] [RISCV] Add NutShell RV32/64 processors definition (PR #102899)

https://github.com/dtcxzyw requested changes to this pull request. After consulting with NutShell's maintainer @poemonsense, I think this PR should be rejected for the following reasons: 1. There are no commercial plans for this educational processor. 2. This project is no longer maintained. h

[clang] [llvm] [RISCV][MC] Support experimental extensions Zvbc32e and Zvkgs (PR #103709)

@@ -302,6 +302,9 @@ The primary goal of experimental support is to assist in the process of ratifica ``experimental-zicfilp``, ``experimental-zicfiss`` LLVM implements the `1.0 release specification `__. +``experimental

[clang] [llvm] [RISCV][MC] Support experimental extensions Zvbc32e and Zvkgs (PR #103709)

@@ -150,6 +150,14 @@ let Predicates = [HasStdExtZvkg], RVVConstraint = NoConstraint in { SchedBinaryMC<"WriteVGMULV", "ReadVGMULV", "ReadVGMULV">; } // Predicates = [HasStdExtZvkg] +let Predicates = [HasStdExtZvkgs], RVVConstraint = NoConstraint in {

[clang] [llvm] [RISCV][MC] Support experimental extensions Zvbc32e and Zvkgs (PR #103709)

https://github.com/dtcxzyw approved this pull request. https://github.com/llvm/llvm-project/pull/103709 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [InstCombine] Infer nsw/nuw for trunc (PR #87910)

@@ -897,7 +897,20 @@ Instruction *InstCombinerImpl::visitTrunc(TruncInst &Trunc) { } } - return nullptr; + bool Changed = false; + if (!Trunc.hasNoSignedWrap() && + ComputeMaxSignificantBits(Src, /*Depth=*/0, &Trunc) <= DestWidth) { +Trunc.setHasNoSignedWrap

[clang] [llvm] [InstCombine] Infer nsw/nuw for trunc (PR #87910)

@@ -897,7 +897,20 @@ Instruction *InstCombinerImpl::visitTrunc(TruncInst &Trunc) { } } - return nullptr; + bool Changed = false; + if (!Trunc.hasNoSignedWrap() && + ComputeMaxSignificantBits(Src, /*Depth=*/0, &Trunc) <= DestWidth) { +Trunc.setHasNoSignedWrap

[clang] [llvm] [InstCombine] Infer nsw/nuw for trunc (PR #87910)

@@ -897,7 +897,20 @@ Instruction *InstCombinerImpl::visitTrunc(TruncInst &Trunc) { } } - return nullptr; + bool Changed = false; + if (!Trunc.hasNoSignedWrap() && + ComputeMaxSignificantBits(Src, /*Depth=*/0, &Trunc) <= DestWidth) { +Trunc.setHasNoSignedWrap

[clang] [libclc] [libcxx] [lld] [llvm] [openmp] llvm encode decode (PR #87187)

https://github.com/dtcxzyw closed https://github.com/llvm/llvm-project/pull/87187 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [libclc] [libcxx] [lld] [llvm] [openmp] llvm encode decode (PR #87187)

dtcxzyw wrote: Please send this PR to your downstream fork https://github.com/x-codingman/llvm-project. https://github.com/llvm/llvm-project/pull/87187 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/li

[clang] [llvm] [InstCombine] Add canonicalization of `sitofp` -> `uitofp nneg` (PR #88299)

@@ -1964,11 +1964,25 @@ Instruction *InstCombinerImpl::visitFPToSI(FPToSIInst &FI) { } Instruction *InstCombinerImpl::visitUIToFP(CastInst &CI) { - return commonCastTransforms(CI); + if (Instruction *R = commonCastTransforms(CI)) +return R; + if (!CI.hasNonNeg() && isK

[clang] [llvm] [InstCombine] Add canonicalization of `sitofp` -> `uitofp nneg` (PR #88299)

https://github.com/dtcxzyw approved this pull request. LGTM. https://github.com/llvm/llvm-project/pull/88299 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [InstCombine] Infer nsw/nuw for trunc (PR #87910)

https://github.com/dtcxzyw closed https://github.com/llvm/llvm-project/pull/87910 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [ValueTracking] Convert `isKnownNonZero` to use SimplifyQuery (PR #85863)

https://github.com/dtcxzyw updated https://github.com/llvm/llvm-project/pull/85863 >From 9b725ffdb93b3029263129063d021063783f9cd9 Mon Sep 17 00:00:00 2001 From: Yingwei Zheng Date: Thu, 21 Mar 2024 21:10:46 +0800 Subject: [PATCH 1/4] [ValueTracking] Add pre-commit tests. NFC. --- llvm/test/Tr

[clang] [llvm] [ValueTracking] Convert `isKnownNonZero` to use SimplifyQuery (PR #85863)

dtcxzyw wrote: > Looks like the clang build is failing again? Done. https://github.com/llvm/llvm-project/pull/85863 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [ValueTracking] Convert `isKnownNonZero` to use SimplifyQuery (PR #85863)

https://github.com/dtcxzyw closed https://github.com/llvm/llvm-project/pull/85863 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add processor definition for Spacemit-K1 (PR #94564)

https://github.com/dtcxzyw edited https://github.com/llvm/llvm-project/pull/94564 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add processor definition for Spacemit-K1 (PR #94564)

dtcxzyw wrote: cc @zengdage https://github.com/llvm/llvm-project/pull/94564 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add processor definition for Spacemit-K1 (PR #94564)

@@ -381,3 +381,32 @@ def XIANGSHAN_NANHU : RISCVProcessorModel<"xiangshan-nanhu", TuneZExtHFusion, TuneZExtWFusion, TuneShiftedZExtWFusion]>; + +

[clang] [llvm] [RISCV] Add processor definition for SpacemiT-X60 (PR #94564)

https://github.com/dtcxzyw edited https://github.com/llvm/llvm-project/pull/94564 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add processor definition for SpacemiT-X60 (PR #94564)

https://github.com/dtcxzyw approved this pull request. LGTM. But I think it needs a double check by spacemit staffs. https://github.com/llvm/llvm-project/pull/94564 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin

[clang] [llvm] [RISCV] Add support for getHostCPUFeatures using hwprobe (PR #94352)

https://github.com/dtcxzyw updated https://github.com/llvm/llvm-project/pull/94352 >From ff839bef048a65760f4cd0e9abafe11cfebd9362 Mon Sep 17 00:00:00 2001 From: Yingwei Zheng Date: Tue, 4 Jun 2024 21:08:27 +0800 Subject: [PATCH 1/4] [RISCV] Add support for getHostCPUFeatures using hwprobe Co-a

[clang] [llvm] [RISCV] Add support for getHostCPUFeatures using hwprobe (PR #94352)

@@ -1998,6 +1998,66 @@ bool sys::getHostCPUFeatures(StringMap &Features) { return true; } +#elif defined(__linux__) && defined(__riscv) +// struct riscv_hwprobe +struct RISCVHwProbe { + int64_t Key; + uint64_t Value; +}; +bool sys::getHostCPUFeatures(StringMap &Features) {

[clang] [llvm] [RISCV] Add support for getHostCPUFeatures using hwprobe (PR #94352)

https://github.com/dtcxzyw edited https://github.com/llvm/llvm-project/pull/94352 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add processor definition for SpacemiT-X60 (PR #94564)

@@ -381,3 +381,21 @@ def XIANGSHAN_NANHU : RISCVProcessorModel<"xiangshan-nanhu", TuneZExtHFusion, TuneZExtWFusion, TuneShiftedZExtWFusion]>; + +

[clang] [llvm] [RISCV] Add processor definition for SpacemiT-X60 (PR #94564)

@@ -381,3 +381,21 @@ def XIANGSHAN_NANHU : RISCVProcessorModel<"xiangshan-nanhu", TuneZExtHFusion, TuneZExtWFusion, TuneShiftedZExtWFusion]>; + +

[clang] [llvm] [RISCV] Add support for getHostCPUFeatures using hwprobe (PR #94352)

@@ -86,8 +86,14 @@ void riscv::getRISCVTargetFeatures(const Driver &D, const llvm::Triple &Triple, // and other features (ex. mirco architecture feature) from mcpu if (Arg *A = Args.getLastArg(options::OPT_mcpu_EQ)) { StringRef CPU = A->getValue(); -if (CPU == "nat

[clang] [llvm] [ConstantFold] Drop gep of gep fold entirely (PR #95126)

dtcxzyw wrote: See https://github.com/llvm/llvm-project/commit/51e459a561519c8d51e2b4cadddc0d1f99c8b7ef: > This causes some non-trivial text size increases in unoptimized builds for > Bullet. Revert while I investigate. Can you double check this? https://github.com/llvm/llvm-project/pull/95

[clang] [llvm] [ConstantFold] Drop gep of gep fold entirely (PR #95126)

https://github.com/dtcxzyw approved this pull request. LGTM. https://github.com/llvm/llvm-project/pull/95126 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add Smcsrind and Sscsrind extension (PR #93952)

dtcxzyw wrote: Conflicting files > llvm/docs/ReleaseNotes.rst https://github.com/llvm/llvm-project/pull/93952 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add smcdeleg and ssccfg extensions (PR #95163)

https://github.com/dtcxzyw closed https://github.com/llvm/llvm-project/pull/95163 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [KMSAN] Enable on PowerPC64 (PR #73611)

https://github.com/dtcxzyw closed https://github.com/llvm/llvm-project/pull/73611 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add Smcsrind and Sscsrind extension (PR #93952)

https://github.com/dtcxzyw closed https://github.com/llvm/llvm-project/pull/93952 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang-tools-extra] [llvm] [llvm] Remove the Legacy PM Hello example (PR #95708)

dtcxzyw wrote: > > You also need to remove the use of this pass (for testing purposes) from > > clang-tools-extra. > > Done, thanks! > > I don't understand why CI still fails: > > ```shell > Total Discovered Tests: 60135 > -- >   | Skipped :15 (0.02%) >   | Unsupported : 10

[clang] [llvm] [LLVM] Add IRNormalizer Pass (PR #68176)

dtcxzyw wrote: Any progress? It would be helpful for me to avoid reviewing tons of diff in https://github.com/dtcxzyw/llvm-opt-benchmark/pulls :) Can you resolve merge conflicts first? https://github.com/llvm/llvm-project/pull/68176 ___ cfe-commits

[clang] [llvm] [LLVM] Add IRNormalizer Pass (PR #68176)

https://github.com/dtcxzyw edited https://github.com/llvm/llvm-project/pull/68176 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [LLVM] Add IRNormalizer Pass (PR #68176)

dtcxzyw wrote: > Hi @dtcxzyw, thanks for reaching out! > > This MR is blocked because I cannot reproduce the failures @nikic found > [here](https://github.com/llvm/llvm-project/pull/68176#issuecomment-1836365664). > (See [this > comment](https://github.com/llvm/llvm-project/pull/68176#issueco

[clang] [llvm] [LLVM] Add IRNormalizer Pass (PR #68176)

dtcxzyw wrote: > > > I would also try to add this pass at the end of the clang pipeline and > > > run llvm-test-suite to verify that the normalization this does is indeed > > > semantics-preserving. > > > > > > I'm running into some linking errors when trying to build > > [`llvm-test-suite`]

[clang] [llvm] [LLVM] Add IRNormalizer Pass (PR #68176)

dtcxzyw wrote: > Any progress? It would be helpful for me to avoid reviewing tons of diff in > https://github.com/dtcxzyw/llvm-opt-benchmark/pulls :) > > Can you resolve merge conflicts first? Emm, as this pass is very time-consuming (even longer than -O3), I plan to create a simpler one for

[clang] [llvm] [ConstantFold] Remove non-trivial gep-of-gep fold (PR #93823)

https://github.com/dtcxzyw commented: > because the DL-aware constant folding will take care of this anyway. Can you point out where we do this fold? > I've only kept the straightforward zero-index case, where we just concatenate > two GEPs. Is there a test for this case? https://github.com

[clang] [llvm] [ConstantFold] Remove non-trivial gep-of-gep fold (PR #93823)

https://github.com/dtcxzyw approved this pull request. LGTM. https://github.com/llvm/llvm-project/pull/93823 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add Smcsrind and Sscsrind extension (PR #93952)

https://github.com/dtcxzyw commented: Can you also update `llvm/docs/ReleaseNotes.rst` ? https://github.com/llvm/llvm-project/pull/93952 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commit

[clang] [llvm] [RISCV] Remove experimental from Zabha (PR #93831)

https://github.com/dtcxzyw closed https://github.com/llvm/llvm-project/pull/93831 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [InstCombine] Add canonicalization of `sitofp` -> `uitofp nneg` (PR #88299)

@@ -1964,11 +1964,25 @@ Instruction *InstCombinerImpl::visitFPToSI(FPToSIInst &FI) { } Instruction *InstCombinerImpl::visitUIToFP(CastInst &CI) { - return commonCastTransforms(CI); + if (Instruction *R = commonCastTransforms(CI)) +return R; + if (!CI.hasNonNeg() && isK

[clang] [llvm] [mlir] Fix Definition Mismatches (PR #89294)

https://github.com/dtcxzyw edited https://github.com/llvm/llvm-project/pull/89294 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [mlir] Fix Definition Mismatches (PR #89294)

https://github.com/dtcxzyw requested changes to this pull request. https://github.com/llvm/llvm-project/pull/89294 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [mlir] Fix Definition Mismatches (PR #89294)

@@ -433,7 +433,7 @@ class LLVM_LIBRARY_VISIBILITY InstCombinerImpl final Value *foldAndOrOfICmpsOfAndWithPow2(ICmpInst *LHS, ICmpInst *RHS, Instruction *CxtI, bool IsAnd, bool IsLogical = false); -

[clang] [llvm] [mlir] Fix warning about mismatches between function parameter and call-site args names (PR #89294)

dtcxzyw wrote: > Isn't the warning about a mismatch between declaration and definition, not > call args? The InstCombine change does make the definition and declaration > match. > […](#) > On Fri, Apr 19, 2024, at 17:07, Mehdi Amini wrote: ***@***. commented on > this pull request. In llvm

[clang] [llvm] [RISCV] Add processor definition for XiangShan-KunMingHu (PR #89359)

@@ -378,3 +378,30 @@ def XIANGSHAN_NANHU : RISCVProcessorModel<"xiangshan-nanhu", TuneZExtHFusion, TuneZExtWFusion, TuneShiftedZExtWFusion]>; +de

[clang] [Clang][CodeGen] Add metadata for load from reference (PR #98746)

https://github.com/dtcxzyw edited https://github.com/llvm/llvm-project/pull/98746 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Clang][CodeGen] Add metadata for load from reference (PR #98746)

dtcxzyw wrote: Compile-time impact: http://llvm-compile-time-tracker.com/compare.php?from=f0fad9f3e00dbe8e58024d1c98e36b7b9b1b17a9&to=f01369d38b67364b5c35bf87984f813a53ce18d1&stat=instructions%3Au https://github.com/llvm/llvm-project/pull/98746 ___ cf

[clang] [llvm] [RISCV] Add support for getHostCPUFeatures using hwprobe (PR #94352)

https://github.com/dtcxzyw closed https://github.com/llvm/llvm-project/pull/94352 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [Inliner] Propagate more attributes to params when inlining (PR #91101)

dtcxzyw wrote: I don't see any performance benefits based on IR diff or instruction count. Changes on code size are mainly affected by JumpThreading/Inlining. But I don't object to propagating more attributes if the compile-time impact is negligible :) https://github.com/llvm/llvm-project/p

[clang] [Clang][CodeGen] Add metadata for load from reference (PR #98746)

https://github.com/dtcxzyw ready_for_review https://github.com/llvm/llvm-project/pull/98746 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Clang][CodeGen] Add metadata for load from reference (PR #98746)

@@ -1,8 +1,8 @@ // RUN: %clang_cc1 -emit-llvm -triple %itanium_abi_triple -o - %s -O2 | FileCheck %s -// Make sure the call to b() doesn't get optimized out. +// Make sure the call to b() is eliminated. extern struct x {char& x,y;}y; int b(); int a() { if (!&y.x) b();

[clang] [Clang][CodeGen] Add metadata for load from reference (PR #98746)

@@ -2799,9 +2799,37 @@ CodeGenFunction::EmitLoadOfReference(LValue RefLVal, llvm::LoadInst *Load = Builder.CreateLoad(RefLVal.getAddress(), RefLVal.isVolatile()); CGM.DecorateInstructionWithTBAA(Load, RefLVal.getTBAAInfo()); - return makeNaturalAddressForPointer(Load

[clang] [llvm] [RISCV] Mark zacas as experimental again due to unresolved ABI issue (PR #99898)

dtcxzyw wrote: Please update this line :) https://github.com/llvm/llvm-project/blob/90569e02e63ff5d0915446919f564e9b3638fe2a/llvm/lib/TargetParser/Host.cpp#L2070 https://github.com/llvm/llvm-project/pull/99898 ___ cfe-commits mailing list cfe-commits@l

[clang] [llvm] [InstCombine] Swap out range metadata to range attribute for cttz/ctlz/ctpop (PR #88776)

https://github.com/dtcxzyw closed https://github.com/llvm/llvm-project/pull/88776 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add processor definition and scheduling model for XiangShan-KunMingHu (PR #90392)

=?utf-8?b?6YOd5bq36L6+?= Message-ID: In-Reply-To: @@ -378,3 +378,31 @@ def XIANGSHAN_NANHU : RISCVProcessorModel<"xiangshan-nanhu", TuneZExtHFusion, TuneZExtWFusion,

[clang] [llvm] [RISCV] Add processor definition and scheduling model for XiangShan-KunMingHu (PR #90392)

=?utf-8?b?6YOd5bq36L6+?= Message-ID: In-Reply-To: @@ -0,0 +1,1489 @@ +//==- RISCVSchedXiangShanKunMingHu.td - XiangShanKunMingHu Scheduling Defs -*- tablegen -*-=// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/

[clang] [llvm] [RISCV] Add processor definition and scheduling model for XiangShan-KunMingHu (PR #90392)

=?utf-8?b?6YOd5bq36L6+?= Message-ID: In-Reply-To: @@ -0,0 +1,1489 @@ +//==- RISCVSchedXiangShanKunMingHu.td - XiangShanKunMingHu Scheduling Defs -*- tablegen -*-=// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/

[clang] [llvm] [RISCV] Add processor definition and scheduling model for XiangShan-KunMingHu (PR #90392)

=?utf-8?b?6YOd5bq36L6+?= Message-ID: In-Reply-To: @@ -0,0 +1,1489 @@ +//==- RISCVSchedXiangShanKunMingHu.td - XiangShanKunMingHu Scheduling Defs -*- tablegen -*-=// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/

[clang] [llvm] [RISCV] Add processor definition and scheduling model for XiangShan-KunMingHu (PR #90392)

=?utf-8?b?6YOd5bq36L6+?= Message-ID: In-Reply-To: @@ -0,0 +1,1489 @@ +//==- RISCVSchedXiangShanKunMingHu.td - XiangShanKunMingHu Scheduling Defs -*- tablegen -*-=// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/

[clang] [llvm] [ValueTracking] use KnownBits to compute fpclass from bitcast (PR #97762)

https://github.com/dtcxzyw approved this pull request. LGTM. https://github.com/llvm/llvm-project/pull/97762 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [ValueTracking] use KnownBits to compute fpclass from bitcast (PR #97762)

@@ -5921,6 +5921,63 @@ void computeKnownFPClass(const Value *V, const APInt &DemandedElts, break; } + case Instruction::BitCast: { +const Value *Src; +if (!match(Op, m_ElementWiseBitCast(m_Value(Src))) || +!Src->getType()->isIntOrIntVectorTy()) + b

[clang] [llvm] [ValueTracking] use KnownBits to compute fpclass from bitcast (PR #97762)

https://github.com/dtcxzyw edited https://github.com/llvm/llvm-project/pull/97762 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [ValueTracking] use KnownBits to compute fpclass from bitcast (PR #97762)

@@ -5921,6 +5921,63 @@ void computeKnownFPClass(const Value *V, const APInt &DemandedElts, break; } + case Instruction::BitCast: { +const Value *Src; +if (!match(Op, m_ElementWiseBitCast(m_Value(Src))) || +!Src->getType()->isIntOrIntVectorTy()) + b

[clang] [llvm] [ValueTracking] use KnownBits to compute fpclass from bitcast (PR #97762)

dtcxzyw wrote: Please update these failed tests: > Failed Tests (2): LLVM :: CodeGen/AMDGPU/anyext.ll LLVM :: CodeGen/AMDGPU/fneg-modifier-casting.ll https://github.com/llvm/llvm-project/pull/97762 ___ cfe-commits mailing list cfe-commits@lists.l

[clang] [compiler-rt] [UBSan] Diagnose assumption violation (PR #104741)

dtcxzyw wrote: Ping. https://github.com/llvm/llvm-project/pull/104741 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang][RISCV] Fix typo of vector crypto in SemaRISCV.cpp. NFC (PR #106485)

https://github.com/dtcxzyw approved this pull request. Nice catch! https://github.com/llvm/llvm-project/pull/106485 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Clang][RISCV] Recognize unsupport target feature by supporting isValidFeatureName (PR #106495)

https://github.com/dtcxzyw edited https://github.com/llvm/llvm-project/pull/106495 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Clang][RISCV] Recognize unsupport target feature by supporting isValidFeatureName (PR #106495)

https://github.com/dtcxzyw edited https://github.com/llvm/llvm-project/pull/106495 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [SCCP] Infer return attributes in SCCP as well (PR #106732)

https://github.com/dtcxzyw approved this pull request. LG. After this patch, some redundant null checks/error handlings are eliminated :) https://github.com/llvm/llvm-project/pull/106732 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https:/

[clang] [llvm] [SCCP] Infer return attributes in SCCP as well (PR #106732)

https://github.com/dtcxzyw edited https://github.com/llvm/llvm-project/pull/106732 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [SCCP] Infer return attributes in SCCP as well (PR #106732)

@@ -354,6 +354,36 @@ bool SCCPSolver::removeNonFeasibleEdges(BasicBlock *BB, DomTreeUpdater &DTU, return true; } +void SCCPSolver::inferReturnAttributes() const { + for (const auto &I : getTrackedRetVals()) { +Function *F = I.first; +const ValueLatticeElement &Retu

[clang] [llvm] [SCCP] Infer return attributes in SCCP as well (PR #106732)

@@ -277,34 +277,12 @@ static bool runIPSCCP( // whether other functions are optimizable. SmallVector ReturnsToZap; + Solver.inferReturnAttributes(); for (const auto &I : Solver.getTrackedRetVals()) { Function *F = I.first; const ValueLatticeElement &ReturnVal

[clang] [llvm] [SCCP] Infer return attributes in SCCP as well (PR #106732)

dtcxzyw wrote: > This causes some compile-time regression on lencod with LTO > (https://llvm-compile-time-tracker.com/compare.php?from=eaf87d32754beb5bec10bab517bf56e25575b48e&to=b03af0f9bc4e83de8ed78b55b1e0fc0abb9af24e&stat=instructions%3Au). > I've seen a similar regression when testing a sim

[clang] [Clang][CodeGen] Don't emit assumptions if current block is unreachable. (PR #106936)

https://github.com/dtcxzyw created https://github.com/llvm/llvm-project/pull/106936 Fixes https://github.com/llvm/llvm-project/issues/106898. When emitting an infinite loop, clang codegen will delete the whole block and leave builder's current block as nullptr: https://github.com/llvm/llvm-pro

[clang] [Clang][CodeGen] Fix type for atomic float incdec operators (PR #107075)

https://github.com/dtcxzyw created https://github.com/llvm/llvm-project/pull/107075 `llvm::ConstantFP::get(llvm::LLVMContext&, APFloat(float))` always returns a f32 constant. Fix https://github.com/llvm/llvm-project/issues/107054. >From eb403d3195cda22ca53411b2a12f259ad557f820 Mon Sep 17 00:0

[clang] [Clang][CodeGen] Fix type for atomic float incdec operators (PR #107075)

dtcxzyw wrote: cc @Krishna-13-cyber https://github.com/llvm/llvm-project/pull/107075 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [ValueLattice][SCCP] Do not track undefs (PR #107105)

https://github.com/dtcxzyw commented: Crash reproducer: ``` ; bin/opt -passes=sccp reduced.ll -S define void @debug_send_line1() { %1 = load ptr, ptr null, align 8 %2 = load ptr, ptr %1, align 8 call void %2() ret void } define void @debug_send_line2() { %1 = load ptr, ptr undef, alig

[clang] [llvm] [RISCV] Add ability to list extensions enabled for a target (PR #98207)

@@ -116,6 +115,44 @@ void llvm::riscvExtensionsHelp(StringMap DescMap) { "For example, clang -march=rv32i_v1p0\n"; } +void RISCVISAInfo::printEnabledExtensions( +bool IsRV64, std::set &EnabledFeatureNames, +StringMap &DescMap) { + outs() << "Extensions en

[clang] [llvm] [RISCV] Add support for getHostCPUFeatures using hwprobe (PR #94352)

https://github.com/dtcxzyw updated https://github.com/llvm/llvm-project/pull/94352 >From ff839bef048a65760f4cd0e9abafe11cfebd9362 Mon Sep 17 00:00:00 2001 From: Yingwei Zheng Date: Tue, 4 Jun 2024 21:08:27 +0800 Subject: [PATCH 01/16] [RISCV] Add support for getHostCPUFeatures using hwprobe C

[clang] [llvm] [RISCV] Add support for getHostCPUFeatures using hwprobe (PR #94352)

https://github.com/dtcxzyw updated https://github.com/llvm/llvm-project/pull/94352 >From ff839bef048a65760f4cd0e9abafe11cfebd9362 Mon Sep 17 00:00:00 2001 From: Yingwei Zheng Date: Tue, 4 Jun 2024 21:08:27 +0800 Subject: [PATCH 01/17] [RISCV] Add support for getHostCPUFeatures using hwprobe C

[clang] [llvm] [RISCV] Add ability to list extensions enabled for a target (PR #98207)

https://github.com/dtcxzyw approved this pull request. LGTM. Thank you! https://github.com/llvm/llvm-project/pull/98207 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add support for getHostCPUFeatures using hwprobe (PR #94352)

dtcxzyw wrote: I will rebase on the top of https://github.com/llvm/llvm-project/pull/97824. https://github.com/llvm/llvm-project/pull/94352 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-com

[clang] [llvm] [RISCV] Add support for getHostCPUFeatures using hwprobe (PR #94352)

https://github.com/dtcxzyw updated https://github.com/llvm/llvm-project/pull/94352 >From ff839bef048a65760f4cd0e9abafe11cfebd9362 Mon Sep 17 00:00:00 2001 From: Yingwei Zheng Date: Tue, 4 Jun 2024 21:08:27 +0800 Subject: [PATCH 01/18] [RISCV] Add support for getHostCPUFeatures using hwprobe C

[clang] [llvm] [RISCV] Add support for getHostCPUFeatures using hwprobe (PR #94352)

dtcxzyw wrote: ``` dtcxzyw@bananapif3:/data/llvm-build$ bin/clang -mcpu=native --print-enabled-extensions clang version 19.0.0git Target: riscv64-unknown-linux-gnu Thread model: posix InstalledDir: /data/llvm-build/bin Build config: +assertions Extensions enabled for the given RISC-V target

[clang] [llvm] [RISCV] Add support for getHostCPUFeatures using hwprobe (PR #94352)

https://github.com/dtcxzyw updated https://github.com/llvm/llvm-project/pull/94352 >From ff839bef048a65760f4cd0e9abafe11cfebd9362 Mon Sep 17 00:00:00 2001 From: Yingwei Zheng Date: Tue, 4 Jun 2024 21:08:27 +0800 Subject: [PATCH 01/19] [RISCV] Add support for getHostCPUFeatures using hwprobe C

[clang] [llvm] [RISCV] Add support for getHostCPUFeatures using hwprobe (PR #94352)

dtcxzyw wrote: Ping @wangpc-pp @topperc @preames https://github.com/llvm/llvm-project/pull/94352 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add support for getHostCPUFeatures using hwprobe (PR #94352)

https://github.com/dtcxzyw updated https://github.com/llvm/llvm-project/pull/94352 >From ff839bef048a65760f4cd0e9abafe11cfebd9362 Mon Sep 17 00:00:00 2001 From: Yingwei Zheng Date: Tue, 4 Jun 2024 21:08:27 +0800 Subject: [PATCH 01/20] [RISCV] Add support for getHostCPUFeatures using hwprobe C

[clang] [llvm] [RISCV] Add support for getHostCPUFeatures using hwprobe (PR #94352)

@@ -290,8 +290,24 @@ std::string riscv::getRISCVArch(const llvm::opt::ArgList &Args, // 2. Get march (isa string) based on `-mcpu=` if (const Arg *A = Args.getLastArg(options::OPT_mcpu_EQ)) { StringRef CPU = A->getValue(); -if (CPU == "native") +if (CPU == "nat

[clang] [llvm] [Inliner] Propagate more attributes to params when inlining (PR #91101)

https://github.com/dtcxzyw edited https://github.com/llvm/llvm-project/pull/91101 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [Inliner] Propagate more attributes to params when inlining (PR #91101)

https://github.com/dtcxzyw commented: Oops I forgot to submit my review comment :( https://github.com/llvm/llvm-project/pull/91101 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [Inliner] Propagate more attributes to params when inlining (PR #91101)

@@ -1352,20 +1352,43 @@ static void AddParamAndFnBasicAttributes(const CallBase &CB, auto &Context = CalledFunction->getContext(); // Collect valid attributes for all params. - SmallVector ValidParamAttrs; + SmallVector ValidObjParamAttrs, ValidExactParamAttrs; bool

[clang] [llvm] [Inliner] Propagate more attributes to params when inlining (PR #91101)

@@ -1383,15 +1406,54 @@ static void AddParamAndFnBasicAttributes(const CallBase &CB, AttributeList AL = NewInnerCB->getAttributes(); for (unsigned I = 0, E = InnerCB->arg_size(); I < E; ++I) { // Check if the underlying value for the parameter is an argumen

[clang] [llvm] [Inliner] Propagate more attributes to params when inlining (PR #91101)

@@ -1352,20 +1352,43 @@ static void AddParamAndFnBasicAttributes(const CallBase &CB, auto &Context = CalledFunction->getContext(); // Collect valid attributes for all params. - SmallVector ValidParamAttrs; + SmallVector ValidObjParamAttrs, ValidExactParamAttrs; bool

[clang] [llvm] [Inliner] Propagate more attributes to params when inlining (PR #91101)

@@ -1352,20 +1352,43 @@ static void AddParamAndFnBasicAttributes(const CallBase &CB, auto &Context = CalledFunction->getContext(); // Collect valid attributes for all params. - SmallVector ValidParamAttrs; + SmallVector ValidObjParamAttrs, ValidExactParamAttrs; bool

[clang] [llvm] [RISCV] Add sifive-p470 processor (PR #102022)

@@ -266,11 +272,47 @@ def SIFIVE_P450 : RISCVProcessorModel<"sifive-p450", SiFiveP400Model, FeatureStdExtZfhmin, FeatureUnalignedScalarMem, FeatureUnalignedVect

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