[clang] [NFC][Clang][RISCV] Fix index typos of riscv-v-spec doc in riscv_vector.td (PR #65944)

https://github.com/punkyc created https://github.com/llvm/llvm-project/pull/65944: Fix index typos, s.t. indexes in comments be same with riscv-v-spec doc. >From 01a0763aa8c624834c5f6a98df22e75f3f5ae96b Mon Sep 17 00:00:00 2001 From: Ying Chen Date: Mon, 11 Sep 2023 18:36:22 +0800 Subject: [P

[clang] [NFC][Clang][RISCV] Fix index typos of riscv-v-spec doc in riscv_vector.td (PR #65944)

https://github.com/punkyc review_requested https://github.com/llvm/llvm-project/pull/65944 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [NFC][Clang][RISCV] Fix index typos of riscv-v-spec doc in riscv_vector.td (PR #65944)

https://github.com/punkyc updated https://github.com/llvm/llvm-project/pull/65944: >From 01a0763aa8c624834c5f6a98df22e75f3f5ae96b Mon Sep 17 00:00:00 2001 From: Ying Chen Date: Mon, 11 Sep 2023 18:36:22 +0800 Subject: [PATCH 1/2] [NFC][Clang][RISCV] Fix index typos of riscv-v-spec doc in risc

[clang] [NFC][Clang][RISCV] Fix index typos of riscv-v-spec doc in riscv_vector.td (PR #65944)

@@ -1660,29 +1660,29 @@ let HasMasked = false, MaskedPolicyScheme = NonePolicy in { defm vmsbc : RVVIntMaskOutBuiltinSet; } -// 12.5. Vector Bitwise Logical Instructions +// 11.5. Vector Bitwise Logical Instructions let UnMaskedPolicyScheme = HasPassthruOperand in { defm

[clang] [NFC][Clang][RISCV] Fix index typos of riscv-v-spec doc in riscv_vector.td (PR #65944)

@@ -1660,29 +1660,29 @@ let HasMasked = false, MaskedPolicyScheme = NonePolicy in { defm vmsbc : RVVIntMaskOutBuiltinSet; } -// 12.5. Vector Bitwise Logical Instructions +// 11.5. Vector Bitwise Logical Instructions let UnMaskedPolicyScheme = HasPassthruOperand in { defm

[clang] [NFC][Clang][RISCV] Fix index typos of riscv-v-spec doc in riscv_vector.td (PR #65944)

@@ -2262,11 +2262,11 @@ defm vmfgt : RVVFloatingMaskOutBuiltinSet; defm vmfge : RVVFloatingMaskOutBuiltinSet; } -// 14.14. Vector Floating-Point Classify Instruction +// 13.14. Vector Floating-Point Classify Instruction let Name = "vfclass_v", UnMaskedPolicyScheme = HasPassth

[clang] [NFC][Clang][RISCV] Fix typos of riscv-v-spec doc in riscv_vector.td (PR #65944)

https://github.com/punkyc edited https://github.com/llvm/llvm-project/pull/65944 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add shlcofideleg extension (PR #141572)

https://github.com/punkyc created https://github.com/llvm/llvm-project/pull/141572 This is for `shlcofideleg` extension, that supports delegating LCOFI interrupts to VS-mode. Spec: https://github.com/riscv/riscv-isa-manual/blob/main/src/supervisor.adoc >From 385ae3040ae39d62702c430e2d0b79b80b

[clang] [llvm] [RISCV] Add shlcofideleg extension (PR #141572)

punkyc wrote: @topperc @wangpc-pp Please help to merge. https://github.com/llvm/llvm-project/pull/141572 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [RISCV] Add shlcofideleg extension (PR #141572)

https://github.com/punkyc updated https://github.com/llvm/llvm-project/pull/141572 >From 385ae3040ae39d62702c430e2d0b79b80b30e36b Mon Sep 17 00:00:00 2001 From: punkyc Date: Tue, 27 May 2025 17:21:12 +0800 Subject: [PATCH 1/3] [RISCV] Add shlcofideleg extension --- clang/test/Driver/print-sup