[PATCH] D98907: [WebAssembly] Remove qfma/qfms from wasm_simd128.h

tlively created this revision. tlively added reviewers: aheejin, dschuff. Herald added subscribers: wingo, ecnelises, sunfish, jgravelle-google, sbc100. tlively requested review of this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. These experimental builtin func

[PATCH] D98907: [WebAssembly] Remove experimental instructions from wasm_simd128.h

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGcbab2cd6bf77: [WebAssembly] Remove experimental instructions from wasm_simd128.h (authored by tlively). Repository: rG LLVM Github Monorepo CHANG

[PATCH] D99623: [WebAssembly] Implement i64x2 comparisons

tlively created this revision. tlively added reviewers: aheejin, dschuff. Herald added subscribers: wingo, ecnelises, sunfish, hiraditya, jgravelle-google, sbc100. tlively requested review of this revision. Herald added projects: clang, LLVM. Herald added subscribers: llvm-commits, cfe-commits. R

[PATCH] D99623: [WebAssembly] Implement i64x2 comparisons

tlively added inline comments. Comment at: clang/include/clang/Basic/BuiltinsWebAssembly.def:218 -TARGET_BUILTIN(__builtin_wasm_eq_i64x2, "V2LLiV2LLiV2LLi", "nc", "simd128") - dschuff wrote: > Is the builtin/intrinsic wrong now? Or just not necessary because we

[PATCH] D99623: [WebAssembly] Implement i64x2 comparisons

tlively added inline comments. Comment at: llvm/test/CodeGen/WebAssembly/simd-select.ll:313 ; CHECK-NEXT:# fallthrough-return <2 x i64> %x, <2 x i64> %y) { %c = icmp slt <2 x i64> %a, %b tlively wrote: > dschuff wrote:

[PATCH] D99623: [WebAssembly] Implement i64x2 comparisons

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG45783d0e8a36: [WebAssembly] Implement i64x2 comparisons (authored by tlively). Changed prior to commit: https://reviews.llvm.org/D99623?vs=334280&

[PATCH] D100402: [WebAssembly] Codegen for i64x2.extend_{low,high}_i32x4_{s,u}

tlively created this revision. tlively added reviewers: aheejin, dschuff. Herald added subscribers: wingo, ecnelises, sunfish, hiraditya, jgravelle-google, sbc100. tlively requested review of this revision. Herald added projects: clang, LLVM. Herald added subscribers: llvm-commits, cfe-commits. R

[PATCH] D100411: [WebAssembly] Use standard intrinsics for f32x4 and f64x2 ops

tlively created this revision. tlively added reviewers: aheejin, dschuff. Herald added subscribers: wingo, ecnelises, sunfish, hiraditya, jgravelle-google, sbc100. tlively requested review of this revision. Herald added projects: clang, LLVM. Herald added subscribers: llvm-commits, cfe-commits. N

[PATCH] D100425: [WebAssembly] Codegen for f64x2.convert_low_i32x4_{s,u}

tlively created this revision. tlively added reviewers: aheejin, dschuff. Herald added subscribers: wingo, ecnelises, sunfish, hiraditya, jgravelle-google, sbc100. tlively requested review of this revision. Herald added projects: clang, LLVM. Herald added subscribers: llvm-commits, cfe-commits. A

[PATCH] D100411: [WebAssembly] Use standard intrinsics for f32x4 and f64x2 ops

tlively added a comment. The Wasm rounding semantics (https://webassembly.github.io/spec/core/exec/numerics.html#op-fnearest) are essentially the same as the semantics for roundeven (https://llvm.org/docs/LangRef.html#llvm-roundeven-intrinsic, added to LLVM in May 2020), so that would be the l

[PATCH] D100411: [WebAssembly] Use standard intrinsics for f32x4 and f64x2 ops

This revision was automatically updated to reflect the committed changes. Closed by commit rGaf7ab81ce310: [WebAssembly] Use standard intrinsics for f32x4 and f64x2 ops (authored by tlively). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D100411/new/

[PATCH] D100425: [WebAssembly] Codegen for f64x2.convert_low_i32x4_{s,u}

This revision was automatically updated to reflect the committed changes. Closed by commit rGaf7925b4dd65: [WebAssembly] Codegen for f64x2.convert_low_i32x4_{s,u} (authored by tlively). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D100425/new/ https

[PATCH] D100425: [WebAssembly] Codegen for f64x2.convert_low_i32x4_{s,u}

tlively added inline comments. Comment at: llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td:1104-1107 +defm "" : SIMDConvert; +defm "" : SIMDConvert; +defm "" : SIMDConvert; +defm "" : SIMDConvert; aheejin wrote: > Not related to this CL, but we write encoding

[PATCH] D100402: [WebAssembly] Codegen for i64x2.extend_{low,high}_i32x4_{s,u}

This revision was automatically updated to reflect the committed changes. Closed by commit rG6a18cc23efad: [WebAssembly] Codegen for i64x2.extend_{low,high}_i32x4_{s,u} (authored by tlively). Changed prior to commit: https://reviews.llvm.org/D100402?vs=337213&id=337540#toc Repository: rG LLV

[PATCH] D100596: [WebAssembly] Remove saturating fp-to-int target intrinsics

tlively created this revision. tlively added reviewers: aheejin, dschuff. Herald added subscribers: wingo, ecnelises, sunfish, hiraditya, jgravelle-google, sbc100. tlively requested review of this revision. Herald added projects: clang, LLVM. Herald added subscribers: llvm-commits, cfe-commits. U

[PATCH] D100596: [WebAssembly] Remove saturating fp-to-int target intrinsics

tlively added inline comments. Comment at: llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp:124-127 + if (Subtarget->hasNontrappingFPToInt()) +for (auto Op : {ISD::FP_TO_SINT_SAT, ISD::FP_TO_UINT_SAT}) + for (auto T : {MVT::i32, MVT::i64}) +setOperationAc

[PATCH] D100596: [WebAssembly] Remove saturating fp-to-int target intrinsics

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG5c729750a6d7: [WebAssembly] Remove saturating fp-to-int target intrinsics (authored by tlively). Changed prior to commit: https://reviews.llvm.org

[PATCH] D93775: [WebAssembly] Prototype extending pairwise add instructions

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG5e09e9979bc6: [WebAssembly] Prototype extending pairwise add instructions (authored by tlively). Repository: rG LLVM Github Monorepo CHANGES SINC

[PATCH] D93883: [WebAssembly] Prototype prefetch instructions

tlively created this revision. tlively added a reviewer: aheejin. Herald added subscribers: wingo, ecnelises, sunfish, hiraditya, jgravelle-google, sbc100, dschuff. tlively requested review of this revision. Herald added projects: clang, LLVM. Herald added subscribers: llvm-commits, cfe-commits.

[PATCH] D93883: [WebAssembly] Prototype prefetch instructions

tlively updated this revision to Diff 314647. tlively marked 3 inline comments as done. tlively added a comment. - Fix section headers in test file Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D93883/new/ https://reviews.llvm.org/D93883 Files: c

[PATCH] D93883: [WebAssembly] Prototype prefetch instructions

tlively added inline comments. Comment at: llvm/include/llvm/IR/IntrinsicsWebAssembly.td:318 + Intrinsic<[], [llvm_ptr_ty], +[IntrInaccessibleMemOrArgMemOnly, IntrWillReturn, + ReadOnly>, NoCapture>], aheejin wrote: > It [[ > https://git

[PATCH] D94038: [WebAssembly] Rename wasm_rethrow_in_catch intrinsic/builtin

tlively accepted this revision. tlively added inline comments. This revision is now accepted and ready to land. Comment at: llvm/include/llvm/IR/IntrinsicsWebAssembly.td:53 // throw / rethrow +// The immediate argument is an index to for a tag, which is 0 for C++. def int_wasm_

[PATCH] D94039: [WebAssembly] Update WasmEHPrepare for the new spec

tlively added a comment. In the description I think "but LLVM does not have a way of that kind of behavior" is missing the word "modeling" => "but LLVM does not have a way of modeling that kind of behavior" Comment at: llvm/lib/CodeGen/WasmEHPrepare.cpp:374-375 + // be lower

[PATCH] D93883: [WebAssembly] Prototype prefetch instructions

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG497026c90233: [WebAssembly] Prototype prefetch instructions (authored by tlively). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D94039: [WebAssembly] Update WasmEHPrepare for the new spec

tlively added inline comments. Comment at: llvm/lib/CodeGen/WasmEHPrepare.cpp:374-375 + // be lowered to wasm 'catch' instruction. We do this mainly because + // instruction selection cannot handle wasm.get.exception intrinsic's token + // argument. + Instruction *CatchCI = -

[PATCH] D95012: [WebAssembly] Prototype new f64x2 conversions

tlively created this revision. tlively added a reviewer: aheejin. Herald added subscribers: wingo, ecnelises, sunfish, hiraditya, jgravelle-google, sbc100, dschuff. tlively requested review of this revision. Herald added projects: clang, LLVM. Herald added subscribers: llvm-commits, cfe-commits.

[PATCH] D95012: [WebAssembly] Prototype new f64x2 conversions

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG11802eced5d6: [WebAssembly] Prototype new f64x2 conversions (authored by tlively). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D111914: [WebAssembly] Add prototype relaxed laneselect instructions

tlively accepted this revision. tlively added a comment. This revision is now accepted and ready to land. Awesome, thanks! I'll go ahead and land this. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D111914/new/ https://reviews.llvm.org/D111914

[PATCH] D111914: [WebAssembly] Add prototype relaxed laneselect instructions

tlively closed this revision. tlively added a comment. I forgot to include the revision URL in the commit message, but this has been landed as rGda07942834fe Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D111154: [WebAssembly] Implementation of table.get/set for reftypes in LLVM IR

tlively added a comment. This is looking good! I'll take a more thorough pass through tomorrow so we can get this landed. Comment at: llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp:1455 + const SDValue &Base, +

[PATCH] D112022: [WebAssembly] Add prototype relaxed swizzle instructions

tlively added inline comments. Comment at: llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td:1365 + +def wasm_relaxed_swizzle : SDNode<"WebAssemblyISD::RELAXED_SWIZZLE", wasm_swizzle_t>; + ngzhian wrote: > @tlively i'm not 100% sure if this is needed or the ri

[PATCH] D112022: [WebAssembly] Add prototype relaxed swizzle instructions

tlively accepted this revision. tlively added a comment. This revision is now accepted and ready to land. Thanks! I'll go ahead and land this. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D112022/new/ https://reviews.llvm.org/D112022 _

[PATCH] D112022: [WebAssembly] Add prototype relaxed swizzle instructions

This revision was automatically updated to reflect the committed changes. Closed by commit rG2542bfa43a97: [WebAssembly] Add prototype relaxed swizzle instructions (authored by ngzhian, committed by tlively). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.

[PATCH] D111154: [WebAssembly] Implementation of table.get/set for reftypes in LLVM IR

tlively accepted this revision. tlively added a comment. This revision is now accepted and ready to land. Nice! Just a couple nits but I think this is good to go. Comment at: llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp:1478-1479 + } else { +GA = dyn_cast(Base->

[PATCH] D112146: [WebAssembly] Add prototype relaxed float min max instructions

tlively accepted this revision. tlively added a comment. This revision is now accepted and ready to land. LGTM! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D112146/new/ https://reviews.llvm.org/D112146

[PATCH] D112146: [WebAssembly] Add prototype relaxed float min max instructions

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGe1fb13401e1b: [WebAssembly] Add prototype relaxed float min max instructions (authored by ngzhian, committed by tlively). Repository: rG LLVM Gith

[PATCH] D108412: [WebAssembly] Add SIMD intrinsics using unsigned integers

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG2456e11614c1: [WebAssembly] Add SIMD intrinsics using unsigned integers (authored by tlively). Changed prior to commit: https://reviews.llvm.org/D

[PATCH] D108415: [WebAssembly] Make shift values unsigned in wasm_simd128.h

This revision was automatically updated to reflect the committed changes. Closed by commit rG64a9957bf7b6: [WebAssembly] Make shift values unsigned in wasm_simd128.h (authored by tlively). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D108415/new/ ht

[PATCH] D108387: [WebAssembly] Restore builtins and intrinsics for pmin/pmax

This revision was automatically updated to reflect the committed changes. Closed by commit rG88962cea4680: [WebAssembly] Restore builtins and intrinsics for pmin/pmax (authored by tlively). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D108387/new/ h

[PATCH] D108464: [clang][CodeGen] Refactor CreateTempAlloca function nest. NFC.

tlively added a comment. In D108464#2960623 , @rjmccall wrote: > + JF, who knows something about Web Assembly, or can at least drag in the > right people > > In D108464#2959591 , @wingo wrote: > >> In D108464#295

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