https://github.com/s-perron commented:
The implementation looks good to me. I just wonder about one of the tests. I'd
like to know why we need to handle that case, and how prevalent the
`addrspacecast`s will be.
https://github.com/llvm/llvm-project/pull/116636
_
@@ -3388,6 +3398,13 @@ bool SPIRVInstructionSelector::selectGlobalValue(
GVType, MIRBuilder, SPIRV::AccessQualifier::ReadWrite, false);
}
+ const unsigned AddrSpace = GV->getAddressSpace();
+ SPIRV::StorageClass::StorageClass StorageClass =
+ addressSpaceToSto
https://github.com/s-perron edited
https://github.com/llvm/llvm-project/pull/117017
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@@ -6,14 +6,17 @@ RasterizerOrderedStructuredBuffer Out2;
[numthreads(1,1,1)]
void main(unsigned GI : SV_GroupIndex) {
+ // CHECK: define void @main()
+
+ // CHECK: %[[INPTR:.*]] = call noundef nonnull align 4 dereferenceable(4)
ptr
@llvm.dx.resource.getpointer.p0.tdx.RawB
Nathan =?utf-8?q?Gau=C3=ABr?=
Message-ID:
In-Reply-To:
https://github.com/s-perron approved this pull request.
https://github.com/llvm/llvm-project/pull/118312
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Nathan =?utf-8?q?Gauër?=
Message-ID:
In-Reply-To:
@@ -0,0 +1,17 @@
+; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown %s -o -
| FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o -
-filetype=obj | spirv-val %}
+
+@PrivIn
Nathan =?utf-8?q?Gau=C3=ABr?=
Message-ID:
In-Reply-To:
https://github.com/s-perron approved this pull request.
https://github.com/llvm/llvm-project/pull/116636
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@@ -164,6 +164,16 @@ def HLSLBufferObj : SubsetSubject(S)}],
"cbuffer/tbuffer">;
+def HLSLInputBuiltin : SubsetSubjecthasGlobalStorage() &&
S->getType().isConstQualified() &&
+ S->getStorageClass()==StorageClass::SC_Static}],
+
@@ -204,7 +204,11 @@ addressSpaceToStorageClass(unsigned AddrSpace, const
SPIRVSubtarget &STI) {
? SPIRV::StorageClass::HostOnlyINTEL
: SPIRV::StorageClass::CrossWorkgroup;
case 7:
+return SPIRV::StorageClass::Private;
+ case 8:
return
@@ -43,7 +43,7 @@ void neg() {
template
void tooBig() {
- __attribute__((address_space(I))) int *bounds; // expected-error {{address
space is larger than the maximum supported (8388586)}}
+ __attribute__((address_space(I))) int *bounds; // expected-error {{address
space i
@@ -59,6 +59,9 @@ enum class LangAS : unsigned {
// HLSL specific address spaces.
hlsl_groupshared,
+ // Vulkan specific address spaces.
+ vulkan_private,
+
s-perron wrote:
Do we need a new address space? This is not an issue specific to these input
an
@@ -379,6 +380,18 @@ llvm::Value *CGHLSLRuntime::emitInputSemantic(IRBuilder<>
&B,
const ParmVarDecl &D,
llvm::Type *Ty) {
assert(D.hasAttrs() && "Entry parameter missing annotation a
https://github.com/s-perron commented:
This aligns with what I was thinking. Thanks. My only real question is if we
have to use the new address space. We might need to figure out how to handle
regular static variables first, and then we can revisit this.
https://github.com/llvm/llvm-project/pu
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https://github.com/llvm/llvm-project/pull/116393
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In DXC, setting the vulkan version automatically sets the target spir-v
version to the maximum spir-v version that the vulkan version must
support. So for Vulkan 1.2, we set the spir-v version to spirv 1.5
becau
https://github.com/s-perron created
https://github.com/llvm/llvm-project/pull/121963
Use the spv version of the resource.getpointeri intrinsic when targeting
SPIR-V.
>From 8e182fe89678e98ebba3664f4c1878301e57445a Mon Sep 17 00:00:00 2001
From: Steven Perron
Date: Tue, 3 Dec 2024 11:00:44 -050
https://github.com/s-perron created
https://github.com/llvm/llvm-project/pull/125718
The resource wrapper should have internal linkage because it cotains a
handle to the global resource, and it not the actual global.
Makeing this changed exposed that we were zeroinitializing the resouce,
which
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s-perron wrote:
The other option is https://github.com/llvm/llvm-project/pull/123811. However,
can you clarify "separate compilation". It is not clear to me exactly what type
of linking you have in mind. This make it hard for me to reason about what
should be done, and when.
Are you thinking
@@ -0,0 +1,17 @@
+; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv-unknown-unknown %s -o - |
FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-unknown %s -o -
-filetype=obj | spirv-val %}
+
+; CHECK-DAG: %[[#bool:]] = OpTypeBool
+; CHECK-DAG: %[[#uint:]]
@@ -3158,6 +3172,166 @@ bool
SPIRVInstructionSelector::selectFirstBitHigh(Register ResVReg,
}
}
+bool SPIRVInstructionSelector::selectFirstBitLow16(Register ResVReg,
+ const SPIRVType *ResType,
+
https://github.com/s-perron edited
https://github.com/llvm/llvm-project/pull/116858
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@@ -1949,24 +1949,36 @@ bool SPIRVInstructionSelector::selectSign(Register
ResVReg,
return Result;
}
+bool SPIRVInstructionSelector::selectWaveOpInst(Register ResVReg,
+const SPIRVType *ResType,
+
@@ -3158,6 +3172,166 @@ bool
SPIRVInstructionSelector::selectFirstBitHigh(Register ResVReg,
}
}
+bool SPIRVInstructionSelector::selectFirstBitLow16(Register ResVReg,
+ const SPIRVType *ResType,
+
https://github.com/s-perron commented:
I hoping we can make this simpler than the Msb builtins. I'll double check that.
https://github.com/llvm/llvm-project/pull/116858
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s-perron wrote:
Is there a difference between this test and
`llvm/test/CodeGen/SPIRV/HLSLControlFlowHint.ll`? If not, you probably only
need one.
https://github.com/llvm/llvm-project/pull/116331
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@@ -1908,9 +1908,9 @@ bool SemaHLSL::CheckBuiltinFunctionCall(unsigned
BuiltinID, CallExpr *TheCall) {
return true;
// ensure both args have 3 elements
int NumElementsArg1 =
-TheCall->getArg(0)->getType()->getAs()->getNumElements();
+TheCall->getA
@@ -3158,6 +3172,166 @@ bool
SPIRVInstructionSelector::selectFirstBitHigh(Register ResVReg,
}
}
+bool SPIRVInstructionSelector::selectFirstBitLow16(Register ResVReg,
+ const SPIRVType *ResType,
+
@@ -3158,6 +3172,166 @@ bool
SPIRVInstructionSelector::selectFirstBitHigh(Register ResVReg,
}
}
+bool SPIRVInstructionSelector::selectFirstBitLow16(Register ResVReg,
+ const SPIRVType *ResType,
+
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@@ -3158,6 +3172,166 @@ bool
SPIRVInstructionSelector::selectFirstBitHigh(Register ResVReg,
}
}
+bool SPIRVInstructionSelector::selectFirstBitLow16(Register ResVReg,
+ const SPIRVType *ResType,
+
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@@ -0,0 +1,104 @@
+; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv-unknown-unknown %s -o - |
FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-unknown %s -o -
-filetype=obj | spirv-val %}
+
+; CHECK-DAG: [[glsl_450_ext:%.+]] = OpExtInstImport "GLSL.std.4
@@ -3158,6 +3172,166 @@ bool
SPIRVInstructionSelector::selectFirstBitHigh(Register ResVReg,
}
}
+bool SPIRVInstructionSelector::selectFirstBitLow16(Register ResVReg,
+ const SPIRVType *ResType,
+
@@ -3158,6 +3172,166 @@ bool
SPIRVInstructionSelector::selectFirstBitHigh(Register ResVReg,
}
}
+bool SPIRVInstructionSelector::selectFirstBitLow16(Register ResVReg,
+ const SPIRVType *ResType,
+
@@ -3158,6 +3172,166 @@ bool
SPIRVInstructionSelector::selectFirstBitHigh(Register ResVReg,
}
}
+bool SPIRVInstructionSelector::selectFirstBitLow16(Register ResVReg,
+ const SPIRVType *ResType,
+
https://github.com/s-perron commented:
There is only potential problem with the vector sizes. Sorry I did not catch
that on the previous PR. I would also like to see the code refactored a little
to reduce the amount of repeated code. I think each step except for 2 in
`selectFirstBit*64` could
@@ -588,7 +588,7 @@ llvm::Function
*CGHLSLRuntime::createResourceBindingInitFn() {
auto *Slot = llvm::ConstantInt::get(CGM.IntTy, RBA->getSlotNumber());
// FIXME: resource arrays are not yet implemented
auto *Range = llvm::ConstantInt::get(CGM.IntTy, 1);
-
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@@ -588,7 +588,7 @@ llvm::Function
*CGHLSLRuntime::createResourceBindingInitFn() {
auto *Slot = llvm::ConstantInt::get(CGM.IntTy, RBA->getSlotNumber());
// FIXME: resource arrays are not yet implemented
auto *Range = llvm::ConstantInt::get(CGM.IntTy, 1);
-
https://github.com/s-perron commented:
This generally looks okay for the SPIR-V side.
https://github.com/llvm/llvm-project/pull/117017
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https://github.com/llvm/llvm-project/pull/121963
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@@ -118,6 +118,10 @@ let TargetPrefix = "spv" in {
: DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_any_ty, llvm_i8_ty],
[IntrInaccessibleMemOrArgMemOnly]>;
+ def int_spv_resource_getpointer
s-perron wrote:
That proposal is st
@@ -118,6 +118,10 @@ let TargetPrefix = "spv" in {
: DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_any_ty, llvm_i8_ty],
[IntrInaccessibleMemOrArgMemOnly]>;
+ def int_spv_resource_getpointer
s-perron wrote:
Also, the current n
s-perron wrote:
The failure is unrelated to my change.
https://github.com/llvm/llvm-project/pull/121963
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s-perron wrote:
Failure is unrelated to my change.
https://github.com/llvm/llvm-project/pull/121961
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@@ -1468,9 +1468,14 @@ Compilation *Driver::BuildCompilation(ArrayRef ArgList) {
// Set specific Vulkan version if applicable.
if (const Arg *A = Args.getLastArg(options::OPT_fspv_target_env_EQ)) {
- const llvm::StringSet<> ValidValues = {"vulkan1.2",
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@@ -536,89 +536,84 @@ void CGHLSLRuntime::generateGlobalCtorDtorCalls() {
}
}
-void CGHLSLRuntime::handleGlobalVarDefinition(const VarDecl *VD,
- llvm::GlobalVariable *GV) {
- // If the global variable has resource binding, add i
@@ -2132,6 +2135,33 @@ bool SPIRVInstructionSelector::selectWaveActiveCountBits(
return Result;
}
+bool SPIRVInstructionSelector::selectWaveReduceMax(Register ResVReg,
+ const SPIRVType *ResType,
+
https://github.com/s-perron approved this pull request.
LGTM, just a couple small touchups.
https://github.com/llvm/llvm-project/pull/123428
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@@ -0,0 +1,55 @@
+; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv-vulkan-unknown %s -o - |
FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-vulkan-unknown %s -o -
-filetype=obj | spirv-val %}
+
+; Test lowering to spir-v backend for various types and scalar/vec
https://github.com/s-perron approved this pull request.
https://github.com/llvm/llvm-project/pull/123394
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@@ -536,89 +536,84 @@ void CGHLSLRuntime::generateGlobalCtorDtorCalls() {
}
}
-void CGHLSLRuntime::handleGlobalVarDefinition(const VarDecl *VD,
- llvm::GlobalVariable *GV) {
- // If the global variable has resource binding, add i
https://github.com/s-perron closed
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https://github.com/s-perron created
https://github.com/llvm/llvm-project/pull/123795
- **[SPIRV] Expand RWBuffer load and store from HLSL**
- **Move type deduction for getpointer into `CallInst` case.**
- **Remove unused table entry.**
- **Move DXILFinalizeLinkage out of backend to clang.**
- **
https://github.com/s-perron updated
https://github.com/llvm/llvm-project/pull/123811
>From 4e62f38b70c0c0ae130d0379ebee4d3f3bcb4797 Mon Sep 17 00:00:00 2001
From: Steven Perron
Date: Thu, 16 Jan 2025 11:32:16 -0500
Subject: [PATCH] [HLSL] Create HLSL legalization passes
The semantics of HLSL r
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https://github.com/llvm/llvm-project/pull/123811
>From 4e62f38b70c0c0ae130d0379ebee4d3f3bcb4797 Mon Sep 17 00:00:00 2001
From: Steven Perron
Date: Thu, 16 Jan 2025 11:32:16 -0500
Subject: [PATCH 1/2] [HLSL] Create HLSL legalization passes
The semantics of HL
https://github.com/s-perron created
https://github.com/llvm/llvm-project/pull/123811
The semantics of HLSL require passes some passes to be run that will
modify the llvm-ir created by clang to match what is expected by the
backend.
In this PR, wewe move the DXILFinalizeLinkage to be run for all
@@ -61,7 +61,7 @@ unsigned RemoveDupes(unsigned Buf[MAX], unsigned size) {
}
-RWBuffer Indices;
+RWBuffer Indices : register(u0);
s-perron wrote:
Resources without explicit register assignments are not supported yet. If we do
not do this then we end up with
@@ -1164,6 +1166,12 @@ void EmitAssemblyHelper::RunOptimizationPipeline(
LangOpts.HIPStdParInterposeAlloc)
MPM.addPass(HipStdParAllocationInterpositionPass());
+ if (LangOpts.HLSL) {
+// HLSL legalization passes
+MPM.addPass(HLSLFinalizeLinkage());
+MPM.
https://github.com/s-perron updated
https://github.com/llvm/llvm-project/pull/123811
>From 4e62f38b70c0c0ae130d0379ebee4d3f3bcb4797 Mon Sep 17 00:00:00 2001
From: Steven Perron
Date: Thu, 16 Jan 2025 11:32:16 -0500
Subject: [PATCH 1/2] [HLSL] Create HLSL legalization passes
The semantics of HL
https://github.com/s-perron approved this pull request.
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@@ -3181,136 +3193,250 @@ Register
SPIRVInstructionSelector::buildPointerToResource(
return AcReg;
}
-bool SPIRVInstructionSelector::selectFirstBitHigh16(Register ResVReg,
-const SPIRVType *ResType,
-
s-perron wrote:
The non-uniform group operand require the `GroupNonUniformArithmetic`
capability. You should be checking for that in the test. If it is not being
added, you might need to update SPIRVModuleAnalysis.cpp.
https://github.com/llvm/llvm-project/pul
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https://github.com/s-perron commented:
I will take a look to see if the capabilities are correctly generated. At the
very least, I think the spirv test should check the capabilities.
https://github.com/llvm/llvm-project/pull/118580
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@@ -0,0 +1,41 @@
+; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv32v1.3-vulkan-unknown %s -o
- | FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv32v1.3-vulkan-unknown %s -o -
-filetype=obj | spirv-val %}
s-perron wrote:
```suggestion
; RUN: ll
@@ -0,0 +1,41 @@
+; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv32v1.3-vulkan-unknown %s -o
- | FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv32v1.3-vulkan-unknown %s -o -
-filetype=obj | spirv-val %}
s-perron wrote:
Once you make that chan
@@ -0,0 +1,56 @@
+; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv32v1.3-vulkan-unknown %s -o
- | FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv32v1.3-vulkan-unknown %s -o -
-filetype=obj | spirv-val %}
s-perron wrote:
Sorry I missed this in
https://github.com/s-perron requested changes to this pull request.
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@@ -0,0 +1,56 @@
+; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv32v1.3-vulkan-unknown %s -o
- | FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv32v1.3-vulkan-unknown %s -o -
-filetype=obj | spirv-val %}
s-perron wrote:
I don't think anything
@@ -0,0 +1,56 @@
+; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv32v1.3-vulkan-unknown %s -o
- | FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv32v1.3-vulkan-unknown %s -o -
-filetype=obj | spirv-val %}
s-perron wrote:
https://github.com/llvm
@@ -3181,136 +3193,250 @@ Register
SPIRVInstructionSelector::buildPointerToResource(
return AcReg;
}
-bool SPIRVInstructionSelector::selectFirstBitHigh16(Register ResVReg,
-const SPIRVType *ResType,
-
@@ -3181,136 +3193,250 @@ Register
SPIRVInstructionSelector::buildPointerToResource(
return AcReg;
}
-bool SPIRVInstructionSelector::selectFirstBitHigh16(Register ResVReg,
-const SPIRVType *ResType,
-
@@ -3181,136 +3193,250 @@ Register
SPIRVInstructionSelector::buildPointerToResource(
return AcReg;
}
-bool SPIRVInstructionSelector::selectFirstBitHigh16(Register ResVReg,
-const SPIRVType *ResType,
-
https://github.com/s-perron approved this pull request.
Generally looks good to me. Thanks for fixing up the vector size issue. I have
a couple minor issue, but I'm fine with this.
https://github.com/llvm/llvm-project/pull/116858
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https://github.com/s-perron approved this pull request.
https://github.com/llvm/llvm-project/pull/122202
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@@ -33,6 +33,14 @@ constexpr enable_if_t bit_cast(T
F) {
return __builtin_bit_cast(U, F);
}
+constexpr vector d3d_color_to_ubyte4(vector V) {
+ // Use the same scaling factor used by FXC (i.e., 255.001953)
+ // Excerpt from stackoverflow discussion:
+ // "Built-in roundi
@@ -3181,136 +3193,250 @@ Register
SPIRVInstructionSelector::buildPointerToResource(
return AcReg;
}
-bool SPIRVInstructionSelector::selectFirstBitHigh16(Register ResVReg,
-const SPIRVType *ResType,
-
https://github.com/s-perron approved this pull request.
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https://github.com/s-perron approved this pull request.
I don't see any problem, but I'm not familiar with standard practices in llvm.
I like having the combiner pass.
https://github.com/llvm/llvm-project/pull/122839
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@@ -104,6 +104,8 @@ class CGHLSLRuntime {
GENERATE_HLSL_INTRINSIC_FUNCTION(SClamp, sclamp)
GENERATE_HLSL_INTRINSIC_FUNCTION(UClamp, uclamp)
+ GENERATE_HLSL_INTRINSIC_FUNCTION(CreateResourceGetPointer,
s-perron wrote:
I was following the example of `Creat
https://github.com/s-perron closed
https://github.com/llvm/llvm-project/pull/121961
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s-perron wrote:
The spir-v test failures are unrelated to your change. It is caused by a
problem in spirv-val, and it has been fixed.Don't let that stop you from
merging.
https://github.com/llvm/llvm-project/pull/116858
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c
@@ -0,0 +1,219 @@
+; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv-unknown-unknown %s -o - |
FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-unknown %s -o -
-filetype=obj | spirv-val %}
+
+; CHECK-DAG: [[glsl_450_ext:%.+]] = OpExtInstImport "GLSL.std.4
https://github.com/s-perron closed
https://github.com/llvm/llvm-project/pull/125718
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s-perron wrote:
We discussed, and we will be make the wrapper static, but it should be done in
sema.
https://github.com/llvm/llvm-project/pull/125718
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s-perron wrote:
> 2\. It feels wrong to do this in CodeGen. It seems like we should be
> identifying an appropriate storage class in Sema such that we assign the
> correct linkage automatically.
If we change the storage class in Sema, then codegen is not able to distinguish
between:
```
stat
https://github.com/s-perron created
https://github.com/llvm/llvm-project/pull/127675
We add the hlsl_device address space to represent the device memory
space as defined in section 1.7.1.3 of the [HLSL
spec](https://microsoft.github.io/hlsl-specs/specs/hlsl.pdf).
Fixes https://github.com/llvm/l
@@ -94,6 +94,11 @@ bool Qualifiers::isTargetAddressSpaceSupersetOf(LangAS A,
LangAS B,
(A == LangAS::Default &&
(B == LangAS::cuda_constant || B == LangAS::cuda_device ||
B == LangAS::cuda_shared)) ||
+ // In HLSL, the this pointer for mem
https://github.com/s-perron updated
https://github.com/llvm/llvm-project/pull/125718
>From a65ccd00e3201af94059a2431f29da6ebfa6 Mon Sep 17 00:00:00 2001
From: Steven Perron
Date: Tue, 4 Feb 2025 11:47:42 -0500
Subject: [PATCH 1/2] [HLSL] Fix resrouce wrapper declaration
The resource wrappe
https://github.com/s-perron converted_to_draft
https://github.com/llvm/llvm-project/pull/125718
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https://github.com/s-perron updated
https://github.com/llvm/llvm-project/pull/125718
>From 3ba76b95757a43002d8f799651d7846658011e37 Mon Sep 17 00:00:00 2001
From: Steven Perron
Date: Tue, 4 Feb 2025 11:47:42 -0500
Subject: [PATCH 1/2] [HLSL] Fix resrouce wrapper declaration
The resource wrappe
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