r367399 - [RISCV] Add support for floating point registers in inlineasm

Author: simoncook Date: Wed Jul 31 02:12:00 2019 New Revision: 367399 URL: http://llvm.org/viewvc/llvm-project?rev=367399&view=rev Log: [RISCV] Add support for floating point registers in inlineasm This adds support for parsing/emitting in IR the floating-point RISC-V registers in inline assembly

[clang] aed9d6d - [RISCV] Add support for -ffixed-xX flags

Author: Simon Cook Date: 2019-10-22T21:25:01+01:00 New Revision: aed9d6d64a38d155cd09232da5640b5ade069bd9 URL: https://github.com/llvm/llvm-project/commit/aed9d6d64a38d155cd09232da5640b5ade069bd9 DIFF: https://github.com/llvm/llvm-project/commit/aed9d6d64a38d155cd09232da5640b5ade069bd9.diff LO

[clang] dd1ee6d - [RISCV] Support experimental/unratified extensions

Author: Simon Cook Date: 2020-04-09T18:04:22+01:00 New Revision: dd1ee6dc076fe1da6cf6eeb9cf614d9c1796759a URL: https://github.com/llvm/llvm-project/commit/dd1ee6dc076fe1da6cf6eeb9cf614d9c1796759a DIFF: https://github.com/llvm/llvm-project/commit/dd1ee6dc076fe1da6cf6eeb9cf614d9c1796759a.diff LO

[clang] 61ff296 - [RISCV] Add Clang frontend support for Bitmanip extension

Author: Scott Egerton Date: 2020-04-09T18:04:22+01:00 New Revision: 61ff29637501afcd7476e52064f7a266a95c6e28 URL: https://github.com/llvm/llvm-project/commit/61ff29637501afcd7476e52064f7a266a95c6e28 DIFF: https://github.com/llvm/llvm-project/commit/61ff29637501afcd7476e52064f7a266a95c6e28.diff

[clang] 562bc30 - [Driver] Improve help message for -ffixed-xX flags

Author: Simon Cook Date: 2020-04-10T11:30:24+01:00 New Revision: 562bc307c03de86dc083a019f358cd36c48488b0 URL: https://github.com/llvm/llvm-project/commit/562bc307c03de86dc083a019f358cd36c48488b0 DIFF: https://github.com/llvm/llvm-project/commit/562bc307c03de86dc083a019f358cd36c48488b0.diff LO

[clang] de7bf72 - [RISCV] Add error checking for extensions missing separating underscores

Author: Simon Cook Date: 2020-07-15T09:23:35+01:00 New Revision: de7bf722c23a1ab006bd306165c094669071577f URL: https://github.com/llvm/llvm-project/commit/de7bf722c23a1ab006bd306165c094669071577f DIFF: https://github.com/llvm/llvm-project/commit/de7bf722c23a1ab006bd306165c094669071577f.diff LO

[clang] afd483e - [RISCV] Add support for Zvamo/Zvlsseg to driver

Author: Simon Cook Date: 2021-01-24T22:07:56Z New Revision: afd483e57d166418e94a65bd9716e7dc4c114eed URL: https://github.com/llvm/llvm-project/commit/afd483e57d166418e94a65bd9716e7dc4c114eed DIFF: https://github.com/llvm/llvm-project/commit/afd483e57d166418e94a65bd9716e7dc4c114eed.diff LOG: [R

[clang] 666815d - [RISCV] Implement new architecture extension macros

Author: Simon Cook Date: 2021-01-25T08:58:46Z New Revision: 666815d61bc2475aa7b3ecf8e3a91022d6ccce4b URL: https://github.com/llvm/llvm-project/commit/666815d61bc2475aa7b3ecf8e3a91022d6ccce4b DIFF: https://github.com/llvm/llvm-project/commit/666815d61bc2475aa7b3ecf8e3a91022d6ccce4b.diff LOG: [R

[clang] c00e5cf - [RISCV] Set triple based on -march flag

Author: Simon Cook Date: 2019-11-18T10:44:24Z New Revision: c00e5cf29d49e51701b00382a3f41a4dfe1c0c0f URL: https://github.com/llvm/llvm-project/commit/c00e5cf29d49e51701b00382a3f41a4dfe1c0c0f DIFF: https://github.com/llvm/llvm-project/commit/c00e5cf29d49e51701b00382a3f41a4dfe1c0c0f.diff LOG: [R

[clang] [RISCV] Allow YAML file to control multilib selection (PR #98856)

simonpcook wrote: I think the fake flag hack may have a limitation in that since the `--XXX-fake-flag-...` appears in `--print-multi-lib` it may get imported into some build system and used as a flag for building particular libraries. For example with the above, newlib will not build since `er