[PATCH] D44888: [RISCV] Default enable linker relaxation and add -mrelax, -mno-relax flags

2018-05-14 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 updated this revision to Diff 146737. shiva0217 added a comment. Rebase patch to https://reviews.llvm.org/D45465 Repository: rL LLVM https://reviews.llvm.org/D44888 Files: include/clang/Driver/Options.td lib/Driver/ToolChains/Arch/RISCV.cpp test/Driver/riscv-features.c Inde

[PATCH] D44888: [RISCV] Default enable linker relaxation and add -mrelax, -mno-relax flags

2018-05-14 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 added inline comments. Comment at: lib/Driver/ToolChains/Arch/RISCV.cpp:130 + // which may override the defaults. + handleTargetFeaturesGroup(Args, Features, options::OPT_m_riscv_Features_Group); } kito-cheng wrote: > This part should move to the b

[PATCH] D44888: [RISCV] Add -mrelax/-mno-relax flags to enable/disable RISCV linker relaxation

2018-05-21 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 updated this revision to Diff 147739. shiva0217 retitled this revision from "[RISCV] Default enable linker relaxation and add -mrelax, -mno-relax flags" to "[RISCV] Add -mrelax/-mno-relax flags to enable/disable RISCV linker relaxation". shiva0217 edited the summary of this revision. R

[PATCH] D44888: [RISCV] Add -mrelax/-mno-relax flags to enable/disable RISCV linker relaxation

2018-05-24 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 added a comment. In https://reviews.llvm.org/D44888#1109361, @asb wrote: > This is looking good to me, just needs an update to address this > request for a test in > riscv-features.c that demonstrates the default +relax/-relax setting.

[PATCH] D44888: [RISCV] Add -mrelax/-mno-relax flags to enable/disable RISCV linker relaxation

2018-05-24 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 updated this revision to Diff 148548. Repository: rL LLVM https://reviews.llvm.org/D44888 Files: include/clang/Driver/Options.td lib/Driver/ToolChains/Arch/RISCV.cpp test/Driver/riscv-features.c Index: test/Driver/riscv-features.c =

[PATCH] D44888: [RISCV] Add -mrelax/-mno-relax flags to enable/disable RISCV linker relaxation

2018-05-24 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 added a comment. In https://reviews.llvm.org/D44888#995, @asb wrote: > In https://reviews.llvm.org/D44888#920, @shiva0217 wrote: > > > In https://reviews.llvm.org/D44888#1109361, @asb wrote: > > > > > This is looking good to me, just needs an update to address this > > >

[PATCH] D57497: [RISCV] Passing -G value to RISCV backend

2019-01-30 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 created this revision. shiva0217 added reviewers: asb, apazos. Herald added subscribers: jocewei, PkmX, rkruppe, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, jrtc27, kito-cheng, niosHD, sabuasal, simoncook, johnrusso, rbar. Passing -G value to RISCVELFTargetObjectF

[PATCH] D57497: [RISCV] Passing small data limitation value to RISCV backend

2019-03-14 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 updated this revision to Diff 190595. shiva0217 added a comment. Herald added a project: LLVM. Herald added a subscriber: llvm-commits. Passing small data limitation by module flag. Repository: rL LLVM CHANGES SINCE LAST ACTION https://reviews.llvm.org/D57497/new/ https://reviews

[PATCH] D57497: [RISCV] Passing small data limitation value to RISCV backend

2019-03-20 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 updated this revision to Diff 191640. shiva0217 marked an inline comment as done. shiva0217 edited the summary of this revision. shiva0217 changed the repository for this revision from rL LLVM to rC Clang. shiva0217 removed a project: LLVM. shiva0217 removed a subscriber: llvm-commits. sh

[PATCH] D57497: [RISCV] Passing small data limitation value to RISCV backend

2019-03-28 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 updated this revision to Diff 192618. shiva0217 added a comment. Add warning message for -msmall-data-limit with -fpic or RV64 with -mcmodel=large Repository: rC Clang CHANGES SINCE LAST ACTION https://reviews.llvm.org/D57497/new/ https://reviews.llvm.org/D57497 Files: docs/C

[PATCH] D57497: [RISCV] Passing small data limitation value to RISCV backend

2019-03-28 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 marked an inline comment as done. shiva0217 added inline comments. Comment at: lib/Driver/ToolChains/Clang.cpp:1813 +} + } else if (Arg *A = Args.getLastArg(options::OPT_G)) { +SmallDataLimit = A->getValue(); apazos wrote: > Why do you we need

[PATCH] D57497: [RISCV] Passing -G value to RISCV backend

2019-01-31 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 added a comment. Herald added a project: clang. In D57497#1378511 , @simoncook wrote: > As this mllvm option only affects the creation of ELF objects, do we also > need to add a similar option for the LTO case, as the -G value would have no > e

[PATCH] D57497: [RISCV] Passing small data limitation value to RISCV backend

2019-02-03 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 updated this revision to Diff 184936. shiva0217 retitled this revision from "[RISCV] Passing -G value to RISCV backend" to "[RISCV] Passing small data limitation value to RISCV backend". shiva0217 edited the summary of this revision. shiva0217 added a comment. 1. Setting small data limi

[PATCH] D57497: [RISCV] Passing small data limitation value to RISCV backend

2019-02-03 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 added a comment. In D57497#1382206 , @apazos wrote: > Hi Shiva, I think you need to check for and pass along the -G option to the > linker (gnutools::Linker and RISCV::Linker) and will be available for LTO. > Check Hexagon, it passes the thres

[PATCH] D57497: [RISCV] Passing small data limitation value to RISCV backend

2019-02-03 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 updated this revision to Diff 184988. shiva0217 added a comment. Support passing small data limitation for target riscv32-unknown-linux-gnu with LTO enabled. Repository: rC Clang CHANGES SINCE LAST ACTION https://reviews.llvm.org/D57497/new/ https://reviews.llvm.org/D57497 File

[PATCH] D57497: [RISCV] Passing small data limitation value to RISCV backend

2019-02-03 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 added a comment. In D57497#1382393 , @apazos wrote: > I don't see -plugin-opt=-riscv-ssection-threshold=.. being passed. > tools::gnutools::Linker::ConstructJob is being invoked with target > riscv32-unknown-linux-gnu > It has to work for risc

[PATCH] D57497: [RISCV] Passing small data limitation value to RISCV backend

2019-02-05 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 updated this revision to Diff 185491. shiva0217 added a comment. 1. Remove passing path for LTO because Eli raised the concern that whether it would appropriate to assign the same limitation for all files when LTO enabled. 2. Add -msmall-data-limitation= as James pointed out it's the ma

[PATCH] D57497: [RISCV] Passing small data limitation value to RISCV backend

2019-02-11 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 added a comment. In D57497#1388350 , @apazos wrote: > If this is a target flag in GCC, shouldn't we make it a LLVM Target feature > and pass it as -mattr, just like done for mrelax? Hi Ana, It seems that most of the -mattr features only obtain

[PATCH] D47127: [RISCV] Default enable RISCV linker relaxation

2019-02-17 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 updated this revision to Diff 187160. shiva0217 changed the repository for this revision from rL LLVM to rC Clang. shiva0217 edited projects, added clang; removed LLVM. shiva0217 added a comment. Update patch to address Alex's comment. Repository: rC Clang CHANGES SINCE LAST ACTION

[PATCH] D57497: [RISCV] Passing small data limitation value to RISCV backend

2019-02-19 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 added a comment. In D57497#1394137 , @efriedma wrote: > > Did you mean declare as a target feature in RISCV.td or I misunderstanding > > something? > > That's sort of the right idea, but I don't think it works in this context > because we aren'

[PATCH] D44888: [RISCV] Default enable linker relaxation and add -mrelax, -mno-relax flags

2018-04-13 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 updated this revision to Diff 142338. shiva0217 added a comment. Add help text for -mrelax, -mno-relax flags as Alex's comments. Repository: rL LLVM https://reviews.llvm.org/D44888 Files: include/clang/Driver/Options.td lib/Driver/ToolChains/Arch/RISCV.cpp test/Driver/riscv-f

[PATCH] D44888: [RISCV] Default enable linker relaxation and add -mrelax, -mno-relax flags

2018-04-17 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 added a comment. In https://reviews.llvm.org/D44888#1068806, @asb wrote: > Thanks Kito. -mrelax and -mno-relax currently only affect the backend. For > completeness, I think this patch needs to pass the appropriate flag to the > linker depending on relax/no-relax. Hi Alex. RISCVTool

[PATCH] D79378: PR34581: Don't remove an 'if (p)' guarding a call to 'operator delete(p)' under -Oz.

2023-02-02 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 added a comment. Herald added a project: All. Hi, I have a question for the delete function call sinking in -Oz. https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2013/n3690.pdf. According to 3.7.4.2/3 ` The value of the first argument supplied to a deallocation function may be a nu

[PATCH] D79378: PR34581: Don't remove an 'if (p)' guarding a call to 'operator delete(p)' under -Oz.

2023-02-03 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 added a comment. In D79378#4101829 , @rjmccall wrote: > In D79378#4101613 , @shiva0217 wrote: > >> Hi, >> >> I have a question for the delete function call sinking in -Oz. >> >> https://www.open-std.org/jt

[PATCH] D79378: PR34581: Don't remove an 'if (p)' guarding a call to 'operator delete(p)' under -Oz.

2023-02-05 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 added a comment. In D79378#4103366 , @rjmccall wrote: > In D79378#4101935 , @shiva0217 wrote: > >> In D79378#4101829 , @rjmccall wrote: >> >>> In D79378#4101613

[PATCH] D62686: [RISCV] Add support for save/restore of callee-saved registers via libcalls

2019-12-09 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVFrameLowering.cpp:289 unsigned CFIIndex = MF.addFrameInst( MCCFIInstruction::createDefCfaOffset(nullptr, -StackSize)); BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))

[PATCH] D70401: [WIP][RISCV] Implement ilp32e ABI

2019-12-12 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:1525 unsigned TwoXLenInBytes = (2 * XLen) / 8; if (!IsFixed && ArgFlags.getOrigAlign() == TwoXLenInBytes && DL.getTypeAllocSize(OrigTy) == TwoXLenInBytes) { lena

[PATCH] D57497: [RISCV] Passing small data limitation value to RISCV backend

2020-03-09 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 added a comment. In D57497#1913473 , @apazos wrote: > Shiva, we forgot about this patch. Can you rebase it so we move on with > merging. Ok, I'll rebase the patch. Repository: rC Clang CHANGES SINCE LAST ACTION https://reviews.llvm.org/

[PATCH] D57497: [RISCV] Passing small data limitation value to RISCV backend

2020-03-09 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 updated this revision to Diff 249279. shiva0217 added a comment. Rebase to the trunk Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D57497/new/ https://reviews.llvm.org/D57497 Files: clang/docs/ClangCommandLineReference.rst clang/inclu

[PATCH] D57497: [RISCV] Passing small data limitation value to RISCV backend

2020-03-10 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 updated this revision to Diff 249336. shiva0217 added a comment. Update patch to address @lenary's comments. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D57497/new/ https://reviews.llvm.org/D57497 Files: clang/docs/ClangCommandLineRef

[PATCH] D57497: [RISCV] Passing small data limitation value to RISCV backend

2020-03-10 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 updated this revision to Diff 249545. shiva0217 added a comment. Update patch to address @evandro's comments. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D57497/new/ https://reviews.llvm.org/D57497 Files: clang/docs/ClangCommandLineRe

[PATCH] D57497: [RISCV] Passing small data limitation value to RISCV backend

2020-03-10 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 updated this revision to Diff 249558. shiva0217 added a comment. Update patch to address @jrtc27's comment. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D57497/new/ https://reviews.llvm.org/D57497 Files: clang/docs/ClangCommandLineRefe

[PATCH] D57497: [RISCV] Passing small data limitation value to RISCV backend

2020-03-11 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 added a comment. In D57497#1917835 , @apazos wrote: > Shiva, I see a warning always being printed: > > '+small-data-limit=' is not a recognized feature for this target (ignoring > feature) > > > This is because it is being passed down as a

[PATCH] D57497: [RISCV] Passing small data limitation value to RISCV backend

2020-03-11 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 updated this revision to Diff 249835. shiva0217 added a comment. Update the patch to address @apazos's comments. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D57497/new/ https://reviews.llvm.org/D57497 Files: clang/docs/ClangCommandLin

[PATCH] D57497: [RISCV] Passing small data limitation value to RISCV backend

2020-03-12 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 added a comment. In D57497#1920097 , @apazos wrote: > Thanks Shiva, I res-ynced and rebuilt the patch. It is working fine. > > I see there is a msmall-data-threshold flag used by Mips and Hexagon, and now > we are adding a new flag msmall-data-l

[PATCH] D57497: [RISCV] Passing small data limitation value to RISCV backend

2020-03-15 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 added a comment. In D57497#1921497 , @lenary wrote: > In D57497#1920870 , @shiva0217 wrote: > > > In D57497#1920097 , @apazos wrote: > > > > > Thanks Shiva, I res-y

[PATCH] D57497: [RISCV] Passing small data limitation value to RISCV backend

2020-03-17 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 added a comment. In D57497#1927881 , @apazos wrote: > Shiva, how about making the flag small-data-limit alias of > -msmall-data-threshold? Hi @apazos, I try to implement -small-data-limit alias of -small-data-threshold, it will trigger the a

[PATCH] D57497: [RISCV] Passing small data limitation value to RISCV backend

2020-03-17 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 updated this revision to Diff 250984. shiva0217 added a comment. Update patch to address @apazos's comments. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D57497/new/ https://reviews.llvm.org/D57497 Files: clang/docs/ClangCommandLineRef

[PATCH] D57497: [RISCV] Passing small data limitation value to RISCV backend

2020-03-19 Thread Shiva Chen via Phabricator via cfe-commits
This revision was not accepted when it landed; it landed in state "Needs Review". This revision was automatically updated to reflect the committed changes. Closed by commit rGfc3752665f4b: [RISCV] Passing small data limitation value to RISCV backend (authored by shiva0217). Changed prior to comm

[PATCH] D44888: [RISCV] Default enable linker relaxation and add -mno-relax flag to disable it

2018-03-25 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 created this revision. shiva0217 added reviewers: asb, apazos. Herald added subscribers: cfe-commits, kito-cheng, niosHD, sabuasal, jordy.potman.lists, simoncook, johnrusso, rbar. Default enable linker relaxation and add -mno-relax flag to disable it. Repository: rC Clang https://r

[PATCH] D44888: [RISCV] Default enable linker relaxation and add -mrelax, -mno-relax flags

2018-03-27 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 updated this revision to Diff 140038. shiva0217 retitled this revision from "[RISCV] Default enable linker relaxation and add -mno-relax flag to disable it" to "[RISCV] Default enable linker relaxation and add -mrelax, -mno-relax flags". shiva0217 edited the summary of this revision. sh

[PATCH] D44888: [RISCV] Default enable linker relaxation and add -mrelax, -mno-relax flags

2018-04-09 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 updated this revision to Diff 141591. shiva0217 added a comment. Update patch to address Alex's comments. Repository: rL LLVM https://reviews.llvm.org/D44888 Files: include/clang/Driver/Options.td lib/Driver/ToolChains/Arch/RISCV.cpp test/Driver/riscv-features.c Index: test

[PATCH] D150192: Allow clang to emit inrange metadata when generating code for array subscripts

2023-05-10 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 added a comment. In D150192#4330199 , @efriedma wrote: > From what I recall, "inrange" is actually more restrictive than the normal > C/C++ array indexing rules. Specifically, the bits regarding comparisons. > "inrange" was designed to allow

[PATCH] D152279: [Driver] Default -msmall-data-limit= to 0

2023-06-14 Thread Shiva Chen via Phabricator via cfe-commits
shiva0217 added a comment. In D152279#4422887 , @MaskRay wrote: > In D152279#4420312 , @asb wrote: > >> In D152279#4415974 , @MaskRay >> wrote: >> >>> However, RISC-V `-m