[clang] [flang] [llvm] [NFC][AMDGPU] Replace more direct arch comparison with isAMDGCN() (PR #131379)

shiltian wrote: * **#131379** https://app.graphite.dev/github/pr/llvm/llvm-project/131379?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/131

[clang] [flang] [llvm] [NFC][AMDGPU] Replace more direct arch comparison with isAMDGCN() (PR #131379)

https://github.com/shiltian closed https://github.com/llvm/llvm-project/pull/131379 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [flang] [llvm] [NFC][AMDGPU] Replace more direct arch comparison with isAMDGCN() (PR #131379)

https://github.com/shiltian updated https://github.com/llvm/llvm-project/pull/131379 >From 59bc234d4a5c343e093417150688a3231a230961 Mon Sep 17 00:00:00 2001 From: Shilei Tian Date: Fri, 14 Mar 2025 15:06:30 -0400 Subject: [PATCH 1/2] [NFC][AMDGPU] Replace more direct arch comparison with isAMD

[clang] [llvm] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to support AMDGPU's generic target (PR #122629)

https://github.com/shiltian updated https://github.com/llvm/llvm-project/pull/122629 >From 36c15623d308ecacdfe1fdd18a085dfd3d5c2712 Mon Sep 17 00:00:00 2001 From: Shilei Tian Date: Mon, 17 Mar 2025 12:31:06 -0400 Subject: [PATCH 1/4] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to s

[clang] [llvm] [DataLayout] Introduce sentinel pointer value (PR #131557)

@@ -32,9 +32,9 @@ static const char *const DataLayoutStringR600 = "-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1"; static const char *const DataLayoutStringAMDGCN = -"e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32" -"-p7:160:25

[clang] [llvm] [DataLayout] Introduce sentinel pointer value (PR #131557)

https://github.com/shiltian created https://github.com/llvm/llvm-project/pull/131557 The value of a null pointer is not always `0`. For example, on AMDGPU, the null pointer in address spaces 3 and 5 is `0x`. Currently, there is no target-independent way to get this information, making it

[clang] [llvm] [DataLayout] Introduce sentinel pointer value (PR #131557)

@@ -32,9 +32,9 @@ static const char *const DataLayoutStringR600 = "-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1"; static const char *const DataLayoutStringAMDGCN = -"e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32" -"-p7:160:25

[clang] [llvm] [DataLayout] Introduce sentinel pointer value (PR #131557)

shiltian wrote: * **#131557** https://app.graphite.dev/github/pr/llvm/llvm-project/131557?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/131

[clang] [llvm] [DataLayout] Introduce sentinel pointer value (PR #131557)

shiltian wrote: The RFC is posted https://discourse.llvm.org/t/rfc-introduce-sentinel-pointer-value-to-datalayout/85265. https://github.com/llvm/llvm-project/pull/131557 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cg

[clang] [llvm] [DataLayout] Introduce sentinel pointer value (PR #131557)

shiltian wrote: > This needs an RFC. For reference a previous attempt was at #83109 The RFC was posted, as mentioned in a previous comment. https://github.com/llvm/llvm-project/pull/131557 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https:

[clang] [llvm] [DataLayout] Introduce sentinel pointer value (PR #131557)

https://github.com/shiltian updated https://github.com/llvm/llvm-project/pull/131557 >From 86cd48c8f43b34d9fee97137db8abe6454d76268 Mon Sep 17 00:00:00 2001 From: Shilei Tian Date: Sun, 16 Mar 2025 23:51:02 -0400 Subject: [PATCH] [DataLayout] Introduce sentinel pointer value MIME-Version: 1.0 C

[clang] [llvm] [Clang][AMDGPU] Expose buffer load lds as a clang builtin (PR #132048)

@@ -162,6 +162,8 @@ BUILTIN(__builtin_amdgcn_raw_buffer_load_b64, "V2UiQbiiIi", "n") BUILTIN(__builtin_amdgcn_raw_buffer_load_b96, "V3UiQbiiIi", "n") BUILTIN(__builtin_amdgcn_raw_buffer_load_b128, "V4UiQbiiIi", "n") +BUILTIN(__builtin_amdgcn_raw_ptr_buffer_load_lds, "vQbv*3IU

[clang] [llvm] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to support AMDGPU's generic target (PR #122629)

shiltian wrote: Yeah, that needs to be fixed. The command line argument is `--target=hexagon-unknown-elf-unknown`, which is a valid target triple, but the error is `hexagon-unknown-unknown-elf-unknown`. That definitely exposes the issue in the compiler driver. https://github.com/llvm/llvm-pro

[clang] [flang] [llvm] [NFC][AMDGPU] Replace more direct arch comparison with isAMDGCN() (PR #131379)

shiltian wrote: > I wonder if we should just make all of these `isAMDGPU()` as well. No at the moment, since we still support r600. https://github.com/llvm/llvm-project/pull/131379 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.

[clang] [libc] [llvm] Reapply "[AMDGPU] Use COV6 by default (#118515)" (PR #130963)

https://github.com/shiltian updated https://github.com/llvm/llvm-project/pull/130963 >From 576596fb09e3f497858da0f922d746914a0c5c3d Mon Sep 17 00:00:00 2001 From: Shilei Tian Date: Wed, 12 Mar 2025 09:39:45 -0400 Subject: [PATCH] Reapply "[AMDGPU] Use COV6 by default (#118515)" This reverts co

[clang] [llvm] [DataLayout] Introduce sentinel pointer value (PR #131557)

https://github.com/shiltian edited https://github.com/llvm/llvm-project/pull/131557 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [libc] [llvm] Reapply "[AMDGPU] Use COV6 by default (#118515)" (PR #130963)

https://github.com/shiltian closed https://github.com/llvm/llvm-project/pull/130963 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [libc] [llvm] Reapply "[AMDGPU] Use COV6 by default (#118515)" (PR #130963)

https://github.com/shiltian updated https://github.com/llvm/llvm-project/pull/130963 >From 61eac4e7d7f8604021f67c48384f8c09bedd647f Mon Sep 17 00:00:00 2001 From: Shilei Tian Date: Fri, 21 Mar 2025 12:16:30 -0400 Subject: [PATCH] Reapply "[AMDGPU] Use COV6 by default (#118515)" This reverts co

[clang] [clang][AMDGPU] Enable module splitting by default (PR #128509)

https://github.com/shiltian approved this pull request. https://github.com/llvm/llvm-project/pull/128509 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [AMDGPU] Remove outdated COV6 warning (PR #132814)

https://github.com/shiltian created https://github.com/llvm/llvm-project/pull/132814 None >From c1f916c5cb19c1a816737dbb5cf21e5ac1636de3 Mon Sep 17 00:00:00 2001 From: Shilei Tian Date: Mon, 24 Mar 2025 15:11:55 -0400 Subject: [PATCH] [AMDGPU] Remove outdated COV6 warning --- clang/include/c

[clang] [AMDGPU] Remove outdated COV6 warning (PR #132814)

https://github.com/shiltian updated https://github.com/llvm/llvm-project/pull/132814 >From c1f916c5cb19c1a816737dbb5cf21e5ac1636de3 Mon Sep 17 00:00:00 2001 From: Shilei Tian Date: Mon, 24 Mar 2025 15:11:55 -0400 Subject: [PATCH 1/2] [AMDGPU] Remove outdated COV6 warning --- clang/include/cla

[clang] [compiler-rt] [libc] [llvm] [Clang][AMDGPU] Remove special handling for COV4 libraries (PR #132870)

@@ -62,62 +62,23 @@ Value *EmitAMDGPUImplicitArgPtr(CodeGenFunction &CGF) { /// Emit code based on Code Object ABI version. /// COV_4: Emit code to use dispatch ptr shiltian wrote: this as well https://github.com/llvm/llvm-project/pull/132870 _

[clang] [lld] [llvm] [DataLayout] Introduce sentinel pointer value (PR #131557)

https://github.com/shiltian updated https://github.com/llvm/llvm-project/pull/131557 >From b19ed2cc2896b9116264681ea45872c89f605c6c Mon Sep 17 00:00:00 2001 From: Shilei Tian Date: Mon, 17 Mar 2025 13:52:06 -0400 Subject: [PATCH 1/3] [DataLayout] Introduce sentinel pointer value MIME-Version: 1

[clang] [llvm] [clang][IR] Overload @llvm.thread.pointer to support non-AS0 targets (PR #132489)

shiltian wrote: > (assuming this intrinsic is supported there) The intrinsic is at least not supported by AMDGPU. :-) https://github.com/llvm/llvm-project/pull/132489 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-b

[clang] [llvm] [Clang][AMDGPU] Expose buffer load lds as a clang builtin (PR #132048)

Juan Manuel Martinez =?utf-8?q?Caamaño?= , Juan Manuel Martinez =?utf-8?q?Caamaño?= Message-ID: In-Reply-To: shiltian wrote: > I've also seen that gfx11 seem to have some kind of BUFFER_LOAD_LDS_(SIZE) > instruction (different from the BUFFER_LOAD_(SIZE)_LDS instructions > associated with th

[clang] [NFC][clang] Split clang/lib/CodeGen/CGBuiltin.cpp into target-specific files (PR #132252)

https://github.com/shiltian commented: I'm super happy to see this change. The AMDGPU part looks good to me! Thanks! https://github.com/llvm/llvm-project/pull/132252 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin

[clang] [flang] [llvm] [AMDGPU] Use a target feature to enable __builtin_amdgcn_global_load_lds on gfx9/10 (PR #133055)

Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?= , Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?= Message-ID: In-Reply-To: @@ -0,0 +1,45 @@ +; RUN: split-file %s %t shiltian wrote: This is an interesting thing that I learned from this PR. :-) https://github.com/l

[clang] [llvm] [Clang][AMDGPU] Add __builtin_amdgcn_cvt_off_f32_i4 (PR #133741)

Juan Manuel Martinez =?utf-8?q?Caamaño?= , Juan Manuel Martinez =?utf-8?q?Caamaño?= , Juan Manuel Martinez =?utf-8?q?Caamaño?= , Juan Manuel Martinez =?utf-8?q?Caamaño?= , Juan Manuel Martinez =?utf-8?q?Caamaño?= , Juan Manuel Martinez =?utf-8?q?Caamaño?= , Juan Manuel Martinez =?utf-8?q?Caamaño?=

[clang] [llvm] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to support AMDGPU's generic target (PR #122629)

shiltian wrote: @asb I did receive some emails initially but haven't gotten any lately. I assumed that issue had been fixed, as it seemed like the driver was just unconditionally adding `unknown`. https://github.com/llvm/llvm-project/pull/122629 ___

[clang] [llvm] [Clang][AMDGPU] Add __builtin_amdgcn_cvt_off_f32_i4 (PR #133741)

shiltian wrote: Why this lowering? We have a table right? https://github.com/llvm/llvm-project/pull/133741 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [flang] [llvm] [AMDGPU] Use a target feature to enable __builtin_amdgcn_global_load_lds on gfx9/10 (PR #133055)

Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?= , Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?= , Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?= , Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?= Message-ID: In-Reply-To: https://github.com/shiltian approved this pull request. https://github.com/llv

[clang] [libc] [Clang] Make `--lto-partitions` only default for HIP (PR #133164)

@@ -21,7 +21,7 @@ // RUN: %clang -### --target=amdgcn-amd-amdhsa -mcpu=gfx90a:xnack+:sramecc- -nogpulib \ // RUN: -L. -flto -fconvergent-functions %s 2>&1 | FileCheck -check-prefix=LTO %s // LTO: clang{{.*}} "-flto=full"{{.*}}"-fconvergent-functions" -// LTO: ld.lld{{.*}}"

[clang] [libc] [Clang] Make `--lto-partitions` only default for HIP (PR #133164)

https://github.com/shiltian approved this pull request. https://github.com/llvm/llvm-project/pull/133164 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [libc] [Clang] Make `--lto-partitions` only default for HIP (PR #133164)

@@ -38,17 +38,3 @@ // RUN: %clang -target amdgcn-amd-amdhsa -march=gfx90a -stdlib -startfiles \ // RUN: -nogpulib -nogpuinc -### %s 2>&1 | FileCheck -check-prefix=STARTUP %s // STARTUP: ld.lld{{.*}}"-lc" "-lm" "{{.*}}crt1.o" - -// Check --flto-partitions - -// RUN: %clang -##

[clang] [libc] [Clang] Make `--lto-partitions` only default for HIP (PR #133164)

@@ -33,14 +33,8 @@ function(add_startup_object name) set_target_properties(${fq_target_name}.exe PROPERTIES RUNTIME_OUTPUT_DIRECTORY ${LIBC_LIBRARY_DIR} RUNTIME_OUTPUT_NAME ${name}.o) -# FIXME: A bug in the AMDGPU LTO pass is incorrectly removing the kernels

[clang] [Clang] Handle `-flto-partitions` generically and forward it properly (PR #133283)

https://github.com/shiltian approved this pull request. https://github.com/llvm/llvm-project/pull/133283 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [libc] [llvm] [AMDGPU] Use COV6 by default (PR #118515)

shiltian wrote: > @shiltian Could you update MLIR infrastructure for the new default as well? > `mlir/lib/Target/LLVM/ROCDL/Target.cpp` and > `mlir/lib/Dialect/LLVMIR/IR/ROCDLDialect.cpp`, which both keep an ear on the > ABI version, partly for linking in device libraries https://github.com/l

[clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)

https://github.com/shiltian commented: This is worth a release note item. https://github.com/llvm/llvm-project/pull/134016 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Clang][AMDGPU] Enable `avail-extern-to-local` for ThinLTO in HIP (PR #134476)

shiltian wrote: https://github.com/llvm/llvm-project/pull/134541 resolves the missing `__assert_fail` issue. https://github.com/llvm/llvm-project/pull/134476 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailma

[clang] [Clang][AMDGPU] Enable `avail-extern-to-local` for ThinLTO in HIP (PR #134476)

https://github.com/shiltian updated https://github.com/llvm/llvm-project/pull/134476 >From b537a910f5869c9267ba20793d1531d63a205fdb Mon Sep 17 00:00:00 2001 From: Shilei Tian Date: Sun, 6 Apr 2025 11:24:24 -0400 Subject: [PATCH] [Clang][AMDGPU] Enable `avail-extern-to-local` for ThinLTO in HIP

[clang] [Clang][AMDGPU] Enable `avail-extern-to-local` for ThinLTO in HIP (PR #134476)

shiltian wrote: Hmm, the failure is weird. I can't reproduce it locally. Change it to something else and hopefully this can "resolve" the issue. https://github.com/llvm/llvm-project/pull/134476 ___ cfe-commits mailing list cfe-commits@lists.llvm.org h

[clang] [AMDGPU] Remove outdated COV6 warning (PR #132814)

shiltian wrote: * **#132814** https://app.graphite.dev/github/pr/llvm/llvm-project/132814?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/132

[clang] [llvm] [Clang][AMDGPU] Add __builtin_amdgcn_cvt_off_f32_i4 (PR #133741)

Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?= , Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?= , Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?= , Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?= , Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?= , Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?= , Juan Manuel

[clang] [llvm] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to support AMDGPU's generic target (PR #122629)

https://github.com/shiltian closed https://github.com/llvm/llvm-project/pull/122629 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Clang][AMDGPU] Enable `avail-extern-to-local` for ThinLTO in HIP (PR #134476)

https://github.com/shiltian created https://github.com/llvm/llvm-project/pull/134476 In HIP, the Clang driver already sets `force-import-all` when ThinLTO is enabled. As a result, all imported functions get the `available_externally` linkage. However, these functions are later removed by the `El

[clang] [Clang][AMDGPU] Enable `avail-extern-to-local` for ThinLTO in HIP (PR #134476)

shiltian wrote: * **#134476** https://app.graphite.dev/github/pr/llvm/llvm-project/134476?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/134

[clang] [Clang] Unify 'nvptx-arch' and 'amdgpu-arch' into 'offload-arch' (PR #134713)

@@ -0,0 +1,78 @@ +//===- OffloadArch.cpp - list available GPUs *- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apa

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