https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/122627
>From 71bad77117ef0dedbe6c28ff578470d8266108a6 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Sat, 11 Jan 2025 21:24:53 -0500
Subject: [PATCH] [Clang] Use `-targets=host-x86_64-unknown-linux-gnu` as
bundler
shiltian wrote:
### Merge activity
* **Jan 12, 10:49 AM EST**: A user started a stack merge that includes this
pull request via
[Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/122627).
https://github.com/llvm/llvm-project/pull/122627
__
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https://github.com/llvm/llvm-project/pull/122627
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>From b1dbe4f558fe282968af1ac33d58d74d3238d8d5 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Sun, 12 Jan 2025 10:48:56 -0500
Subject: [PATCH] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to
suppo
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/122629
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>From c58bbd1edcc295a03d68a311a16080550c6aea96 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Sun, 12 Jan 2025 10:48:56 -0500
Subject: [PATCH] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to
suppo
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/122629
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@@ -323,43 +323,59 @@ void AMDGPU::fillAMDGPUFeatureMap(StringRef GPU, const
Triple &T,
StringMap &Features) {
// XXX - What does the member GPU mean if device name string passed here?
if (T.isSPIRV() && T.getOS() == Triple::OSType::AMDHSA
https://github.com/shiltian approved this pull request.
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@@ -323,43 +323,59 @@ void AMDGPU::fillAMDGPUFeatureMap(StringRef GPU, const
Triple &T,
StringMap &Features) {
// XXX - What does the member GPU mean if device name string passed here?
if (T.isSPIRV() && T.getOS() == Triple::OSType::AMDHSA
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/104661
>From 5729891997dacfac91ad807ddfde60aec44708fb Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 17 Jan 2025 11:01:49 -0500
Subject: [PATCH 1/2] [Clang] Remove 3-element vector load and store special
handl
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/104661
>From 5729891997dacfac91ad807ddfde60aec44708fb Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 17 Jan 2025 11:01:49 -0500
Subject: [PATCH 1/3] [Clang] Remove 3-element vector load and store special
handl
https://github.com/shiltian closed
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shiltian wrote:
The compile error was resolved by 59dffce8c80eb9cefc96b8d3fe55473edfee9c4c.
https://github.com/llvm/llvm-project/pull/104661
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Author: Shilei Tian
Date: 2025-01-21T09:31:35-05:00
New Revision: 59dffce8c80eb9cefc96b8d3fe55473edfee9c4c
URL:
https://github.com/llvm/llvm-project/commit/59dffce8c80eb9cefc96b8d3fe55473edfee9c4c
DIFF:
https://github.com/llvm/llvm-project/commit/59dffce8c80eb9cefc96b8d3fe55473edfee9c4c.diff
L
@@ -317,6 +317,9 @@ GlobalVariable *createFatbinDesc(Module &M, ArrayRef
Image, bool IsHIP,
/// void __cudaRegisterTest(void **fatbinHandle) {
/// for (struct __tgt_offload_entry *entry =
&__start_cuda_offloading_entries;
///entry != &__stop_cuda_offloading_entries;
@@ -317,6 +317,9 @@ GlobalVariable *createFatbinDesc(Module &M, ArrayRef
Image, bool IsHIP,
/// void __cudaRegisterTest(void **fatbinHandle) {
/// for (struct __tgt_offload_entry *entry =
&__start_cuda_offloading_entries;
///entry != &__stop_cuda_offloading_entries;
@@ -24,11 +24,24 @@ namespace offloading {
/// This is the record of an object that just be registered with the offloading
/// runtime.
struct EntryTy {
+ /// Reserved bytes used to detect an older version of the struct, always
zero.
+ uint64_t Reserved = 0x0;
--
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/124018
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https://github.com/shiltian commented:
This looks like some changes worth in the release note?
https://github.com/llvm/llvm-project/pull/124018
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https://github.com/shiltian commented:
negative tests
https://github.com/llvm/llvm-project/pull/124616
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https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/124616
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https://github.com/llvm/llvm-project/pull/122629
>From 2fdbbac7ca1dcb5b6a0ad28f9fedabf24c634465 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Sun, 12 Jan 2025 15:58:32 -0500
Subject: [PATCH] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to
suppo
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/122629
>From 26ebaf07e5c6a8c3d8599fcbea3b7c947f31c943 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Sun, 12 Jan 2025 18:01:55 -0500
Subject: [PATCH] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to
suppo
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/122629
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shiltian wrote:
> So at least a few direct users this may break things for. There are also
> users that call the OffloadBundler API instead of directly calling
> clang-offload-bundler that this may impact.
For the API usage there will be no issue because we enforce it in the code
already. The
shiltian wrote:
> Could we assume "gfx * -generic" is a single Target ID, and check for/parse
> that separately before doing rsplit on "-"?
I was thinking about it the other day but eventually gave up on it, because I
want to keep this part as generic as possible instead of adding AMD special
shiltian wrote:
> Did you try this patch with internal PSDB? Does it break any existing HIP
> apps or libraries?
Will make a PR shortly after the migration.
https://github.com/llvm/llvm-project/pull/122629
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shiltian wrote:
> Is there a way for us to still support 3-field triples and generic targets?
I can't come up with a better solution because we don't know how many `-` could
exist in the generic target id. With that, fixating the "known" part (aka
triple) would be reasonable. Do you have any s
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/122629
>From c7c5b740c813afed4ab2c29ac4d4951d62a04bfc Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Tue, 14 Jan 2025 11:55:10 -0500
Subject: [PATCH 1/2] [LLVM][Triple] Add an argument to specify canonical form
to
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/104661
>From 06bb0e1c57e338923749826941c27b658338b540 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Thu, 16 Jan 2025 12:20:56 -0500
Subject: [PATCH] [Clang] Remove 3-element vector load and store special
handling
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/122629
>From 1b13d1465c90e3f6021628d723d807bdf4d155a8 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Thu, 16 Jan 2025 11:59:06 -0500
Subject: [PATCH] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to
suppo
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/122629
>From 2055d82d74bad8f1ffa7ee53e62617702556aec7 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Thu, 16 Jan 2025 08:46:19 -0500
Subject: [PATCH] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to
suppo
shiltian wrote:
> the target regions are just outlined, so it shouldn't affect anything on a
> codegen level.
No, they are not. The standard defines the execution behavior and codegen has
to conform with it. The current GPU CodeGen in this discussion assumes it is
generating for constructs _i
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/104661
>From ac2bd8cd5d9faf6c9a9ae7846b4110ade92d2f40 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 10 Jan 2025 12:25:03 -0500
Subject: [PATCH] [Clang] Remove 3-element vector load and store special
handling
@@ -52,6 +52,17 @@ class AMDGPUABIInfo final : public DefaultABIInfo {
void computeInfo(CGFunctionInfo &FI) const override;
RValue EmitVAArg(CodeGenFunction &CGF, Address VAListAddr, QualType Ty,
AggValueSlot Slot) const override;
+
+ llvm::FixedVectorTy
Author: Shilei Tian
Date: 2025-01-10T12:22:25-05:00
New Revision: ac2d529be31d7a670326298036a4b9b3eaed59d3
URL:
https://github.com/llvm/llvm-project/commit/ac2d529be31d7a670326298036a4b9b3eaed59d3
DIFF:
https://github.com/llvm/llvm-project/commit/ac2d529be31d7a670326298036a4b9b3eaed59d3.diff
L
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/104661
>From 68999359723466f762d3541359b1e55421e601fb Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 17 Jan 2025 10:55:59 -0500
Subject: [PATCH] [Clang] Remove 3-element vector load and store special
handling
shiltian wrote:
bump bump
https://github.com/llvm/llvm-project/pull/104661
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shiltian wrote:
Isn't offload bundler a target agnostic tool?
> This could help us not break things internally, and then as tools and APIs
> update to V6, they can also update to 4-field triples
PSDB has full green. I also created issues to all repos that use
`clang-offload-bundler` binary di
@@ -52,6 +52,17 @@ class AMDGPUABIInfo final : public DefaultABIInfo {
void computeInfo(CGFunctionInfo &FI) const override;
RValue EmitVAArg(CodeGenFunction &CGF, Address VAListAddr, QualType Ty,
AggValueSlot Slot) const override;
+
+ llvm::FixedVectorTy
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/104661
>From 5729891997dacfac91ad807ddfde60aec44708fb Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 17 Jan 2025 11:01:49 -0500
Subject: [PATCH] [Clang] Remove 3-element vector load and store special
handling
shiltian wrote:
The fix doesn't look right to me...
https://github.com/llvm/llvm-project/pull/122047
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@@ -1312,6 +1309,19 @@ void CGOpenMPRuntimeGPU::emitBarrierCall(CodeGenFunction
&CGF,
Args);
}
+void CGOpenMPRuntimeGPU::emitTargetCall(
+CodeGenFunction &CGF, const OMPExecutableDirective &D,
+llvm::Function *OutlinedFn, llvm::Value *OutlinedFnI
https://github.com/shiltian commented:
Do we have a clear idea on if a construct can behave in a different manner if
it is nested in a target region?
https://github.com/llvm/llvm-project/pull/122149
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shiltian wrote:
> To me this looks like compilation for a host, except the GPU is the host. The
> only functions that could be called from such a CU would be the top-level
> ones, not any of the auto-generated one.
>
> Additionally, the host wouldn't support offload, so we'd need to do somethi
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/122174
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https://github.com/llvm/llvm-project/pull/122629
>From 9966972ab344408f58ba156bd286ea44b4dad618 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Sun, 12 Jan 2025 18:01:55 -0500
Subject: [PATCH] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to
suppo
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/125744
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>From 84b10d4ae6b17241def9505f45895ff23fb9ea1b Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 14 Feb 2025 19:13:03 -0500
Subject: [PATCH] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to
suppo
shiltian wrote:
> I wonder if we should just make all of these `isAMDGPU()` as well.
No at the moment, since we still support r600.
https://github.com/llvm/llvm-project/pull/131379
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https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/130963
>From 576596fb09e3f497858da0f922d746914a0c5c3d Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Wed, 12 Mar 2025 09:39:45 -0400
Subject: [PATCH] Reapply "[AMDGPU] Use COV6 by default (#118515)"
This reverts co
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/131557
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https://github.com/shiltian closed
https://github.com/llvm/llvm-project/pull/130963
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https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/130963
>From 61eac4e7d7f8604021f67c48384f8c09bedd647f Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 21 Mar 2025 12:16:30 -0400
Subject: [PATCH] Reapply "[AMDGPU] Use COV6 by default (#118515)"
This reverts co
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/128509
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https://github.com/shiltian created
https://github.com/llvm/llvm-project/pull/132814
None
>From c1f916c5cb19c1a816737dbb5cf21e5ac1636de3 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Mon, 24 Mar 2025 15:11:55 -0400
Subject: [PATCH] [AMDGPU] Remove outdated COV6 warning
---
clang/include/c
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/132814
>From c1f916c5cb19c1a816737dbb5cf21e5ac1636de3 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Mon, 24 Mar 2025 15:11:55 -0400
Subject: [PATCH 1/2] [AMDGPU] Remove outdated COV6 warning
---
clang/include/cla
@@ -62,62 +62,23 @@ Value *EmitAMDGPUImplicitArgPtr(CodeGenFunction &CGF) {
/// Emit code based on Code Object ABI version.
/// COV_4: Emit code to use dispatch ptr
shiltian wrote:
this as well
https://github.com/llvm/llvm-project/pull/132870
_
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/131557
>From b19ed2cc2896b9116264681ea45872c89f605c6c Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Mon, 17 Mar 2025 13:52:06 -0400
Subject: [PATCH 1/3] [DataLayout] Introduce sentinel pointer value
MIME-Version: 1
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/131557
>From bb54cbae9ce77de810736bfb1502e99fccf5a24a Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Sun, 16 Mar 2025 23:51:02 -0400
Subject: [PATCH 1/2] [DataLayout] Introduce sentinel pointer value
MIME-Version: 1
@@ -3143,7 +3143,10 @@ as follows:
specified, the default index size is equal to the pointer size. All sizes
are in bits. The address space, ``n``, is optional, and if not specified,
denotes the default address space 0. The value of ``n`` must be
-in the range [
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/131557
>From 4b8a0c7dc3b9229f43643b2f2937e0607bc0a9c8 Mon Sep 17 00:00:00 2001
From: Ryotaro Kasuga
Date: Mon, 17 Mar 2025 13:45:09 +0900
Subject: [PATCH 1/2] [LoopVectorize] Add test for follow-up metadata for loops
@@ -84,31 +84,27 @@ OffloadTargetInfo::OffloadTargetInfo(const StringRef Target,
: BundlerConfig(BC) {
// TODO: Add error checking from ClangOffloadBundler.cpp
- auto TargetFeatures = Target.split(':');
- auto TripleOrGPU = TargetFeatures.first.rsplit('-');
-
- if (cl
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/122629
>From 16509121603e55539a5fa26420343d74c39b7963 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Mon, 17 Mar 2025 12:31:06 -0400
Subject: [PATCH 1/2] [OffloadBundler] Rework the ctor of `OffloadTargetInfo`
to s
shiltian wrote:
It seems like for some targets the compiler doesn't accept a 4-field triple.
Why is that?
```
clang: error: version 'elf-unknown' in target triple
'hexagon-unknown-unknown-elf-unknown' is invalid
clang: error: version '-unknown' in target triple
'riscv64-unknown-linux-gnu-unkn
shiltian wrote:
It seems like some targets add "-unknown" in the compiler driver.
```
+ /local/mnt/workspace/bots/hexagon-build-02/clang-hexagon-elf/stage1/bin/clang
--target=hexagon-unknown-elf-unknown -fverbose-asm -g -S
/local/mnt/workspace/bots/hexagon-build-02/clang-hexagon-elf/llvm/clan
shiltian wrote:
> > The OpenMP runtime doesn't know how to handle `generic` ISAs right?
>
> I don't understand why that is tied to the version
It is probably no longer tied to the version since we no longer build one
device runtime per target.
https://github.com/llvm/llvm-project/pull/130963
shiltian wrote:
* **#131379** https://app.graphite.dev/github/pr/llvm/llvm-project/131379?utm_source=stack-comment-icon";
target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite"
width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/131
https://github.com/shiltian closed
https://github.com/llvm/llvm-project/pull/131379
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https://github.com/llvm/llvm-project/pull/131379
>From 59bc234d4a5c343e093417150688a3231a230961 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 14 Mar 2025 15:06:30 -0400
Subject: [PATCH 1/2] [NFC][AMDGPU] Replace more direct arch comparison with
isAMD
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/122629
>From 36c15623d308ecacdfe1fdd18a085dfd3d5c2712 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Mon, 17 Mar 2025 12:31:06 -0400
Subject: [PATCH 1/4] [OffloadBundler] Rework the ctor of `OffloadTargetInfo`
to s
@@ -32,9 +32,9 @@ static const char *const DataLayoutStringR600 =
"-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1";
static const char *const DataLayoutStringAMDGCN =
-"e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32"
-"-p7:160:25
https://github.com/shiltian created
https://github.com/llvm/llvm-project/pull/131557
The value of a null pointer is not always `0`. For example, on AMDGPU, the null
pointer in address spaces 3 and 5 is `0x`. Currently, there is no
target-independent way to get this information, making it
@@ -32,9 +32,9 @@ static const char *const DataLayoutStringR600 =
"-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1";
static const char *const DataLayoutStringAMDGCN =
-"e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32"
-"-p7:160:25
shiltian wrote:
* **#131557** https://app.graphite.dev/github/pr/llvm/llvm-project/131557?utm_source=stack-comment-icon";
target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite"
width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/131
shiltian wrote:
The RFC is posted
https://discourse.llvm.org/t/rfc-introduce-sentinel-pointer-value-to-datalayout/85265.
https://github.com/llvm/llvm-project/pull/131557
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shiltian wrote:
> This needs an RFC. For reference a previous attempt was at #83109
The RFC was posted, as mentioned in a previous comment.
https://github.com/llvm/llvm-project/pull/131557
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https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/131557
>From 86cd48c8f43b34d9fee97137db8abe6454d76268 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Sun, 16 Mar 2025 23:51:02 -0400
Subject: [PATCH] [DataLayout] Introduce sentinel pointer value
MIME-Version: 1.0
C
@@ -162,6 +162,8 @@ BUILTIN(__builtin_amdgcn_raw_buffer_load_b64, "V2UiQbiiIi",
"n")
BUILTIN(__builtin_amdgcn_raw_buffer_load_b96, "V3UiQbiiIi", "n")
BUILTIN(__builtin_amdgcn_raw_buffer_load_b128, "V4UiQbiiIi", "n")
+BUILTIN(__builtin_amdgcn_raw_ptr_buffer_load_lds, "vQbv*3IU
shiltian wrote:
Yeah, that needs to be fixed. The command line argument is
`--target=hexagon-unknown-elf-unknown`, which is a valid target triple, but the
error is `hexagon-unknown-unknown-elf-unknown`. That definitely exposes the
issue in the compiler driver.
https://github.com/llvm/llvm-pro
https://github.com/shiltian commented:
This is worth a release note item.
https://github.com/llvm/llvm-project/pull/134016
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shiltian wrote:
https://github.com/llvm/llvm-project/pull/134541 resolves the missing
`__assert_fail` issue.
https://github.com/llvm/llvm-project/pull/134476
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https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/134476
>From b537a910f5869c9267ba20793d1531d63a205fdb Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Sun, 6 Apr 2025 11:24:24 -0400
Subject: [PATCH] [Clang][AMDGPU] Enable `avail-extern-to-local` for ThinLTO in
HIP
shiltian wrote:
Hmm, the failure is weird. I can't reproduce it locally. Change it to something
else and hopefully this can "resolve" the issue.
https://github.com/llvm/llvm-project/pull/134476
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h
shiltian wrote:
* **#132814** https://app.graphite.dev/github/pr/llvm/llvm-project/132814?utm_source=stack-comment-icon";
target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite"
width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/132
Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?= ,
Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?= ,
Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?= ,
Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?= ,
Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?= ,
Juan Manuel Martinez =?utf-8?q?Caama=C3=B1o?= ,
Juan Manuel
https://github.com/shiltian closed
https://github.com/llvm/llvm-project/pull/122629
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https://github.com/shiltian created
https://github.com/llvm/llvm-project/pull/134476
In HIP, the Clang driver already sets `force-import-all` when ThinLTO is
enabled. As a result, all imported functions get the `available_externally`
linkage. However, these functions are later removed by the
`El
shiltian wrote:
* **#134476** https://app.graphite.dev/github/pr/llvm/llvm-project/134476?utm_source=stack-comment-icon";
target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite"
width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/134
@@ -21,7 +21,7 @@
// RUN: %clang -### --target=amdgcn-amd-amdhsa -mcpu=gfx90a:xnack+:sramecc-
-nogpulib \
// RUN: -L. -flto -fconvergent-functions %s 2>&1 | FileCheck
-check-prefix=LTO %s
// LTO: clang{{.*}} "-flto=full"{{.*}}"-fconvergent-functions"
-// LTO:
ld.lld{{.*}}"
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/133164
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@@ -38,17 +38,3 @@
// RUN: %clang -target amdgcn-amd-amdhsa -march=gfx90a -stdlib -startfiles \
// RUN: -nogpulib -nogpuinc -### %s 2>&1 | FileCheck -check-prefix=STARTUP %s
// STARTUP: ld.lld{{.*}}"-lc" "-lm" "{{.*}}crt1.o"
-
-// Check --flto-partitions
-
-// RUN: %clang -##
@@ -33,14 +33,8 @@ function(add_startup_object name)
set_target_properties(${fq_target_name}.exe PROPERTIES
RUNTIME_OUTPUT_DIRECTORY ${LIBC_LIBRARY_DIR}
RUNTIME_OUTPUT_NAME ${name}.o)
-# FIXME: A bug in the AMDGPU LTO pass is incorrectly removing the kernels
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/133283
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@@ -0,0 +1,78 @@
+//===- OffloadArch.cpp - list available GPUs *- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
shiltian wrote:
* **#134892** https://app.graphite.dev/github/pr/llvm/llvm-project/134892?utm_source=stack-comment-icon";
target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite"
width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/134
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/134801
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https://github.com/shiltian closed
https://github.com/llvm/llvm-project/pull/134745
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