https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/122627
>From 71bad77117ef0dedbe6c28ff578470d8266108a6 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Sat, 11 Jan 2025 21:24:53 -0500
Subject: [PATCH] [Clang] Use `-targets=host-x86_64-unknown-linux-gnu` as
bundler
shiltian wrote:
### Merge activity
* **Jan 12, 10:49 AM EST**: A user started a stack merge that includes this
pull request via
[Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/122627).
https://github.com/llvm/llvm-project/pull/122627
__
https://github.com/shiltian closed
https://github.com/llvm/llvm-project/pull/122627
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https://github.com/llvm/llvm-project/pull/122629
>From b1dbe4f558fe282968af1ac33d58d74d3238d8d5 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Sun, 12 Jan 2025 10:48:56 -0500
Subject: [PATCH] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to
suppo
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/122629
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>From c58bbd1edcc295a03d68a311a16080550c6aea96 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Sun, 12 Jan 2025 10:48:56 -0500
Subject: [PATCH] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to
suppo
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/122629
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@@ -323,43 +323,59 @@ void AMDGPU::fillAMDGPUFeatureMap(StringRef GPU, const
Triple &T,
StringMap &Features) {
// XXX - What does the member GPU mean if device name string passed here?
if (T.isSPIRV() && T.getOS() == Triple::OSType::AMDHSA
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/123519
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@@ -323,43 +323,59 @@ void AMDGPU::fillAMDGPUFeatureMap(StringRef GPU, const
Triple &T,
StringMap &Features) {
// XXX - What does the member GPU mean if device name string passed here?
if (T.isSPIRV() && T.getOS() == Triple::OSType::AMDHSA
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/104661
>From 5729891997dacfac91ad807ddfde60aec44708fb Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 17 Jan 2025 11:01:49 -0500
Subject: [PATCH 1/2] [Clang] Remove 3-element vector load and store special
handl
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/104661
>From 5729891997dacfac91ad807ddfde60aec44708fb Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 17 Jan 2025 11:01:49 -0500
Subject: [PATCH 1/3] [Clang] Remove 3-element vector load and store special
handl
https://github.com/shiltian closed
https://github.com/llvm/llvm-project/pull/104661
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shiltian wrote:
The compile error was resolved by 59dffce8c80eb9cefc96b8d3fe55473edfee9c4c.
https://github.com/llvm/llvm-project/pull/104661
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Author: Shilei Tian
Date: 2025-01-21T09:31:35-05:00
New Revision: 59dffce8c80eb9cefc96b8d3fe55473edfee9c4c
URL:
https://github.com/llvm/llvm-project/commit/59dffce8c80eb9cefc96b8d3fe55473edfee9c4c
DIFF:
https://github.com/llvm/llvm-project/commit/59dffce8c80eb9cefc96b8d3fe55473edfee9c4c.diff
L
@@ -317,6 +317,9 @@ GlobalVariable *createFatbinDesc(Module &M, ArrayRef
Image, bool IsHIP,
/// void __cudaRegisterTest(void **fatbinHandle) {
/// for (struct __tgt_offload_entry *entry =
&__start_cuda_offloading_entries;
///entry != &__stop_cuda_offloading_entries;
@@ -317,6 +317,9 @@ GlobalVariable *createFatbinDesc(Module &M, ArrayRef
Image, bool IsHIP,
/// void __cudaRegisterTest(void **fatbinHandle) {
/// for (struct __tgt_offload_entry *entry =
&__start_cuda_offloading_entries;
///entry != &__stop_cuda_offloading_entries;
@@ -24,11 +24,24 @@ namespace offloading {
/// This is the record of an object that just be registered with the offloading
/// runtime.
struct EntryTy {
+ /// Reserved bytes used to detect an older version of the struct, always
zero.
+ uint64_t Reserved = 0x0;
--
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/124018
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https://github.com/shiltian commented:
This looks like some changes worth in the release note?
https://github.com/llvm/llvm-project/pull/124018
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https://github.com/shiltian commented:
negative tests
https://github.com/llvm/llvm-project/pull/124616
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https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/124616
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https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/122629
>From 2fdbbac7ca1dcb5b6a0ad28f9fedabf24c634465 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Sun, 12 Jan 2025 15:58:32 -0500
Subject: [PATCH] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to
suppo
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/122629
>From 26ebaf07e5c6a8c3d8599fcbea3b7c947f31c943 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Sun, 12 Jan 2025 18:01:55 -0500
Subject: [PATCH] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to
suppo
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/122629
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shiltian wrote:
> So at least a few direct users this may break things for. There are also
> users that call the OffloadBundler API instead of directly calling
> clang-offload-bundler that this may impact.
For the API usage there will be no issue because we enforce it in the code
already. The
shiltian wrote:
> Could we assume "gfx * -generic" is a single Target ID, and check for/parse
> that separately before doing rsplit on "-"?
I was thinking about it the other day but eventually gave up on it, because I
want to keep this part as generic as possible instead of adding AMD special
shiltian wrote:
> Did you try this patch with internal PSDB? Does it break any existing HIP
> apps or libraries?
Will make a PR shortly after the migration.
https://github.com/llvm/llvm-project/pull/122629
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shiltian wrote:
> Is there a way for us to still support 3-field triples and generic targets?
I can't come up with a better solution because we don't know how many `-` could
exist in the generic target id. With that, fixating the "known" part (aka
triple) would be reasonable. Do you have any s
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/122629
>From c7c5b740c813afed4ab2c29ac4d4951d62a04bfc Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Tue, 14 Jan 2025 11:55:10 -0500
Subject: [PATCH 1/2] [LLVM][Triple] Add an argument to specify canonical form
to
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/104661
>From 06bb0e1c57e338923749826941c27b658338b540 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Thu, 16 Jan 2025 12:20:56 -0500
Subject: [PATCH] [Clang] Remove 3-element vector load and store special
handling
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/122629
>From 1b13d1465c90e3f6021628d723d807bdf4d155a8 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Thu, 16 Jan 2025 11:59:06 -0500
Subject: [PATCH] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to
suppo
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/122629
>From 2055d82d74bad8f1ffa7ee53e62617702556aec7 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Thu, 16 Jan 2025 08:46:19 -0500
Subject: [PATCH] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to
suppo
shiltian wrote:
> the target regions are just outlined, so it shouldn't affect anything on a
> codegen level.
No, they are not. The standard defines the execution behavior and codegen has
to conform with it. The current GPU CodeGen in this discussion assumes it is
generating for constructs _i
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/104661
>From ac2bd8cd5d9faf6c9a9ae7846b4110ade92d2f40 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 10 Jan 2025 12:25:03 -0500
Subject: [PATCH] [Clang] Remove 3-element vector load and store special
handling
@@ -52,6 +52,17 @@ class AMDGPUABIInfo final : public DefaultABIInfo {
void computeInfo(CGFunctionInfo &FI) const override;
RValue EmitVAArg(CodeGenFunction &CGF, Address VAListAddr, QualType Ty,
AggValueSlot Slot) const override;
+
+ llvm::FixedVectorTy
Author: Shilei Tian
Date: 2025-01-10T12:22:25-05:00
New Revision: ac2d529be31d7a670326298036a4b9b3eaed59d3
URL:
https://github.com/llvm/llvm-project/commit/ac2d529be31d7a670326298036a4b9b3eaed59d3
DIFF:
https://github.com/llvm/llvm-project/commit/ac2d529be31d7a670326298036a4b9b3eaed59d3.diff
L
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/104661
>From 68999359723466f762d3541359b1e55421e601fb Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 17 Jan 2025 10:55:59 -0500
Subject: [PATCH] [Clang] Remove 3-element vector load and store special
handling
shiltian wrote:
bump bump
https://github.com/llvm/llvm-project/pull/104661
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shiltian wrote:
Isn't offload bundler a target agnostic tool?
> This could help us not break things internally, and then as tools and APIs
> update to V6, they can also update to 4-field triples
PSDB has full green. I also created issues to all repos that use
`clang-offload-bundler` binary di
@@ -52,6 +52,17 @@ class AMDGPUABIInfo final : public DefaultABIInfo {
void computeInfo(CGFunctionInfo &FI) const override;
RValue EmitVAArg(CodeGenFunction &CGF, Address VAListAddr, QualType Ty,
AggValueSlot Slot) const override;
+
+ llvm::FixedVectorTy
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/104661
>From 5729891997dacfac91ad807ddfde60aec44708fb Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 17 Jan 2025 11:01:49 -0500
Subject: [PATCH] [Clang] Remove 3-element vector load and store special
handling
shiltian wrote:
The fix doesn't look right to me...
https://github.com/llvm/llvm-project/pull/122047
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@@ -1312,6 +1309,19 @@ void CGOpenMPRuntimeGPU::emitBarrierCall(CodeGenFunction
&CGF,
Args);
}
+void CGOpenMPRuntimeGPU::emitTargetCall(
+CodeGenFunction &CGF, const OMPExecutableDirective &D,
+llvm::Function *OutlinedFn, llvm::Value *OutlinedFnI
https://github.com/shiltian commented:
Do we have a clear idea on if a construct can behave in a different manner if
it is nested in a target region?
https://github.com/llvm/llvm-project/pull/122149
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shiltian wrote:
> To me this looks like compilation for a host, except the GPU is the host. The
> only functions that could be called from such a CU would be the top-level
> ones, not any of the auto-generated one.
>
> Additionally, the host wouldn't support offload, so we'd need to do somethi
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/122174
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https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/122629
>From 9966972ab344408f58ba156bd286ea44b4dad618 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Sun, 12 Jan 2025 18:01:55 -0500
Subject: [PATCH] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to
suppo
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/125744
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https://github.com/llvm/llvm-project/pull/122629
>From 84b10d4ae6b17241def9505f45895ff23fb9ea1b Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 14 Feb 2025 19:13:03 -0500
Subject: [PATCH] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to
suppo
@@ -1338,9 +1338,7 @@ struct InformationCache {
bool stackIsAccessibleByOtherThreads() { return !targetIsGPU(); }
/// Return true if the target is a GPU.
- bool targetIsGPU() {
-return TargetTriple.isAMDGPU() || TargetTriple.isNVPTX();
- }
+ bool targetIsGPU() { ret
@@ -2624,9 +2624,8 @@ void CGOpenMPRuntime::emitDistributeStaticInit(
emitUpdateLocation(CGF, Loc, OMP_IDENT_WORK_DISTRIBUTE);
llvm::Value *ThreadId = getThreadID(CGF, Loc);
llvm::FunctionCallee StaticInitFunction;
- bool isGPUDistribute =
- CGM.getLangOpts().Op
@@ -1109,6 +1109,11 @@ class Triple {
Env == llvm::Triple::EABIHF;
}
+ /// Tests if the target represents a GPU which can be offloaded to.
+ bool isOffloadingTargetGPU() const {
shiltian wrote:
Is it better to use `isOffloadingTarget`?
https:/
@@ -277,16 +277,31 @@ def : GCNPat <(vt (int_amdgcn_set_inactive vt:$src,
vt:$inactive)),
def : GCNPat<(i32 (int_amdgcn_set_inactive_chain_arg i32:$src, i32:$inactive)),
(V_SET_INACTIVE_B32 0, VGPR_32:$src, 0, VGPR_32:$inactive,
(IMPLICIT_DEF))>;
-let usesCustomInserter
@@ -188,6 +186,32 @@ __DO_LANE_SCAN(float, uint32_t, f32);// float
__gpu_lane_scan_f32(m, x)
__DO_LANE_SCAN(double, uint64_t, f64); // double __gpu_lane_scan_f64(m, x)
#undef __DO_LANE_SCAN
+// Gets the sum of all lanes inside the warp or wavefront.
shi
@@ -7417,7 +7419,7 @@ def fuse_register_sized_bitfield_access: Flag<["-"],
"fuse-register-sized-bitfie
def relaxed_aliasing : Flag<["-"], "relaxed-aliasing">,
HelpText<"Turn off Type Based Alias Analysis">,
MarshallingInfoFlag>;
-defm pointer_tbaa: BoolOption<"", "pointer-
@@ -708,6 +712,34 @@ void amdgpu::getAMDGPUTargetFeatures(const Driver &D,
options::OPT_m_amdgpu_Features_Group);
}
+static unsigned GetFullLTOPartitions(const Driver &D, const ArgList &Args) {
+ const Arg *A = Args.getLastArg(options::OPT_flto_par
@@ -708,6 +712,34 @@ void amdgpu::getAMDGPUTargetFeatures(const Driver &D,
options::OPT_m_amdgpu_Features_Group);
}
+static unsigned GetFullLTOPartitions(const Driver &D, const ArgList &Args) {
shiltian wrote:
```suggestion
static
@@ -708,6 +712,34 @@ void amdgpu::getAMDGPUTargetFeatures(const Driver &D,
options::OPT_m_amdgpu_Features_Group);
}
+static unsigned GetFullLTOPartitions(const Driver &D, const ArgList &Args) {
+ const Arg *A = Args.getLastArg(options::OPT_flto_par
https://github.com/shiltian approved this pull request.
LGTM but I'd like to get a second stamp on it.
https://github.com/llvm/llvm-project/pull/126956
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@@ -0,0 +1,6 @@
+// RUN: %clang -fopenmp --offload-arch=sm_90 -nocudalib -target
aarch64-unknown-linux-gnu -c -Xclang -verify %s
shiltian wrote:
Use `%clang_cc1` here instead of the driver.
https://github.com/llvm/llvm-project/pull/127439
__
@@ -92,6 +92,14 @@ LIBC_INLINE uint32_t shuffle(uint64_t lane_mask, uint32_t
idx, uint32_t x,
return __gpu_shuffle_idx_u32(lane_mask, idx, x, width);
}
+LIBC_INLINE uint64_t match_any(uint64_t lane_mask, uint32_t x) {
+ return __gpu_match_any_u32(lane_mask, x);
+}
+
+LIBC_
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/126956
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https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/125826
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https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/127504
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shiltian wrote:
We do have some framework teams that are still using non-LTO (or non-gpu-rdc)
build.
https://github.com/llvm/llvm-project/pull/129118
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https://github.com/shiltian closed
https://github.com/llvm/llvm-project/pull/129101
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@@ -1582,6 +1582,26 @@ void CodeGenFunction::GenerateCode(GlobalDecl GD,
llvm::Function *Fn,
// Implicit copy-assignment gets the same special treatment as implicit
// copy-constructors.
emitImplicitAssignmentOperatorBody(Args);
+ } else if (FD->hasAttr() &&
+
shiltian wrote:
I'm okay with this change, but did you run a PSDB or even a full testing cycle?
https://github.com/llvm/llvm-project/pull/128509
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https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/129101
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https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/129101
>From daec69f37a9b10f4bcf258f3a6f9e45cee72b64d Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Thu, 27 Feb 2025 14:00:05 -0500
Subject: [PATCH] [AMDGPU] Use 32-bit index for SWMMAC builtins
Currently, the ind
https://github.com/shiltian created
https://github.com/llvm/llvm-project/pull/129101
Currently, the index of SWMMAC builtins is of type `short`, likely based on the
assumption that K can only be up to 32, meaning there are only 16 non-zero
elements. However, this is not future-proof. This patch
shiltian wrote:
* **#129101** https://app.graphite.dev/github/pr/llvm/llvm-project/129101?utm_source=stack-comment-icon";
target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite"
width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/129
shiltian wrote:
> > CC @jdoerfert @ye-luo Once this is merged, ROCm 6.3 will be needed to run
> > any program compiled for AMDGPU.
>
> Unless you pass `-mcode-object-version=5` right?
Yes.
https://github.com/llvm/llvm-project/pull/130963
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shiltian wrote:
* **#131017** https://app.graphite.dev/github/pr/llvm/llvm-project/131017?utm_source=stack-comment-icon";
target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite"
width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/131
https://github.com/shiltian created
https://github.com/llvm/llvm-project/pull/131017
When compiling an OpenCL program directly with `clang` using `--save-temps`, an
error may occur if the program contains OpenCL builtins:
```
test.cl:3:21: error: use of undeclared identifier 'get_global_id'
shiltian wrote:
* **#130963** https://app.graphite.dev/github/pr/llvm/llvm-project/130963?utm_source=stack-comment-icon";
target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite"
width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/130
https://github.com/shiltian created
https://github.com/llvm/llvm-project/pull/130963
This reverts commit 68bcba6d7a1cc18996c0bcb7c62267c62d2040d0.
>From 0f831a4a78fefcdf0ac973173397325a1f53d393 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Wed, 12 Mar 2025 09:39:45 -0400
Subject: [PATCH] Re
shiltian wrote:
We will need to wait for the AMD bots to be ready.
https://github.com/llvm/llvm-project/pull/130963
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shiltian wrote:
CC @jdoerfert @ye-luo Once this is merged, ROCm 6.3 will be needed to run any
program compiled for AMDGPU.
https://github.com/llvm/llvm-project/pull/130963
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shiltian wrote:
> The OpenMP runtime doesn't know how to handle `generic` ISAs right?
I think people are working on it?
https://github.com/llvm/llvm-project/pull/130963
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shiltian wrote:
Yeah these are implemented in bitcode file, therefore it needs the front end to
be able to recognize it instead of treating it as an unknown symbol.
https://github.com/llvm/llvm-project/pull/131017
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https://github.com/shiltian closed
https://github.com/llvm/llvm-project/pull/131017
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https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/122629
>From ab66262e163a8c63c980d8298480556aad9c5b4c Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Mon, 17 Mar 2025 12:31:06 -0400
Subject: [PATCH 1/3] [OffloadBundler] Rework the ctor of `OffloadTargetInfo`
to s
@@ -84,31 +84,27 @@ OffloadTargetInfo::OffloadTargetInfo(const StringRef Target,
: BundlerConfig(BC) {
// TODO: Add error checking from ClangOffloadBundler.cpp
- auto TargetFeatures = Target.split(':');
- auto TripleOrGPU = TargetFeatures.first.rsplit('-');
-
- if (cl
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/131557
>From 015964e72ebc223bcd191ceb306de8fdbca360f3 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Mon, 17 Mar 2025 13:52:06 -0400
Subject: [PATCH] [DataLayout] Introduce sentinel pointer value
MIME-Version: 1.0
C
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/131557
>From efda127ecd06ea966df89425d10bd837c0cafe4e Mon Sep 17 00:00:00 2001
From: Ryotaro Kasuga
Date: Mon, 17 Mar 2025 13:45:09 +0900
Subject: [PATCH] [DataLayout] Introduce sentinel pointer value
MIME-Version: 1.
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/131557
>From 053949d4dd8f28a2daa57a6143f0267c0bd3af6c Mon Sep 17 00:00:00 2001
From: Ryotaro Kasuga
Date: Mon, 17 Mar 2025 13:45:09 +0900
Subject: [PATCH 1/2] [LoopVectorize] Add test for follow-up metadata for loops
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/122629
>From 16509121603e55539a5fa26420343d74c39b7963 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Mon, 17 Mar 2025 12:31:06 -0400
Subject: [PATCH] [OffloadBundler] Rework the ctor of `OffloadTargetInfo` to
suppo
https://github.com/shiltian created
https://github.com/llvm/llvm-project/pull/131379
This is an extension of #131357. Hopefully this would be the last one.
>From 59bc234d4a5c343e093417150688a3231a230961 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 14 Mar 2025 15:06:30 -0400
Subject: [
@@ -552,6 +553,11 @@ class DataLayout {
///
/// This includes an explicitly requested alignment (if the global has one).
Align getPreferredAlign(const GlobalVariable *GV) const;
+
+ /// Returns the sentinel pointer value for a given address space. If the
+ /// address s
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/131557
>From bb54cbae9ce77de810736bfb1502e99fccf5a24a Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Sun, 16 Mar 2025 23:51:02 -0400
Subject: [PATCH 1/2] [DataLayout] Introduce sentinel pointer value
MIME-Version: 1
@@ -3143,7 +3143,10 @@ as follows:
specified, the default index size is equal to the pointer size. All sizes
are in bits. The address space, ``n``, is optional, and if not specified,
denotes the default address space 0. The value of ``n`` must be
-in the range [
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/131557
>From 4b8a0c7dc3b9229f43643b2f2937e0607bc0a9c8 Mon Sep 17 00:00:00 2001
From: Ryotaro Kasuga
Date: Mon, 17 Mar 2025 13:45:09 +0900
Subject: [PATCH 1/2] [LoopVectorize] Add test for follow-up metadata for loops
@@ -84,31 +84,27 @@ OffloadTargetInfo::OffloadTargetInfo(const StringRef Target,
: BundlerConfig(BC) {
// TODO: Add error checking from ClangOffloadBundler.cpp
- auto TargetFeatures = Target.split(':');
- auto TripleOrGPU = TargetFeatures.first.rsplit('-');
-
- if (cl
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/122629
>From 16509121603e55539a5fa26420343d74c39b7963 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Mon, 17 Mar 2025 12:31:06 -0400
Subject: [PATCH 1/2] [OffloadBundler] Rework the ctor of `OffloadTargetInfo`
to s
shiltian wrote:
It seems like for some targets the compiler doesn't accept a 4-field triple.
Why is that?
```
clang: error: version 'elf-unknown' in target triple
'hexagon-unknown-unknown-elf-unknown' is invalid
clang: error: version '-unknown' in target triple
'riscv64-unknown-linux-gnu-unkn
shiltian wrote:
It seems like some targets add "-unknown" in the compiler driver.
```
+ /local/mnt/workspace/bots/hexagon-build-02/clang-hexagon-elf/stage1/bin/clang
--target=hexagon-unknown-elf-unknown -fverbose-asm -g -S
/local/mnt/workspace/bots/hexagon-build-02/clang-hexagon-elf/llvm/clan
shiltian wrote:
> > The OpenMP runtime doesn't know how to handle `generic` ISAs right?
>
> I don't understand why that is tied to the version
It is probably no longer tied to the version since we no longer build one
device runtime per target.
https://github.com/llvm/llvm-project/pull/130963
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