https://github.com/SamTebbs33 created
https://github.com/llvm/llvm-project/pull/74064
This PR adds a warning that's emitted when a non-streaming or
non-streaming-compatible builtin is called in an unsuitable function.
Uses work by Kerry McLaughlin.
>From f6a990a000b555d7f8ef0b2a99e3fea98420e8
@@ -2069,21 +2070,20 @@ def SVDOT_LANE_X2_U : SInst<"svdot_lane[_{d}_{2}_{3}]",
"ddhhi", "Ui", MergeNone
def SVDOT_LANE_X2_F : SInst<"svdot_lane[_{d}_{2}_{3}]", "ddhhi", "f",
MergeNone, "aarch64_sve_fdot_lane_x2", [], [ImmCheck<3, ImmCheck0_3>]>;
}
-let TargetGuard = "sve2p
@@ -1109,10 +1109,10 @@ def SVPFALSE : SInst<"svpfalse[_b]", "Pv", "",
MergeNone, "", [IsOverloadNone, I
def SVPTRUE_PAT : SInst<"svptrue_pat_{d}", "PI", "PcPsPiPl", MergeNone,
"aarch64_sve_ptrue", [IsStreamingCompatible]>;
def SVPTRUE : SInst<"svptrue_{d}", "Pv", "Pc
https://github.com/SamTebbs33 edited
https://github.com/llvm/llvm-project/pull/75958
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https://github.com/SamTebbs33 created
https://github.com/llvm/llvm-project/pull/76973
Reverts llvm/llvm-project#75958
I mistakenly included a commit from my local main after rebasing.
>From d63f848e75b66ae2e5915ada4bd5b370e05f9829 Mon Sep 17 00:00:00 2001
From: Sam Tebbs
Date: Thu, 4 Jan 2024
https://github.com/SamTebbs33 closed
https://github.com/llvm/llvm-project/pull/76973
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@@ -50,6 +50,7 @@ class LLVM_LIBRARY_VISIBILITY AArch64TargetInfo : public
TargetInfo {
bool HasMatMul = false;
bool HasBFloat16 = false;
bool HasSVE2 = false;
+ bool HasSVE2p1 = false;
SamTebbs33 wrote:
Thanks I saw this too. Testing the fix as we spe
Author: Sam Tebbs
Date: 2024-01-05T11:17:56Z
New Revision: 567941bcc3b1fc3b1d2a902cf7ae2e173247a45f
URL:
https://github.com/llvm/llvm-project/commit/567941bcc3b1fc3b1d2a902cf7ae2e173247a45f
DIFF:
https://github.com/llvm/llvm-project/commit/567941bcc3b1fc3b1d2a902cf7ae2e173247a45f.diff
LOG: [Cl
https://github.com/SamTebbs33 created
https://github.com/llvm/llvm-project/pull/77338
This patch renames the get, set, create and undef functions that deal with
tuples of booleans to match the ACLE at
https://github.com/ARM-software/acle/pull/257/files . It also enables them for
SME2.
>From 0
https://github.com/SamTebbs33 updated
https://github.com/llvm/llvm-project/pull/77338
>From 091048a63e9c4ac21fd38b8e7483953c602c714f Mon Sep 17 00:00:00 2001
From: Sam Tebbs
Date: Fri, 5 Jan 2024 10:47:01 +
Subject: [PATCH 1/2] [Clang] Rename and enable boolean get, set, create and
undef f
@@ -1321,12 +1321,17 @@ def SVSET_3_BF16 : SInst<"svset3[_{d}]", "33id", "b",
MergeNone, "", [IsTupleSet
def SVSET_4_BF16 : SInst<"svset4[_{d}]", "44id", "b", MergeNone, "",
[IsTupleSet], [ImmCheck<1, ImmCheck0_3>]>;
}
-let TargetGuard = "sve2p1" in {
- def SVGET_2_B : SIns
https://github.com/SamTebbs33 updated
https://github.com/llvm/llvm-project/pull/77338
>From 091048a63e9c4ac21fd38b8e7483953c602c714f Mon Sep 17 00:00:00 2001
From: Sam Tebbs
Date: Fri, 5 Jan 2024 10:47:01 +
Subject: [PATCH 1/3] [Clang] Rename and enable boolean get, set, create and
undef f
@@ -0,0 +1,35 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 4
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S
-O2 -Werror -Wall -emit-llvm -o - %s | opt -S -passes=mem2reg,tailcallelim |
FileC
https://github.com/SamTebbs33 updated
https://github.com/llvm/llvm-project/pull/77936
>From 7314429a203900a8f555e1b0471fdd4cfd4d8d03 Mon Sep 17 00:00:00 2001
From: Samuel Tebbs
Date: Wed, 10 Jan 2024 14:57:04 +
Subject: [PATCH 01/12] [Clang][SME] Detect always_inline used with mismatched
s
@@ -814,6 +821,93 @@ Address AArch64ABIInfo::EmitMSVAArg(CodeGenFunction &CGF,
Address VAListAddr,
/*allowHigherAlign*/ false);
}
+class SMEAttributes {
+public:
+ bool IsStreaming = false;
+ bool IsStreamingBody = false;
+ bool IsStreamingCompati
https://github.com/SamTebbs33 closed
https://github.com/llvm/llvm-project/pull/79134
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>From 7314429a203900a8f555e1b0471fdd4cfd4d8d03 Mon Sep 17 00:00:00 2001
From: Samuel Tebbs
Date: Wed, 10 Jan 2024 14:57:04 +
Subject: [PATCH 1/8] [Clang][SME] Detect always_inline used with mismatched
str
SamTebbs33 wrote:
Agreed. I tried moving it to Support but that introduced a dependency cycle, so
I re-implemented some of the SMEAttributes logic in-place instead.
https://github.com/llvm/llvm-project/pull/77936
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https://github.com/SamTebbs33 created
https://github.com/llvm/llvm-project/pull/77936
This patch adds an error that is emitted when a streaming function is marked as
always_inline and is called from a non-streaming function.
>From bbc6c11cd3def5acbb2ba2f2ddc45df2c399f9d6 Mon Sep 17 00:00:00 20
https://github.com/SamTebbs33 edited
https://github.com/llvm/llvm-project/pull/77936
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>From bbc6c11cd3def5acbb2ba2f2ddc45df2c399f9d6 Mon Sep 17 00:00:00 2001
From: Samuel Tebbs
Date: Wed, 10 Jan 2024 14:57:04 +
Subject: [PATCH 1/2] [Clang][SME] Detect always_inline used with mismatched
str
@@ -812,6 +819,23 @@ Address AArch64ABIInfo::EmitMSVAArg(CodeGenFunction &CGF,
Address VAListAddr,
/*allowHigherAlign*/ false);
}
+void AArch64TargetCodeGenInfo::checkFunctionCallABI(
+CodeGenModule &CGM, SourceLocation CallLoc, const FunctionDec
https://github.com/SamTebbs33 updated
https://github.com/llvm/llvm-project/pull/77936
>From bbc6c11cd3def5acbb2ba2f2ddc45df2c399f9d6 Mon Sep 17 00:00:00 2001
From: Samuel Tebbs
Date: Wed, 10 Jan 2024 14:57:04 +
Subject: [PATCH 1/3] [Clang][SME] Detect always_inline used with mismatched
str
@@ -812,6 +819,23 @@ Address AArch64ABIInfo::EmitMSVAArg(CodeGenFunction &CGF,
Address VAListAddr,
/*allowHigherAlign*/ false);
}
+void AArch64TargetCodeGenInfo::checkFunctionCallABI(
+CodeGenModule &CGM, SourceLocation CallLoc, const FunctionDec
@@ -279,6 +279,8 @@ def err_builtin_needs_feature : Error<"%0 needs target
feature %1">;
def err_function_needs_feature : Error<
"always_inline function %1 requires target feature '%2', but would "
"be inlined into function %0 that is compiled without support for '%2'">;
+
@@ -0,0 +1,12 @@
+// RUN: %clang --target=aarch64-none-linux-gnu -march=armv9-a+sme -O3 -S
-Xclang -verify %s
+
+// Conflicting attributes when using always_inline
+__attribute__((always_inline)) __arm_locally_streaming
+int inlined_fn_local(void) {
+return 42;
+}
---
@@ -812,6 +819,23 @@ Address AArch64ABIInfo::EmitMSVAArg(CodeGenFunction &CGF,
Address VAListAddr,
/*allowHigherAlign*/ false);
}
+void AArch64TargetCodeGenInfo::checkFunctionCallABI(
+CodeGenModule &CGM, SourceLocation CallLoc, const FunctionDec
https://github.com/SamTebbs33 closed
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>From bbc6c11cd3def5acbb2ba2f2ddc45df2c399f9d6 Mon Sep 17 00:00:00 2001
From: Samuel Tebbs
Date: Wed, 10 Jan 2024 14:57:04 +
Subject: [PATCH 1/5] [Clang][SME] Detect always_inline used with mismatched
str
@@ -0,0 +1,12 @@
+// RUN: %clang --target=aarch64-none-linux-gnu -march=armv9-a+sme -O3 -S
-Xclang -verify %s
+
+// Conflicting attributes when using always_inline
+__attribute__((always_inline)) __arm_locally_streaming
+int inlined_fn_local(void) {
+return 42;
+}
---
@@ -279,6 +279,8 @@ def err_builtin_needs_feature : Error<"%0 needs target
feature %1">;
def err_function_needs_feature : Error<
"always_inline function %1 requires target feature '%2', but would "
"be inlined into function %0 that is compiled without support for '%2'">;
+
https://github.com/SamTebbs33 updated
https://github.com/llvm/llvm-project/pull/77936
>From bbc6c11cd3def5acbb2ba2f2ddc45df2c399f9d6 Mon Sep 17 00:00:00 2001
From: Samuel Tebbs
Date: Wed, 10 Jan 2024 14:57:04 +
Subject: [PATCH 1/6] [Clang][SME] Detect always_inline used with mismatched
str
https://github.com/SamTebbs33 updated
https://github.com/llvm/llvm-project/pull/77936
>From 7314429a203900a8f555e1b0471fdd4cfd4d8d03 Mon Sep 17 00:00:00 2001
From: Samuel Tebbs
Date: Wed, 10 Jan 2024 14:57:04 +
Subject: [PATCH 1/7] [Clang][SME] Detect always_inline used with mismatched
str
@@ -3145,7 +3138,7 @@ bool Sema::ParseSVEImmChecks(
return HasError;
}
-static ArmStreamingType getArmStreamingFnType(const FunctionDecl *FD) {
+Sema::ArmStreamingType Sema::getArmStreamingFnType(const FunctionDecl *FD) {
SamTebbs33 wrote:
Done.
https://gi
@@ -812,6 +819,24 @@ Address AArch64ABIInfo::EmitMSVAArg(CodeGenFunction &CGF,
Address VAListAddr,
/*allowHigherAlign*/ false);
}
+void AArch64TargetCodeGenInfo::checkFunctionCallABI(
+CodeGenModule &CGM, SourceLocation CallLoc, const FunctionDec
@@ -153,6 +155,11 @@ class AArch64TargetCodeGenInfo : public TargetCodeGenInfo {
}
return TargetCodeGenInfo::isScalarizableAsmOperand(CGF, Ty);
}
+
+ void checkFunctionCallABI(CodeGenModule &CGM, SourceLocation CallLoc,
SamTebbs33 wrote:
It's called
@@ -812,6 +819,24 @@ Address AArch64ABIInfo::EmitMSVAArg(CodeGenFunction &CGF,
Address VAListAddr,
/*allowHigherAlign*/ false);
}
+void AArch64TargetCodeGenInfo::checkFunctionCallABI(
+CodeGenModule &CGM, SourceLocation CallLoc, const FunctionDec
SamTebbs33 wrote:
> clang has never emitted diagnostics for failure to inline an always_inline
> function. But if gcc is doing it, maybe defaulting to an error isn't such a
> big deal.
clang does actually emit an error when it finds always_inline on a callee with
different target attributes t
https://github.com/SamTebbs33 edited
https://github.com/llvm/llvm-project/pull/77936
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@@ -814,6 +821,42 @@ Address AArch64ABIInfo::EmitMSVAArg(CodeGenFunction &CGF,
Address VAListAddr,
/*allowHigherAlign*/ false);
}
+void AArch64TargetCodeGenInfo::checkFunctionCallABI(
+CodeGenModule &CGM, SourceLocation CallLoc, const FunctionDec
https://github.com/SamTebbs33 created
https://github.com/llvm/llvm-project/pull/79134
This patch adds `IsStreamingCompatible` or `IsStreamingOrSVE2p1` to the SVE
builtins that missed them.
>From 09e6c0dd9b589481bf226b04bafe4da645e73bf2 Mon Sep 17 00:00:00 2001
From: Samuel Tebbs
Date: Tue, 23
https://github.com/SamTebbs33 approved this pull request.
https://github.com/llvm/llvm-project/pull/79140
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@@ -85,17 +90,32 @@ static bool isPrologueCFIInstruction(const MachineInstr
&MI) {
MI.getFlag(MachineInstr::FrameSetup);
}
-static bool containsPrologue(const MachineBasicBlock &MBB) {
- return llvm::any_of(MBB.instrs(), isPrologueCFIInstruction);
-}
-
static bool
@@ -1,25 +1,33 @@
// Check the correct function attributes are generated
-// RUN: %clang_cc1 -triple x86_64-linux -O0 -S -emit-llvm -o- %s
-fstack-clash-protection | FileCheck %s
-// RUN: %clang_cc1 -triple s390x-linux-gnu -O0 -S -emit-llvm -o- %s
-fstack-clash-protection | Fil
https://github.com/SamTebbs33 updated
https://github.com/llvm/llvm-project/pull/68565
>From de07976922782b9dcf5d13d44551b782dc8b3b94 Mon Sep 17 00:00:00 2001
From: Samuel Tebbs
Date: Fri, 6 Oct 2023 17:09:36 +0100
Subject: [PATCH 1/3] [AArch64][SME] Remove immediate argument restriction for
sv
https://github.com/SamTebbs33 edited
https://github.com/llvm/llvm-project/pull/68565
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SamTebbs33 wrote:
I've updated this patch with my progress in lowering the intrinsics in
DAGToDAG, hopefully capturing your feedback in the process.
https://github.com/llvm/llvm-project/pull/68565
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https://github.com/SamTebbs33 created
https://github.com/llvm/llvm-project/pull/68565
The svldr_vnum_za and svstr_vnum_za builtins/intrinsics currently require that
the vnum argument be an immediate, since the instructions take an immediate
vector number. However, we emit 0 as the immediate fo
https://github.com/SamTebbs33 updated
https://github.com/llvm/llvm-project/pull/68565
>From f57f952989ee64d419dc51e9ecf9786720ece3ff Mon Sep 17 00:00:00 2001
From: Samuel Tebbs
Date: Fri, 6 Oct 2023 17:09:36 +0100
Subject: [PATCH 1/2] [AArch64][SME] Remove immediate argument restriction for
sv
@@ -9665,18 +9665,34 @@ Value *CodeGenFunction::EmitSMEZero(const SVETypeFlags
&TypeFlags,
Value *CodeGenFunction::EmitSMELdrStr(const SVETypeFlags &TypeFlags,
SmallVectorImpl &Ops,
unsigned IntID) {
-
@@ -8,7 +8,7 @@
// CHECK-C-LABEL: @test_svldr_vnum_za(
// CHECK-CXX-LABEL: @_Z18test_svldr_vnum_zajPKv(
// CHECK-NEXT: entry:
-// CHECK-NEXT:tail call void @llvm.aarch64.sme.ldr(i32 [[SLICE_BASE:%.*]],
ptr [[PTR:%.*]])
SamTebbs33 wrote:
These changes act
https://github.com/SamTebbs33 edited
https://github.com/llvm/llvm-project/pull/68565
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@@ -8,31 +8,28 @@
// CHECK-C-LABEL: @test_svstr_vnum_za(
// CHECK-CXX-LABEL: @_Z18test_svstr_vnum_zajPv(
// CHECK-NEXT: entry:
-// CHECK-NEXT:tail call void @llvm.aarch64.sme.str(i32 [[SLICE_BASE:%.*]],
ptr [[PTR:%.*]])
+// CHECK-NEXT:tail call void @llvm.aarch64.sme.
@@ -9665,18 +9665,34 @@ Value *CodeGenFunction::EmitSMEZero(const SVETypeFlags
&TypeFlags,
Value *CodeGenFunction::EmitSMELdrStr(const SVETypeFlags &TypeFlags,
SmallVectorImpl &Ops,
unsigned IntID) {
-
@@ -9665,18 +9665,34 @@ Value *CodeGenFunction::EmitSMEZero(const SVETypeFlags
&TypeFlags,
Value *CodeGenFunction::EmitSMELdrStr(const SVETypeFlags &TypeFlags,
SmallVectorImpl &Ops,
unsigned IntID) {
-
@@ -44,10 +44,9 @@ defm SVLD1_ZA32 : ZALoad<"za32", "i", "aarch64_sme_ld1w",
[ImmCheck<0, ImmCheck0
defm SVLD1_ZA64 : ZALoad<"za64", "l", "aarch64_sme_ld1d", [ImmCheck<0,
ImmCheck0_7>]>;
defm SVLD1_ZA128 : ZALoad<"za128", "q", "aarch64_sme_ld1q", [ImmCheck<0,
ImmCheck0_15>]>;
https://github.com/SamTebbs33 created
https://github.com/llvm/llvm-project/pull/68908
The svldr_vnum_za and svstr_vnum_za builtins/intrinsics currently require that
the vnum argument be an immediate, but since vnum is used to modify the base
register via a mul and add, that restriction is not
SamTebbs33 wrote:
I've decided to keep this PR up for the patch that modifies the codegen and IR
intrinsic since there's a lot of good relevant review of that here. I've made a
[new PR](https://github.com/llvm/llvm-project/pull/68908) with the separated
changes that just modify the clang built
https://github.com/SamTebbs33 updated
https://github.com/llvm/llvm-project/pull/68908
>From 000c99324a0bd63e92e0ac056c3ff46d2b92c53e Mon Sep 17 00:00:00 2001
From: Samuel Tebbs
Date: Fri, 6 Oct 2023 17:09:36 +0100
Subject: [PATCH 1/2] [AArch64][SME] Remove immediate argument restriction for
sv
https://github.com/SamTebbs33 updated
https://github.com/llvm/llvm-project/pull/68908
>From 000c99324a0bd63e92e0ac056c3ff46d2b92c53e Mon Sep 17 00:00:00 2001
From: Samuel Tebbs
Date: Fri, 6 Oct 2023 17:09:36 +0100
Subject: [PATCH 1/3] [AArch64][SME] Remove immediate argument restriction for
sv
https://github.com/SamTebbs33 updated
https://github.com/llvm/llvm-project/pull/68908
>From 000c99324a0bd63e92e0ac056c3ff46d2b92c53e Mon Sep 17 00:00:00 2001
From: Samuel Tebbs
Date: Fri, 6 Oct 2023 17:09:36 +0100
Subject: [PATCH 1/4] [AArch64][SME] Remove immediate argument restriction for
sv
https://github.com/SamTebbs33 updated
https://github.com/llvm/llvm-project/pull/68908
>From 000c99324a0bd63e92e0ac056c3ff46d2b92c53e Mon Sep 17 00:00:00 2001
From: Samuel Tebbs
Date: Fri, 6 Oct 2023 17:09:36 +0100
Subject: [PATCH 1/5] [AArch64][SME] Remove immediate argument restriction for
sv
@@ -9716,13 +9711,17 @@ Value *CodeGenFunction::EmitSMELdrStr(const
SVETypeFlags &TypeFlags,
if (Ops.size() == 3) {
Function *Cntsb = CGM.getIntrinsic(Intrinsic::aarch64_sme_cntsb);
llvm::Value *CntsbCall = Builder.CreateCall(Cntsb, {}, "svlb");
-llvm::Value *Mul
https://github.com/SamTebbs33 updated
https://github.com/llvm/llvm-project/pull/68908
>From 000c99324a0bd63e92e0ac056c3ff46d2b92c53e Mon Sep 17 00:00:00 2001
From: Samuel Tebbs
Date: Fri, 6 Oct 2023 17:09:36 +0100
Subject: [PATCH 1/6] [AArch64][SME] Remove immediate argument restriction for
sv
https://github.com/SamTebbs33 updated
https://github.com/llvm/llvm-project/pull/68908
>From 000c99324a0bd63e92e0ac056c3ff46d2b92c53e Mon Sep 17 00:00:00 2001
From: Samuel Tebbs
Date: Fri, 6 Oct 2023 17:09:36 +0100
Subject: [PATCH 1/7] [AArch64][SME] Remove immediate argument restriction for
sv
@@ -9716,13 +9716,16 @@ Value *CodeGenFunction::EmitSMELdrStr(const
SVETypeFlags &TypeFlags,
if (Ops.size() == 3) {
Function *Cntsb = CGM.getIntrinsic(Intrinsic::aarch64_sme_cntsb);
llvm::Value *CntsbCall = Builder.CreateCall(Cntsb, {}, "svlb");
-llvm::Value *Mul
https://github.com/SamTebbs33 closed
https://github.com/llvm/llvm-project/pull/68908
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https://github.com/SamTebbs33 updated
https://github.com/llvm/llvm-project/pull/77936
>From 7314429a203900a8f555e1b0471fdd4cfd4d8d03 Mon Sep 17 00:00:00 2001
From: Samuel Tebbs
Date: Wed, 10 Jan 2024 14:57:04 +
Subject: [PATCH 01/17] [Clang][SME] Detect always_inline used with mismatched
s
@@ -0,0 +1,13 @@
+// RUN: %clang --target=aarch64-none-linux-gnu -march=armv9-a+sme -O3 -S
-Xclang -verify %s
+
+// Conflicting attributes when using always_inline
+__attribute__((always_inline))
SamTebbs33 wrote:
Done.
https://github.com/llvm/llvm-project/pull
@@ -0,0 +1,6 @@
+// RUN: %clang --target=aarch64-none-linux-gnu -march=armv9-a+sme -O3 -S
-Xclang -verify %s
SamTebbs33 wrote:
Done. I originally didn't as the frontend bails out once it's printed all the
errors for one function (-ferror-limit doesn't help here
@@ -279,6 +279,12 @@ def err_builtin_needs_feature : Error<"%0 needs target
feature %1">;
def err_function_needs_feature : Error<
"always_inline function %1 requires target feature '%2', but would "
"be inlined into function %0 that is compiled without support for '%2'">;
@@ -814,6 +820,49 @@ Address AArch64ABIInfo::EmitMSVAArg(CodeGenFunction &CGF,
Address VAListAddr,
/*allowHigherAlign*/ false);
}
+class SMEAttributes {
+public:
+ bool IsStreaming = false;
+ bool IsStreamingCompatible = false;
+ bool HasNewZA = f
@@ -0,0 +1,7 @@
+// RUN: %clang --target=aarch64-none-linux-gnu -march=armv9-a+sme -O3 -S
-Xclang -verify %s
SamTebbs33 wrote:
Done.
https://github.com/llvm/llvm-project/pull/77936
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@@ -814,6 +820,49 @@ Address AArch64ABIInfo::EmitMSVAArg(CodeGenFunction &CGF,
Address VAListAddr,
/*allowHigherAlign*/ false);
}
+class SMEAttributes {
SamTebbs33 wrote:
Done.
https://github.com/llvm/llvm-project/pull/77936
__
@@ -814,6 +820,49 @@ Address AArch64ABIInfo::EmitMSVAArg(CodeGenFunction &CGF,
Address VAListAddr,
/*allowHigherAlign*/ false);
}
+class SMEAttributes {
+public:
+ bool IsStreaming = false;
+ bool IsStreamingCompatible = false;
+ bool HasNewZA = f
https://github.com/SamTebbs33 approved this pull request.
https://github.com/llvm/llvm-project/pull/78169
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@@ -814,6 +820,43 @@ Address AArch64ABIInfo::EmitMSVAArg(CodeGenFunction &CGF,
Address VAListAddr,
/*allowHigherAlign*/ false);
}
+static bool isStreaming(const FunctionDecl *F) {
+ if (F->hasAttr())
+return true;
+ if (const auto *T = F->getTy
https://github.com/SamTebbs33 edited
https://github.com/llvm/llvm-project/pull/77936
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@@ -0,0 +1,47 @@
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -S -target-feature +sme
-verify -DTEST_NONE -x c %s
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -S -target-feature +sme
-verify -DTEST_COMPATIBLE -x c %s
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu
https://github.com/SamTebbs33 updated
https://github.com/llvm/llvm-project/pull/77936
>From 7314429a203900a8f555e1b0471fdd4cfd4d8d03 Mon Sep 17 00:00:00 2001
From: Samuel Tebbs
Date: Wed, 10 Jan 2024 14:57:04 +
Subject: [PATCH 01/18] [Clang][SME] Detect always_inline used with mismatched
s
https://github.com/SamTebbs33 closed
https://github.com/llvm/llvm-project/pull/77936
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@@ -814,6 +820,43 @@ Address AArch64ABIInfo::EmitMSVAArg(CodeGenFunction &CGF,
Address VAListAddr,
/*allowHigherAlign*/ false);
}
+static bool isStreaming(const FunctionDecl *F) {
+ if (F->hasAttr())
+return true;
+ if (const auto *T = F->getTy
https://github.com/SamTebbs33 approved this pull request.
https://github.com/llvm/llvm-project/pull/82649
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https://github.com/SamTebbs33 approved this pull request.
https://github.com/llvm/llvm-project/pull/82648
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@@ -2778,6 +2808,60 @@ void VPWidenPointerInductionRecipe::print(raw_ostream
&O, const Twine &Indent,
}
#endif
+void VPAliasLaneMaskRecipe::execute(VPTransformState &State) {
+ IRBuilderBase Builder = State.Builder;
+ Value *SinkValue = State.get(getSinkValue(), 0, true);
+
@@ -428,6 +431,85 @@ Value *VPInstruction::generatePerPart(VPTransformState
&State, unsigned Part) {
{PredTy, ScalarTC->getType()},
{VIVElem0, ScalarTC}, nullptr, Name);
}
+ case VPInstruction::AliasLaneM
@@ -9838,16 +9902,33 @@ bool LoopVectorizePass::processLoop(Loop *L) {
ElementCount UserVF = Hints.getWidth();
unsigned UserIC = Hints.getInterleave();
+ bool AddBranchWeights =
+ hasBranchWeightMD(*L->getLoopLatch()->getTerminator());
+ GeneratedRTChecks Checks(*PS
SamTebbs33 wrote:
> > It would seem like a "udot" can be represented already as
> > `vecreduce.add(mul(zext, zext))`, and fdot is simpler still. Is there any
> > particular reason to add a new intrinsic for it if it is already
> > representable as a vecreduce? And it would feel like a shame if
@@ -428,6 +431,85 @@ Value *VPInstruction::generatePerPart(VPTransformState
&State, unsigned Part) {
{PredTy, ScalarTC->getType()},
{VIVElem0, ScalarTC}, nullptr, Name);
}
+ case VPInstruction::AliasLaneM
SamTebbs33 wrote:
Ping.
https://github.com/llvm/llvm-project/pull/100579
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@@ -448,6 +448,20 @@ struct PointerDiffInfo {
NeedsFreeze(NeedsFreeze) {}
};
+/// A pair of pointers that could overlap across a loop iteration.
SamTebbs33 wrote:
That sounds good to me. I originally put it here so it was next to the related
`Pointer
@@ -8520,7 +8561,29 @@
LoopVectorizationPlanner::tryToBuildVPlanWithVPRecipes(VFRange &Range) {
// When not folding the tail, we know that the induction increment will not
// overflow.
bool HasNUW = Style == TailFoldingStyle::None;
- addCanonicalIVRecipes(*Plan, Legal->
@@ -0,0 +1,404 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 4
SamTebbs33 wrote:
That's true, I've removed this file and have started work on adding a test to
the llvm-test-suite to replace it. A statistic
@@ -428,6 +431,85 @@ Value *VPInstruction::generatePerPart(VPTransformState
&State, unsigned Part) {
{PredTy, ScalarTC->getType()},
{VIVElem0, ScalarTC}, nullptr, Name);
}
+ case VPInstruction::AliasLaneM
@@ -16,8 +16,8 @@
#include "llvm/ADT/EquivalenceClasses.h"
#include "llvm/Analysis/LoopAnalysisManager.h"
-#include "llvm/Analysis/ScalarEvolutionExpressions.h"
#include "llvm/IR/DiagnosticInfo.h"
+#include "llvm/Transforms/Utils/ScalarEvolutionExpander.h"
Sa
@@ -9,11 +9,11 @@ define void @same_step_and_size(ptr %a, ptr %b, i64 %n) {
; CHECK-NEXT:[[A2:%.*]] = ptrtoint ptr [[A:%.*]] to i64
; CHECK-NEXT:[[B1:%.*]] = ptrtoint ptr [[B:%.*]] to i64
; CHECK-NEXT:[[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N:%.*]], 4
-; CHECK-NEXT
@@ -9838,16 +9902,33 @@ bool LoopVectorizePass::processLoop(Loop *L) {
ElementCount UserVF = Hints.getWidth();
unsigned UserIC = Hints.getInterleave();
+ bool AddBranchWeights =
+ hasBranchWeightMD(*L->getLoopLatch()->getTerminator());
+ GeneratedRTChecks Checks(*PS
https://github.com/SamTebbs33 edited
https://github.com/llvm/llvm-project/pull/100579
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