Author: chaofan
Date: Mon Apr 22 22:50:24 2019
New Revision: 358949
URL: http://llvm.org/viewvc/llvm-project?rev=358949&view=rev
Log:
[PowerPC] [Clang] Port MMX intrinsics and basic test cases to Power
Port mmintrin.h which include x86 MMX intrinsics implementation to PowerPC
platform (using Alt
Author: chaofan
Date: Sat Apr 27 23:27:33 2019
New Revision: 359393
URL: http://llvm.org/viewvc/llvm-project?rev=359393&view=rev
Log:
[PowerPC][Clang] Add tests for PowerPC MMX intrinsics
Add the rest of test cases covering functions defined in mmintrin.h on PowerPC.
Reviewed By: Jinsong Ji
Mod
Author: chaofan
Date: Wed Jul 17 23:20:12 2019
New Revision: 366406
URL: http://llvm.org/viewvc/llvm-project?rev=366406&view=rev
Log:
[PowerPC][Clang] Remove use of malloc in mm_malloc
Remove dependency of malloc in implementation of mm_malloc function in PowerPC
intrinsics and alignment assumpti
Author: chaofan
Date: Mon Jul 29 19:18:11 2019
New Revision: 367281
URL: http://llvm.org/viewvc/llvm-project?rev=367281&view=rev
Log:
[PowerPC] [Clang] Add platform guards to PPC vector intrinsics headers
Move the platform check out of PPC Linux toolchain code and add platform guards
to the intri
Author: Qiu Chaofan
Date: 2020-07-02T16:21:54+08:00
New Revision: aa4fd7d848d78611b4e6b6768edc6ab9d2b1efa5
URL:
https://github.com/llvm/llvm-project/commit/aa4fd7d848d78611b4e6b6768edc6ab9d2b1efa5
DIFF:
https://github.com/llvm/llvm-project/commit/aa4fd7d848d78611b4e6b6768edc6ab9d2b1efa5.diff
L
Author: Qiu Chaofan
Date: 2020-07-16T00:11:09+08:00
New Revision: ef30a00a57c78a91571a66555f2531af0f1f51e5
URL:
https://github.com/llvm/llvm-project/commit/ef30a00a57c78a91571a66555f2531af0f1f51e5
DIFF:
https://github.com/llvm/llvm-project/commit/ef30a00a57c78a91571a66555f2531af0f1f51e5.diff
L
https://github.com/ecnelises created
https://github.com/llvm/llvm-project/pull/71696
If return type of overriden method is pointer or reference to non-class type,
qualifiers cannot be dropped. This also fixes check when qualifier of overriden
method's class return type is not subset of super m
https://github.com/ecnelises updated
https://github.com/llvm/llvm-project/pull/66040
>From ebaafdd6d45bb62b1847e60df627dfd96971a22c Mon Sep 17 00:00:00 2001
From: Qiu Chaofan
Date: Tue, 12 Sep 2023 10:39:55 +0800
Subject: [PATCH] [PowerPC] Check value uses in ValueBit tracking
---
llvm/lib/Ta
ecnelises wrote:
Gentle ping... any comments?
https://github.com/llvm/llvm-project/pull/66040
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@@ -289,3 +289,29 @@ namespace PR8168 {
static void foo() {} // expected-error{{'static' member function 'foo'
overrides a virtual function}}
};
}
+
+namespace T13 {
+ class A {
+ public:
+virtual const int* foo(); // expected-note{{overridden virtual function is
https://github.com/ecnelises updated
https://github.com/llvm/llvm-project/pull/71696
>From 1d0109b7f370a3689a92e20ab52597b112669e47 Mon Sep 17 00:00:00 2001
From: Qiu Chaofan
Date: Thu, 9 Nov 2023 00:00:26 +0800
Subject: [PATCH 1/2] [Clang][Sema] Fix qualifier restriction of overriden
methods
https://github.com/ecnelises updated
https://github.com/llvm/llvm-project/pull/71696
>From 1d0109b7f370a3689a92e20ab52597b112669e47 Mon Sep 17 00:00:00 2001
From: Qiu Chaofan
Date: Thu, 9 Nov 2023 00:00:26 +0800
Subject: [PATCH 1/3] [Clang][Sema] Fix qualifier restriction of overriden
methods
https://github.com/ecnelises created
https://github.com/llvm/llvm-project/pull/72230
Fixes #72198
>From 0b74141dec486989f75f4c361e8b950b869f7a1e Mon Sep 17 00:00:00 2001
From: Qiu Chaofan
Date: Tue, 14 Nov 2023 16:20:42 +0800
Subject: [PATCH] [Sema] Check nullness of captured type before use
@@ -2399,6 +2405,30 @@ bool PPCFrameLowering::assignCalleeSavedSpillSlots(
return AllSpilledToReg;
}
+static void findContinuousLoadStore(ArrayRef CSI,
+Register &MergeFrom) {
+ CalleeSavedInfo BeginI = CSI[0];
ecnelises
@@ -1676,6 +1676,10 @@
PPCRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
bool noImmForm = !MI.isInlineAsm() && OpC != TargetOpcode::STACKMAP &&
OpC != TargetOpcode::PATCHPOINT && !ImmToIdxMap.count(OpC);
ecnelises wrote:
@@ -0,0 +1,110 @@
+; RUN: llc -mtriple=powerpc-unknown-aix-xcoff -verify-machineinstrs \
+; RUN: -mcpu=pwr4 -mattr=-altivec --ppc-enable-load-store-multiple < %s \
+; RUN: | FileCheck %s
+
+; CHECK: stmw 16, 64(1) # 4-byte Folded Spill
+; CHECK: lmw 16, 64(1)# 4-byte
@@ -2513,7 +2548,23 @@ bool PPCFrameLowering::spillCalleeSavedRegisters(
!MF->getFunction().hasFnAttribute(Attribute::NoUnwind))
TII.storeRegToStackSlotNoUpd(MBB, MI, Reg, !IsLiveIn,
I.getFrameIdx(), RC, TRI);
-
@@ -2607,6 +2658,11 @@ bool PPCFrameLowering::restoreCalleeSavedRegisters(
unsigned CSIIndex = 0;
BitVector Restored(TRI->getNumRegs());
+ Register MergeFrom = PPC::R31;
+ if (EnableLoadStoreMultiple && !Subtarget.isLittleEndian() &&
+ !Subtarget.isPPC64())
+fin
@@ -2399,6 +2405,30 @@ bool PPCFrameLowering::assignCalleeSavedSpillSlots(
return AllSpilledToReg;
}
+static void findContinuousLoadStore(ArrayRef CSI,
+Register &MergeFrom) {
+ CalleeSavedInfo BeginI = CSI[0];
+ unsigned I = 1, E = CSI.
https://github.com/ecnelises updated
https://github.com/llvm/llvm-project/pull/71696
>From 1d0109b7f370a3689a92e20ab52597b112669e47 Mon Sep 17 00:00:00 2001
From: Qiu Chaofan
Date: Thu, 9 Nov 2023 00:00:26 +0800
Subject: [PATCH 1/4] [Clang][Sema] Fix qualifier restriction of overriden
methods
ecnelises wrote:
I tested with a number of random floating values. In most of the cases, the
expanded result is exactly the same as libcall result.
But when `fmod(a,b)` is very close to `b` (smaller than `1e-10`, for example,
`fmod(521862.045173469, 31.048432006988875)`), the result would be t
https://github.com/ecnelises edited
https://github.com/llvm/llvm-project/pull/72230
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https://github.com/ecnelises closed
https://github.com/llvm/llvm-project/pull/72230
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ecnelises wrote:
Abandon in favor of #72428
https://github.com/llvm/llvm-project/pull/72230
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https://github.com/ecnelises updated
https://github.com/llvm/llvm-project/pull/67298
>From 58cd725354eae6aa733c98374a804de0ef595c60 Mon Sep 17 00:00:00 2001
From: Qiu Chaofan
Date: Mon, 25 Sep 2023 16:57:39 +0800
Subject: [PATCH 1/2] [PowerPC] Disable float128 on AIX in Clang
PowerPC AIX backe
https://github.com/ecnelises updated
https://github.com/llvm/llvm-project/pull/67302
>From a1567f579531c3abbd1f4e9b7c7edd2f95ead42c Mon Sep 17 00:00:00 2001
From: Qiu Chaofan
Date: Mon, 25 Sep 2023 17:10:51 +0800
Subject: [PATCH 1/2] [PowerPC] Implement llvm.set.rounding intrinsic
According to
https://github.com/ecnelises updated
https://github.com/llvm/llvm-project/pull/66978
>From 2a7b9be6cd0705590c85c51b35ea99fe053aaf47 Mon Sep 17 00:00:00 2001
From: Qiu Chaofan
Date: Wed, 6 Sep 2023 16:16:34 +0800
Subject: [PATCH 1/2] [PowerPC] Combine sub within setcc back to sext
---
llvm/lib
https://github.com/ecnelises closed
https://github.com/llvm/llvm-project/pull/67298
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https://github.com/ecnelises updated
https://github.com/llvm/llvm-project/pull/66978
>From 2a7b9be6cd0705590c85c51b35ea99fe053aaf47 Mon Sep 17 00:00:00 2001
From: Qiu Chaofan
Date: Wed, 6 Sep 2023 16:16:34 +0800
Subject: [PATCH 1/3] [PowerPC] Combine sub within setcc back to sext
---
llvm/lib
https://github.com/ecnelises created
https://github.com/llvm/llvm-project/pull/70652
7e42545 rejects unsupported mcmodel options, but large should be a supported
model for 32-bit AIX targets.
>From 09c722552b69dd812c9117ba9832055f3abbf9a1 Mon Sep 17 00:00:00 2001
From: Qiu Chaofan
Date: Mon,
https://github.com/ecnelises edited
https://github.com/llvm/llvm-project/pull/67829
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@@ -5723,16 +5723,14 @@ void Clang::ConstructJob(Compilation &C, const
JobAction &JA,
if (Arg *A = Args.getLastArg(options::OPT_mcmodel_EQ)) {
StringRef CM = A->getValue();
bool Ok = false;
-if (Triple.isOSAIX() && CM == "medium") {
+if (Triple.isOSAIX() && C
https://github.com/ecnelises edited
https://github.com/llvm/llvm-project/pull/69432
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https://github.com/ecnelises closed
https://github.com/llvm/llvm-project/pull/69432
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https://github.com/ecnelises edited
https://github.com/llvm/llvm-project/pull/69432
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https://github.com/ecnelises edited
https://github.com/llvm/llvm-project/pull/69432
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https://github.com/ecnelises edited
https://github.com/llvm/llvm-project/pull/70652
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https://github.com/ecnelises closed
https://github.com/llvm/llvm-project/pull/70652
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ecnelises wrote:
https://github.com/llvm/llvm-project/issues/71356 to track SPE issue
https://github.com/llvm/llvm-project/pull/70652
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https://github.com/ecnelises updated
https://github.com/llvm/llvm-project/pull/67301
>From 92abb76631594dfc2ca586c46c38031610be0548 Mon Sep 17 00:00:00 2001
From: Qiu Chaofan
Date: Mon, 25 Sep 2023 17:08:59 +0800
Subject: [PATCH 1/3] [Legalizer] Expand fmaximum and fminimum
According to langre
https://github.com/ecnelises updated
https://github.com/llvm/llvm-project/pull/67301
>From 92abb76631594dfc2ca586c46c38031610be0548 Mon Sep 17 00:00:00 2001
From: Qiu Chaofan
Date: Mon, 25 Sep 2023 17:08:59 +0800
Subject: [PATCH 1/5] [Legalizer] Expand fmaximum and fminimum
According to langre
@@ -8262,6 +8262,64 @@ SDValue TargetLowering::expandFMINNUM_FMAXNUM(SDNode
*Node,
return SDValue();
}
+SDValue TargetLowering::expandFMINIMUM_FMAXIMUM(SDNode *N,
+SelectionDAG &DAG) const {
+ SDLoc DL(N);
+ SDValue LHS = N-
@@ -8262,6 +8262,64 @@ SDValue TargetLowering::expandFMINNUM_FMAXNUM(SDNode
*Node,
return SDValue();
}
+SDValue TargetLowering::expandFMINIMUM_FMAXIMUM(SDNode *N,
+SelectionDAG &DAG) const {
+ SDLoc DL(N);
+ SDValue LHS = N-
ecnelises wrote:
> Is there any existing vector test coverage?
Yes, there are vector tests in PowerPC's fminimum-fmaximum.ll.
https://github.com/llvm/llvm-project/pull/67301
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@@ -8900,6 +8900,83 @@ SDValue PPCTargetLowering::LowerINT_TO_FP(SDValue Op,
return FP;
}
+SDValue PPCTargetLowering::LowerSET_ROUNDING(SDValue Op,
+ SelectionDAG &DAG) const {
+ SDLoc Dl(Op);
+ MachineFunction &MF = DAG.getMachi
https://github.com/ecnelises updated
https://github.com/llvm/llvm-project/pull/67302
>From a1567f579531c3abbd1f4e9b7c7edd2f95ead42c Mon Sep 17 00:00:00 2001
From: Qiu Chaofan
Date: Mon, 25 Sep 2023 17:10:51 +0800
Subject: [PATCH 1/3] [PowerPC] Implement llvm.set.rounding intrinsic
According to
https://github.com/ecnelises updated
https://github.com/llvm/llvm-project/pull/67302
>From a1567f579531c3abbd1f4e9b7c7edd2f95ead42c Mon Sep 17 00:00:00 2001
From: Qiu Chaofan
Date: Mon, 25 Sep 2023 17:10:51 +0800
Subject: [PATCH 1/4] [PowerPC] Implement llvm.set.rounding intrinsic
According to
ecnelises wrote:
> The patch looks good but I am not familiar with PPC instructions enough.
> Could you please run the runtime tests from here:
> https://github.com/llvm/llvm-test-suite/tree/main/MultiSource/UnitTests/Float/rounding?
> You just need to build application from two files: clang r
https://github.com/ecnelises updated
https://github.com/llvm/llvm-project/pull/67642
>From 2ff3a666e4347f9224c1a406126282d98e3c9633 Mon Sep 17 00:00:00 2001
From: Qiu Chaofan
Date: Thu, 28 Sep 2023 16:09:40 +0800
Subject: [PATCH 1/2] [DAGCombiner] Combine frem into fdiv+ftrunc+fma
---
llvm/li
https://github.com/ecnelises updated
https://github.com/llvm/llvm-project/pull/66978
>From 2a7b9be6cd0705590c85c51b35ea99fe053aaf47 Mon Sep 17 00:00:00 2001
From: Qiu Chaofan
Date: Wed, 6 Sep 2023 16:16:34 +0800
Subject: [PATCH 1/4] [PowerPC] Combine sub within setcc back to sext
---
llvm/lib
ecnelises wrote:
Ping
https://github.com/llvm/llvm-project/pull/71696
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https://github.com/ecnelises created
https://github.com/llvm/llvm-project/pull/76495
This builtin will work as barrier for instruction motion (scheduling, etc.)
>From aaa11bc775b9aa3a0398ba2bbca4087e99f04243 Mon Sep 17 00:00:00 2001
From: Qiu Chaofan
Date: Thu, 28 Dec 2023 16:54:25 +0800
Subje
https://github.com/ecnelises ready_for_review
https://github.com/llvm/llvm-project/pull/76495
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https://github.com/ecnelises updated
https://github.com/llvm/llvm-project/pull/76495
>From aaa11bc775b9aa3a0398ba2bbca4087e99f04243 Mon Sep 17 00:00:00 2001
From: Qiu Chaofan
Date: Thu, 28 Dec 2023 16:54:25 +0800
Subject: [PATCH 1/2] [PowerPC] Implement fence builtin
---
clang/include/clang/B
https://github.com/ecnelises updated
https://github.com/llvm/llvm-project/pull/76495
>From aaa11bc775b9aa3a0398ba2bbca4087e99f04243 Mon Sep 17 00:00:00 2001
From: Qiu Chaofan
Date: Thu, 28 Dec 2023 16:54:25 +0800
Subject: [PATCH 1/3] [PowerPC] Implement fence builtin
---
clang/include/clang/B
https://github.com/ecnelises updated
https://github.com/llvm/llvm-project/pull/77412
>From 87e1d4acdd87d45f265e590ad135e21f352dc5ad Mon Sep 17 00:00:00 2001
From: Qiu Chaofan
Date: Tue, 9 Jan 2024 13:33:56 +0800
Subject: [PATCH 1/2] [Legalizer] Soften EXTRACT_ELEMENT on ppcf128
ppc_fp128 value
@@ -8262,6 +8262,64 @@ SDValue TargetLowering::expandFMINNUM_FMAXNUM(SDNode
*Node,
return SDValue();
}
+SDValue TargetLowering::expandFMINIMUM_FMAXIMUM(SDNode *N,
+SelectionDAG &DAG) const {
+ SDLoc DL(N);
+ SDValue LHS = N-
https://github.com/ecnelises updated
https://github.com/llvm/llvm-project/pull/67301
>From 92abb76631594dfc2ca586c46c38031610be0548 Mon Sep 17 00:00:00 2001
From: Qiu Chaofan
Date: Mon, 25 Sep 2023 17:08:59 +0800
Subject: [PATCH 1/6] [Legalizer] Expand fmaximum and fminimum
According to langre
https://github.com/ecnelises updated
https://github.com/llvm/llvm-project/pull/77412
>From 87e1d4acdd87d45f265e590ad135e21f352dc5ad Mon Sep 17 00:00:00 2001
From: Qiu Chaofan
Date: Tue, 9 Jan 2024 13:33:56 +0800
Subject: [PATCH 1/3] [Legalizer] Soften EXTRACT_ELEMENT on ppcf128
ppc_fp128 value
https://github.com/ecnelises updated
https://github.com/llvm/llvm-project/pull/76495
>From aaa11bc775b9aa3a0398ba2bbca4087e99f04243 Mon Sep 17 00:00:00 2001
From: Qiu Chaofan
Date: Thu, 28 Dec 2023 16:54:25 +0800
Subject: [PATCH 1/4] [PowerPC] Implement fence builtin
---
clang/include/clang/B
@@ -8900,6 +8900,82 @@ SDValue PPCTargetLowering::LowerINT_TO_FP(SDValue Op,
return FP;
}
+SDValue PPCTargetLowering::LowerSET_ROUNDING(SDValue Op,
+ SelectionDAG &DAG) const {
+ SDLoc Dl(Op);
+ MachineFunction &MF = DAG.getMachi
https://github.com/ecnelises updated
https://github.com/llvm/llvm-project/pull/67302
>From a1567f579531c3abbd1f4e9b7c7edd2f95ead42c Mon Sep 17 00:00:00 2001
From: Qiu Chaofan
Date: Mon, 25 Sep 2023 17:10:51 +0800
Subject: [PATCH 1/6] [PowerPC] Implement llvm.set.rounding intrinsic
According to
ecnelises wrote:
> Maybe we can do some perf test between this expansion for set rounding mode
> and the system library's version for fesetround().
They are faster than system `fesetround` on both Linux and AIX. Linux glibc
optimizes `fesetround` with faster `mffscrn` on P9, I just exploited t
@@ -8900,6 +8900,82 @@ SDValue PPCTargetLowering::LowerINT_TO_FP(SDValue Op,
return FP;
}
+SDValue PPCTargetLowering::LowerSET_ROUNDING(SDValue Op,
+ SelectionDAG &DAG) const {
+ SDLoc Dl(Op);
+ MachineFunction &MF = DAG.getMachi
https://github.com/ecnelises updated
https://github.com/llvm/llvm-project/pull/67302
>From a1567f579531c3abbd1f4e9b7c7edd2f95ead42c Mon Sep 17 00:00:00 2001
From: Qiu Chaofan
Date: Mon, 25 Sep 2023 17:10:51 +0800
Subject: [PATCH 1/7] [PowerPC] Implement llvm.set.rounding intrinsic
According to
@@ -0,0 +1,14 @@
+// REQUIRES: powerpc-registered-target
+// RUN: %clang -target powerpc64le -c %s -mllvm -stop-after=finalize-isel -o -
| \
+// RUN: FileCheck %s
+// RUN: %clang -target powerpc64 -c %s -mllvm -stop-after=finalize-isel -o - |
\
+// RUN: FileCheck %s
@@ -782,6 +782,8 @@ ArrayRef PPCTargetInfo::getGCCRegNames()
const {
const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = {
// While some of these aliases do map to different registers
// they still share the same register name.
+// Strictly speaking, "ca
@@ -0,0 +1,14 @@
+// REQUIRES: powerpc-registered-target
+// RUN: %clang -target powerpc64le -c %s -mllvm -stop-after=finalize-isel -o -
| \
+// RUN: FileCheck %s
+// RUN: %clang -target powerpc64 -c %s -mllvm -stop-after=finalize-isel -o - |
\
+// RUN: FileCheck %s
@@ -0,0 +1,14 @@
+// REQUIRES: powerpc-registered-target
+// RUN: %clang -target powerpc64le -c %s -mllvm -stop-after=finalize-isel -o -
| \
+// RUN: FileCheck %s
+// RUN: %clang -target powerpc64 -c %s -mllvm -stop-after=finalize-isel -o - |
\
+// RUN: FileCheck %s
https://github.com/ecnelises updated
https://github.com/llvm/llvm-project/pull/76488
>From 7eb909423d49ea19d9978b097ceb8c4a95fc7bac Mon Sep 17 00:00:00 2001
From: Qiu Chaofan
Date: Thu, 28 Dec 2023 11:09:07 +0800
Subject: [PATCH 1/2] [PowerPC] Peephole address calculation in TOC memops
---
ll
https://github.com/ecnelises ready_for_review
https://github.com/llvm/llvm-project/pull/76488
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Author: Qiu Chaofan
Date: 2022-03-24T17:01:35+08:00
New Revision: d00e8400e2e3a602fdf40cd7348ed113952261d3
URL:
https://github.com/llvm/llvm-project/commit/d00e8400e2e3a602fdf40cd7348ed113952261d3
DIFF:
https://github.com/llvm/llvm-project/commit/d00e8400e2e3a602fdf40cd7348ed113952261d3.diff
L
Author: Qiu Chaofan
Date: 2022-03-24T20:03:08+08:00
New Revision: 406bde9a15136254f2b10d9ef3a42033b3cb1b16
URL:
https://github.com/llvm/llvm-project/commit/406bde9a15136254f2b10d9ef3a42033b3cb1b16
DIFF:
https://github.com/llvm/llvm-project/commit/406bde9a15136254f2b10d9ef3a42033b3cb1b16.diff
L
Author: Qiu Chaofan
Date: 2022-03-31T15:58:01+08:00
New Revision: e1b85430e98f243a32156617a54f3f01fd74fd8e
URL:
https://github.com/llvm/llvm-project/commit/e1b85430e98f243a32156617a54f3f01fd74fd8e
DIFF:
https://github.com/llvm/llvm-project/commit/e1b85430e98f243a32156617a54f3f01fd74fd8e.diff
L
Author: Qiu Chaofan
Date: 2021-07-27T00:26:50+08:00
New Revision: 240dde948252ab9ef0428c46ca578c06127d3799
URL:
https://github.com/llvm/llvm-project/commit/240dde948252ab9ef0428c46ca578c06127d3799
DIFF:
https://github.com/llvm/llvm-project/commit/240dde948252ab9ef0428c46ca578c06127d3799.diff
L
Author: Piotr Kubaj
Date: 2022-02-06T01:20:31+08:00
New Revision: f2f4080c10f4319adf75c660425911cd4e0e1843
URL:
https://github.com/llvm/llvm-project/commit/f2f4080c10f4319adf75c660425911cd4e0e1843
DIFF:
https://github.com/llvm/llvm-project/commit/f2f4080c10f4319adf75c660425911cd4e0e1843.diff
L
Author: Qiu Chaofan
Date: 2022-02-09T17:00:34+08:00
New Revision: c091792cd3a82e60e10ea14c28ff64b14c17a254
URL:
https://github.com/llvm/llvm-project/commit/c091792cd3a82e60e10ea14c28ff64b14c17a254
DIFF:
https://github.com/llvm/llvm-project/commit/c091792cd3a82e60e10ea14c28ff64b14c17a254.diff
L
Author: Qiu Chaofan
Date: 2022-07-21T16:33:41+08:00
New Revision: 708084ec379ea8f409fbae6ba5d4154ea469f25a
URL:
https://github.com/llvm/llvm-project/commit/708084ec379ea8f409fbae6ba5d4154ea469f25a
DIFF:
https://github.com/llvm/llvm-project/commit/708084ec379ea8f409fbae6ba5d4154ea469f25a.diff
L
https://github.com/ecnelises updated
https://github.com/llvm/llvm-project/pull/85040
>From 4977659b16a7f220e1a738a0b9841102fe9f1d07 Mon Sep 17 00:00:00 2001
From: Qiu Chaofan
Date: Wed, 13 Mar 2024 15:46:51 +0800
Subject: [PATCH] [PowerPC] Fix behavior of rldimi/rlwimi/rlwnm builtins
rldimi is
https://github.com/ecnelises edited
https://github.com/llvm/llvm-project/pull/85040
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https://github.com/ecnelises edited
https://github.com/llvm/llvm-project/pull/85040
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https://github.com/ecnelises updated
https://github.com/llvm/llvm-project/pull/85040
>From 4977659b16a7f220e1a738a0b9841102fe9f1d07 Mon Sep 17 00:00:00 2001
From: Qiu Chaofan
Date: Wed, 13 Mar 2024 15:46:51 +0800
Subject: [PATCH 1/2] [PowerPC] Fix behavior of rldimi/rlwimi/rlwnm builtins
rldim
https://github.com/ecnelises updated
https://github.com/llvm/llvm-project/pull/85040
>From 4977659b16a7f220e1a738a0b9841102fe9f1d07 Mon Sep 17 00:00:00 2001
From: Qiu Chaofan
Date: Wed, 13 Mar 2024 15:46:51 +0800
Subject: [PATCH 1/3] [PowerPC] Fix behavior of rldimi/rlwimi/rlwnm builtins
rldim
https://github.com/ecnelises updated
https://github.com/llvm/llvm-project/pull/85040
>From 4977659b16a7f220e1a738a0b9841102fe9f1d07 Mon Sep 17 00:00:00 2001
From: Qiu Chaofan
Date: Wed, 13 Mar 2024 15:46:51 +0800
Subject: [PATCH 1/4] [PowerPC] Fix behavior of rldimi/rlwimi/rlwnm builtins
rldim
https://github.com/ecnelises closed
https://github.com/llvm/llvm-project/pull/85040
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https://github.com/ecnelises created
https://github.com/llvm/llvm-project/pull/86783
rldimi is 64-bit instruction, due to backward compatibility, it needs to be
expanded into series of rlwimi in 32-bit environment. In the future, we may
improve bit permutation selector and remove such direct c
https://github.com/ecnelises updated
https://github.com/llvm/llvm-project/pull/86783
>From b886dcf2da25417d9f8cd75ff4aa58686e35139d Mon Sep 17 00:00:00 2001
From: Qiu Chaofan
Date: Wed, 27 Mar 2024 17:11:04 +0800
Subject: [PATCH] [PowerPC] Implement 32-bit expansion for rldimi
rldimi is 64-bit
https://github.com/ecnelises updated
https://github.com/llvm/llvm-project/pull/86783
>From b886dcf2da25417d9f8cd75ff4aa58686e35139d Mon Sep 17 00:00:00 2001
From: Qiu Chaofan
Date: Wed, 27 Mar 2024 17:11:04 +0800
Subject: [PATCH 1/2] [PowerPC] Implement 32-bit expansion for rldimi
rldimi is 64
https://github.com/ecnelises edited
https://github.com/llvm/llvm-project/pull/86783
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https://github.com/ecnelises updated
https://github.com/llvm/llvm-project/pull/86783
>From b886dcf2da25417d9f8cd75ff4aa58686e35139d Mon Sep 17 00:00:00 2001
From: Qiu Chaofan
Date: Wed, 27 Mar 2024 17:11:04 +0800
Subject: [PATCH 1/3] [PowerPC] Implement 32-bit expansion for rldimi
rldimi is 64
https://github.com/ecnelises updated
https://github.com/llvm/llvm-project/pull/86783
>From b886dcf2da25417d9f8cd75ff4aa58686e35139d Mon Sep 17 00:00:00 2001
From: Qiu Chaofan
Date: Wed, 27 Mar 2024 17:11:04 +0800
Subject: [PATCH 1/4] [PowerPC] Implement 32-bit expansion for rldimi
rldimi is 64
https://github.com/ecnelises created
https://github.com/llvm/llvm-project/pull/85040
rldimi is 64-bit instruction, so the corresponding builtin should not be
available in 32-bit mode. Also, clang should check if shift amount and mask are
consistent.
>From d5aa72a2d0ed083919b37cc1faacad1f3addc
https://github.com/ecnelises created
https://github.com/llvm/llvm-project/pull/82968
These builtins are already there in Clang, however current codegen may produce
suboptimal results due to their complex behavior. Implement them as intrinsics
to ensure expected instructions are emitted.
>From
https://github.com/ecnelises updated
https://github.com/llvm/llvm-project/pull/82968
>From a06fa5e18313ad50019d50006e34a6b8249d95cd Mon Sep 17 00:00:00 2001
From: Qiu Chaofan
Date: Mon, 26 Feb 2024 16:32:28 +0800
Subject: [PATCH 1/2] [PowerPC] Add intrinsics for rldimi/rlwimi/rlwnm
These built
https://github.com/ecnelises updated
https://github.com/llvm/llvm-project/pull/82968
>From a06fa5e18313ad50019d50006e34a6b8249d95cd Mon Sep 17 00:00:00 2001
From: Qiu Chaofan
Date: Mon, 26 Feb 2024 16:32:28 +0800
Subject: [PATCH 1/3] [PowerPC] Add intrinsics for rldimi/rlwimi/rlwnm
These built
@@ -58,3 +58,18 @@ entry:
%8 = or i64 %6, %7
ret i64 %8
}
+
+define i64 @rldimi_intrinsic(i64 %a) {
+; CHECK-LABEL: rldimi_intrinsic:
+; CHECK: # %bb.0:
+; CHECK-NEXT:rldimi 3, 3, 8, 0
+; CHECK-NEXT:rldimi 3, 3, 16, 0
+; CHECK-NEXT:rldimi 3, 3, 32, 0
+; CH
@@ -1,61 +1,111 @@
-; All of these ands and shifts should be folded into rlwimi's
-; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -o %t
-; RUN: not grep and %t
-; RUN: not grep srawi %t
-; RUN: not grep srwi %t
-; RUN: not grep slwi %t
-; RUN: grep rlwinm %t | count 8
+; N
@@ -1,61 +1,111 @@
-; All of these ands and shifts should be folded into rlwimi's
-; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -o %t
-; RUN: not grep and %t
-; RUN: not grep srawi %t
-; RUN: not grep srwi %t
-; RUN: not grep slwi %t
-; RUN: grep rlwinm %t | count 8
+; N
https://github.com/ecnelises updated
https://github.com/llvm/llvm-project/pull/82968
>From a06fa5e18313ad50019d50006e34a6b8249d95cd Mon Sep 17 00:00:00 2001
From: Qiu Chaofan
Date: Mon, 26 Feb 2024 16:32:28 +0800
Subject: [PATCH 1/4] [PowerPC] Add intrinsics for rldimi/rlwimi/rlwnm
These built
https://github.com/ecnelises closed
https://github.com/llvm/llvm-project/pull/82968
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