[PATCH] D105268: [X86] AVX512FP16 instructions enabling 5/6

pengfei updated this revision to Diff 356585. pengfei added a comment. Fix the capitalization mismatch in tests. Thanks Sanjay! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105268/new/ https://reviews.llvm.org/D105268 Files: clang/include/clang

[PATCH] D105263: [X86] AVX512FP16 instructions enabling 1/6

pengfei added inline comments. Comment at: clang/lib/Headers/avx512vlfp16intrin.h:74 +static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_abs_ph(__m256h __A) { + return (__m256h)_mm256_and_epi32(_mm256_set1_epi32(0x7FFF7FFF), (__m256i)__A); +} craig.topper w

[PATCH] D105264: [X86] AVX512FP16 instructions enabling 2/6

pengfei updated this revision to Diff 357721. pengfei added a comment. Rebase. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105264/new/ https://reviews.llvm.org/D105264 Files: clang/include/clang/Basic/BuiltinsX86.def clang/lib/CodeGen/CGBuil

[PATCH] D105265: [X86] AVX512FP16 instructions enabling 3/6

pengfei updated this revision to Diff 357722. pengfei added a comment. Add tests for __extendhfxf2 and __truncxfhf2. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105265/new/ https://reviews.llvm.org/D105265 Files: clang/include/clang/Basic/Buil

[PATCH] D97318: [clang][CodeGen] Allow fp16 arg pass by register

pengfei added a comment. In D97318#2587866 , @yaxunl wrote: > So should we revive this patch by classifying _Float16 as SSE, then it will > conform to the ABI. And we should be compatible with gcc assuming it also > follows the ABI. @pengfei Thanks @hli

[PATCH] D93594: [X86] Pass to transform amx intrinsics to scalar operation.

pengfei added inline comments. Comment at: llvm/lib/Target/X86/X86LowerAMXIntrinsics.cpp:88 + +template pengfei wrote: > > Can we just use `template `? I think it also can reduce the > > branch. > Why do we need a template instead of passing a parameter `bool IsLoad`? Bing thou

[PATCH] D96709: Add Windows ehcont section support (/guard:ehcont).

pengfei updated this revision to Diff 327654. pengfei added a comment. Rebased. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D96709/new/ https://reviews.llvm.org/D96709 Files: clang/docs/UsersManual.rst clang/include/clang/Basic/CodeGenOptions

[PATCH] D96709: Add Windows ehcont section support (/guard:ehcont).

pengfei added a comment. Thanks for the review. Comment at: clang/lib/Driver/ToolChains/MSVC.cpp:499 CmdArgs.push_back("-guard:cf-"); +} else if (GuardArgs.equals_lower("ehcont")) { + CmdArgs.push_back("/guard:ehcont"); rnk wrote: > This is gone

[PATCH] D97832: [X86] Refine "Support -march=alderlake"

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. LGTM. But let's wait one day or two to see if others object. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D97832/new/ https://reviews.llvm.org

[PATCH] D97832: [X86] Refine "Support -march=alderlake"

pengfei added inline comments. Comment at: llvm/lib/Target/X86/X86.td:865 +// Alderlake + list ADLAdditionalFeatures = [FeatureSERIALIZE, Extra spaces. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D97832/new

[PATCH] D93594: [X86] Pass to transform amx intrinsics to scalar operation.

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. LGTM with some nitpicks 😊 Comment at: llvm/include/llvm/CodeGen/Passes.h:496 + + /// The pass transform amx intrinsics to scalar operation if the function has + /// optno

[PATCH] D96709: Add Windows ehcont section support (/guard:ehcont).

This revision was automatically updated to reflect the committed changes. Closed by commit rGe7e67c930ae5: Add Windows ehcont section support (/guard:ehcont). (authored by pengfei). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D96709/new/ https://re

[PATCH] D93594: [X86] Pass to transform amx intrinsics to scalar operation.

pengfei added a comment. Thanks all for reporting and reverting this. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D93594/new/ https://reviews.llvm.org/D93594 ___ cfe-commits mailing list cfe-commits@lis

[PATCH] D68854: [X86] add mayRaiseFPException flag and FPCW registers for X87 instructions

This revision was automatically updated to reflect the committed changes. Closed by commit rGaf3a7de20c3f: [X86] add mayRaiseFPException flag and FPCW registers for X87 instructions (authored by pengfei). Herald added a project: clang. Herald added a subscriber: cfe-commits. Repository: rG LLV

[PATCH] D62731: Add support for options -frounding-math, -ftrapping-math, -ffp-model=, and -ffp-exception-behavior=, : Specify floating point behavior

pengfei added a comment. >> It's good that people are looking at achieving better modeling for the x86 >> backend, but we need to have a plan that doesn't require heroic effort just >> to get basic correctness. > > Do you mean in the backend? If so, I don't think that's possible. The > backend

[PATCH] D72820: [FPEnv] Add pragma FP_CONTRACT support under strict FP.

pengfei updated this revision to Diff 238769. pengfei marked 7 inline comments as done. pengfei added a comment. Address review comments. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D72820/new/ https://reviews.llvm.org/D72820 Files: clang/lib/C

[PATCH] D72820: [FPEnv] Add pragma FP_CONTRACT support under strict FP.

pengfei updated this revision to Diff 238770. pengfei added a comment. Remove unnecessary comment. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D72820/new/ https://reviews.llvm.org/D72820 Files: clang/lib/CodeGen/CGExprScalar.cpp clang/test/Co

[PATCH] D72820: [FPEnv] Add pragma FP_CONTRACT support under strict FP.

pengfei marked an inline comment as done. pengfei added inline comments. Comment at: clang/lib/CodeGen/CGExprScalar.cpp:3381 + Addend->getType()), +{MulOp0, MulOp1, Addend, MulOp->getOperand(2), MulOp->getOperand(3)}); + else

[PATCH] D72824: [X86] Add combination for fma and fneg on X86 under strict FP.

pengfei added a comment. In D72824#1835568 , @RKSimon wrote: > Add to isNegatibleForFree/getNegatedExpression as well? We don't need to add them to isNegatibleForFree/getNegatedExpression. We won't negate any FMA results by negative FMA instructions und

[PATCH] D72824: [X86] Add combination for fma and fneg on X86 under strict FP.

pengfei updated this revision to Diff 240472. pengfei added a comment. Rebase and add vector instructions test. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D72824/new/ https://reviews.llvm.org/D72824 Files: llvm/lib/Target/X86/X86ISelLowering.c

[PATCH] D72820: [FPEnv] Add pragma FP_CONTRACT support under strict FP.

pengfei updated this revision to Diff 240474. pengfei added a comment. Address review comment. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D72820/new/ https://reviews.llvm.org/D72820 Files: clang/lib/CodeGen/CGExprScalar.cpp clang/test/CodeGe

[PATCH] D72820: [FPEnv] Add pragma FP_CONTRACT support under strict FP.

pengfei marked an inline comment as done. pengfei added inline comments. Comment at: clang/lib/CodeGen/CGExprScalar.cpp:3381 + "constrained mode"); +FMulAdd = Builder.CreateCall( +CGF.CGM.getIntrinsic(llvm::Intrinsic::experimental_constrained_fmuladd, --

[PATCH] D72824: [X86] Add combination for fma and fneg on X86 under strict FP.

This revision was automatically updated to reflect the committed changes. Closed by commit rG3d1f0ce3b9f8: [X86] Add combination for fma and fneg on X86 under strict FP. (authored by pengfei). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D72824/new/

[PATCH] D72820: [FPEnv] Add pragma FP_CONTRACT support under strict FP.

This revision was automatically updated to reflect the committed changes. Closed by commit rG3239b5034ee9: [FPEnv] Add pragma FP_CONTRACT support under strict FP. (authored by pengfei). Changed prior to commit: https://reviews.llvm.org/D72820?vs=240474&id=240840#toc Repository: rG LLVM Githu

[PATCH] D72820: [FPEnv] Add pragma FP_CONTRACT support under strict FP.

pengfei marked an inline comment as done. pengfei added inline comments. Comment at: llvm/docs/LangRef.rst:16145 +'``llvm.experimental.constrained.fmuladd``' Intrinsic +^^^ + jhenderson wrote: > This underline isn't

[PATCH] D99708: [X86] Enable compilation of user interrupt handlers.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGe8bce8399631: [X86] Enable compilation of user interrupt handlers. (authored by pengfei). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST

[PATCH] D101338: [MS] Fix crash when calling __cpuid with /EHsc and -mavx2

pengfei created this revision. pengfei added reviewers: rnk, craig.topper, hans. pengfei requested review of this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. This is a workaround for PR50133. When we do frame lowering for some complex scenarios, we may use RBX

[PATCH] D101338: [MS] Fix crash when calling __cpuid with /EHsc and -mavx2

pengfei updated this revision to Diff 340718. pengfei added a comment. Update for test. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D101338/new/ https://reviews.llvm.org/D101338 Files: clang/lib/Headers/intrin.h clang/test/CodeGen/ms-intrinsi

[PATCH] D101338: [MS] Fix crash when calling __cpuid with /EHsc and -mavx2

pengfei updated this revision to Diff 340730. pengfei added a comment. Yes, it is a pretty implementation. Thanks Craig. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D101338/new/ https://reviews.llvm.org/D101338 Files: clang/lib/Headers/intrin.h

[PATCH] D101059: [X86][AMX] Add description for AMX new interface.

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D101059/new/ https://reviews.llvm.org/D101059

[PATCH] D101338: [MS] Preserve base register %rbx around cpuid

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGe0c7db7d8ce7: [MS] Preserve base register %rbx around cpuid (authored by pengfei). Changed prior to commit: https://reviews.llvm.org/D101338?vs=34

[PATCH] D101338: [MS] Preserve base register %rbx around cpuid

pengfei added a comment. In D101338#2726759 , @rnk wrote: > Seems reasonable, thanks. > > We really ought to solve the general problem one day. It is kind of > pig-headed that the backend just picks two arbitrary CSRs, the base and frame > pointers, and

[PATCH] D101601: [SelectionDAG] Make fast and linearize visible by clang -pre-RA-sched

pengfei added inline comments. Comment at: clang/test/CodeGen/pre-ra-sched.c:1 +// RUN: %clang %s -mllvm -pre-RA-sched=fast -c -o - | FileCheck %s +// RUN: %clang %s -mllvm -pre-RA-sched=linearize -c -o - | FileCheck %s Should we add test under llvm/test? A bit s

[PATCH] D101601: [SelectionDAG] Make fast and linearize visible by clang -pre-RA-sched

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. I see. LGTM, but let's wait one or more days to see if others object it. Comment at: llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp:275-276 + return createFastDAGS

[PATCH] D98685: [X86][AMX] Rename amx-bf16 intrinsic according to correct naming convention

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D98685/new/ https://reviews.llvm.org/D98685 __

[PATCH] D96110: [X86] Pass to transform tdpbf16ps intrinsics to scalar operation.

pengfei added inline comments. Comment at: llvm/lib/Target/X86/X86LowerAMXIntrinsics.cpp:318-319 +// calculate idxa, idxb, idxc +// %eltc = extractelement <256 x i32> %vec.c.inner.phi, i16 %idxc +// %eltcf32 = bitcast i32 %eltc to float +// %elta = extractelement

[PATCH] D96110: [X86] Pass to transform tdpbf16ps intrinsics to scalar operation.

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D96110/new/ https://reviews.llvm.org/D96110 __

[PATCH] D100368: [X86] Support some missing intrinsics

pengfei added inline comments. Comment at: clang/lib/Headers/avx512fintrin.h:9611 +/// starting at location \a base_addr at packed 32-bit integer indices stored in +/// the lower half of \a vindex scaled by \a scale into dst using writemask +/// \a mask (elements are copied from

[PATCH] D99675: RFC [llvm][clang] Create new intrinsic llvm.arith.fence to control FP optimization at expression level

pengfei added a comment. In D99675#2695424 , @kpn wrote: > What changes are needed for a backend, and what happens if they aren't done? As far as I understand it, backend does optimizations based on patterns of the known nodes and MIs. Inserting a new no

[PATCH] D100368: [X86] Support some missing intrinsics

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D100368/new/ https://reviews.llvm.org/D100368

[PATCH] D93179: [X86] Convert fmin/fmax _mm_reduce_* intrinsics to emit llvm.reduction intrinsics (PR47506)

pengfei added a comment. Hi Simon, I found we have the same problem for fadd/fmul. See https://godbolt.org/z/3YKaGx X86 Intrinsics imply `reassoc` flag, but `llvm.vector.reduce.*` doesn't. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D93179/new/ h

[PATCH] D93179: [X86] Convert fmin/fmax _mm_reduce_* intrinsics to emit llvm.reduction intrinsics (PR47506)

pengfei added a comment. In D93179#2473620 , @RKSimon wrote: > In D93179#2473342 , @pengfei wrote: > >> Hi Simon, I found we have the same problem for fadd/fmul. See >> https://godbolt.org/z/3YKaGx >> X86 Intrinsic

[PATCH] D91927: [X86] Add x86_amx type for intel AMX.

pengfei added inline comments. Comment at: llvm/include/llvm/IR/Type.h:68 X86_MMXTyID, ///< MMX vectors (64 bits, X86 specific) +X86_AMXTyID, ///< AMX vectors (8192 bits, X86 specific) TokenTyID, ///< Tokens uabelho wrote: > This addition ca

[PATCH] D92837: [X86] Support tilezero intrinsic and c interface for AMX.

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D92837/new/ https://reviews.llvm.org/D92837 __

[PATCH] D93597: [X86][SSE] Enable constexpr on some basic SSE intrinsics (RFC)

pengfei added inline comments. Comment at: clang/test/CodeGen/X86/sse-builtins.c:815 +// Test constexpr handling. +#if defined(__cplusplus) && (__cplusplus >= 201103L) +constexpr __m128 test_constexpr_mm_add_ps(__m128 A, __m128 B) { What are these tests testing f

[PATCH] D94268: Allow _mm_empty() (via llvm.x86.mmx.emms) to be a no-op without MMX.

pengfei added a comment. Is inline assembly the only case `emms` instruction will be needed? But inline assembly doesn't enable `mmx` attribute automatically, right? E.g. https://godbolt.org/z/43ases Analyzing asm block and appending the `mmx` attribute if we see `mmx` instructions might be nee

[PATCH] D94268: Allow _mm_empty() (via llvm.x86.mmx.emms) to be a no-op without MMX.

pengfei added a comment. In D94268#2487765 , @jyknight wrote: > In D94268#2485958 , @pengfei wrote: > >> Is inline assembly the only case `emms` instruction will be needed? But >> inline assembly doesn't enable `mm

[PATCH] D94466: [X86] merge "={eax}" and "~{eax}" into "=&eax" for MSInlineASM

pengfei added inline comments. Comment at: clang/lib/CodeGen/CGStmt.cpp:2488 + if (Clobber == "eax") { +std::string::size_type position = Constraints.find("={eax}"); +if (position != std::string::npos) { `={eax}` is set in `X86_32TargetCodeGe

[PATCH] D94466: [X86] merge "={eax}" and "~{eax}" into "=&eax" for MSInlineASM

pengfei added inline comments. Comment at: clang/lib/CodeGen/CGStmt.cpp:2493 +} +std::string::size_type position2 = Constraints.find("=A"); +if (position2 != std::string::npos) { Should consider the `Clobber == "edx"`? Repository: rG L

[PATCH] D94614: [FPEnv][X86] Platform builtins edition: clang should get from the AST the metadata for constrained FP builtins

pengfei added a comment. Hi Kevin, what's the intention of adding constrained FP metadata for target dependent builtins? I believe the middle-end passes always ignore these builtins. What's more, will it imply user these builtins have different behaviors under different FP model? But it's not t

[PATCH] D82862: [ThinLTO] Always parse module level inline asm with At&t dialect

pengfei added a comment. > What is the reason for treating this differently in LLVM? I'm not sure if it is related to this. I think one difference is that LLVM is supporting MS inline assembly. Although it uses Intel dialect, it has different representation in input, output, clobber etc. with G

[PATCH] D94614: [FPEnv][X86] Platform builtins edition: clang should get from the AST the metadata for constrained FP builtins

pengfei added a comment. > This doesn't add metadata to llvm intrinsics that are not constrained. Oh, right. I misunderstood what's doing in these patches and thought we can add metadata to any intrinsics by CGFPOptionsRAII now. :-) > If a relevant #pragma is used then without this change the m

[PATCH] D94614: [FPEnv][X86] Platform builtins edition: clang should get from the AST the metadata for constrained FP builtins

pengfei added inline comments. Comment at: clang/test/CodeGen/X86/avx512dq-builtins-constrained.c:3 +// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512dq -emit-llvm -o - -Wall -Werror | FileCheck %s --check-pre

[PATCH] D94943: [X86][AMX] Fix the typo.

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D94943/new/ https://reviews.llvm.org/D94943 __

[PATCH] D111178: Fix clang postMerge logic based on System V ABI Standard

pengfei added a comment. Testcase? Can this patch fix the problem in D107965 ? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D78/new/ https://reviews.llvm.org/D78 __

[PATCH] D111037: [X86] Check if struct is blank before getting the inner types

pengfei updated this revision to Diff 378082. pengfei marked an inline comment as done. pengfei added a comment. Add more tests. NFC. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D111037/new/ https://reviews.llvm.org/D111037 Files: clang/lib/Cod

[PATCH] D111037: [X86] Check if struct is blank before getting the inner types

pengfei added inline comments. Comment at: clang/test/CodeGen/X86/avx512fp16-abi.c:207 +} pr52011() { + // CHECK-C: define{{.*}} { float, double } @pr52011 +} LuoYuanke wrote: > Why not test CPP as well? CPP doesn't allow unnamed struct defined in the result typ

[PATCH] D111037: [X86] Check if struct is blank before getting the inner types

pengfei updated this revision to Diff 378102. pengfei added a comment. Use named struct to check CPP as well. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D111037/new/ https://reviews.llvm.org/D111037 Files: clang/lib/CodeGen/TargetInfo.cpp cl

[PATCH] D111037: [X86] Check if struct is blank before getting the inner types

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGc0f9c7c01561: [X86] Check if struct is blank before getting the inner types (authored by pengfei). Repository: rG LLVM Github Monorepo CHANGES SI

[PATCH] D111517: [X86] Remove little support we had for MPX

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D111517/new/ https://reviews.llvm.org/D111517

[PATCH] D112143: [X86][ABI] Do not return float/double from x87 registers when x87 is disabled

pengfei created this revision. pengfei added reviewers: aturetsk, echristo, RKSimon, LuoYuanke, craig.topper. Herald added subscribers: dang, hiraditya. pengfei requested review of this revision. Herald added projects: clang, LLVM. Herald added subscribers: llvm-commits, cfe-commits. This is align

[PATCH] D112143: [X86][ABI] Do not return float/double from x87 registers when x87 is disabled

pengfei planned changes to this revision. pengfei added a comment. Found a mistake, working on that. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D112143/new/ https://reviews.llvm.org/D112143 ___ cfe-com

[PATCH] D112143: [X86][ABI] Do not return float/double from x87 registers when x87 is disabled

pengfei updated this revision to Diff 381179. pengfei added a comment. Fix bugs. Ready for review now. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D112143/new/ https://reviews.llvm.org/D112143 Files: clang/include/clang/Driver/Options.td clan

[PATCH] D105265: [X86] AVX512FP16 instructions enabling 3/6

pengfei added a comment. In D105265#2955329 , @vitalybuka wrote: > I suspect this error from this or D105331 > https://lab.llvm.org/buildbot/#/builders/85/builds/6132 Thanks @vitalybuka for the information. I didn't re

[PATCH] D108509: [X86][AMX] Add missing inline attributes in AMX intrinsics. NFCI

pengfei created this revision. pengfei added reviewers: LuoYuanke, yubing, craig.topper. pengfei requested review of this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. This should fix unused warning reported in https://lists.llvm.org/pipermail/llvm-dev/2021-Augu

[PATCH] D105268: [X86] AVX512FP16 instructions enabling 5/6

pengfei updated this revision to Diff 367957. pengfei marked 8 inline comments as done. pengfei added a comment. Address Yuanke's comments. Thanks Yuanke and Craig. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105268/new/ https://reviews.llvm.org/

[PATCH] D105268: [X86] AVX512FP16 instructions enabling 5/6

pengfei added inline comments. Comment at: clang/include/clang/Basic/BuiltinsX86.def:2010 +TARGET_BUILTIN(__builtin_ia32_vfmaddph, "V8xV8xV8xV8x", "ncV:128:", "avx512fp16,avx512vl") +TARGET_BUILTIN(__builtin_ia32_vfmaddph256, "V16xV16xV16xV16x", "ncV:256:", "avx512fp16,avx512vl

[PATCH] D108509: [X86][AMX] Add missing inline attributes in AMX intrinsics. NFCI

pengfei abandoned this revision. pengfei added a comment. Didn't notice Craig fixed it. Thanks Craig. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D108509/new/ https://reviews.llvm.org/D108509 ___ cfe-co

[PATCH] D105268: [X86] AVX512FP16 instructions enabling 5/6

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGc728bd5bbaab: [X86] AVX512FP16 instructions enabling 5/6 (authored by pengfei). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION h

[PATCH] D108609: [clang] NFC: remove superfluous braces

This revision was automatically updated to reflect the committed changes. Closed by commit rG1f8602e16eac: [clang] NFC: remove superfluous braces (authored by zhouyizhou, committed by pengfei). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D108609/new

[PATCH] D105462: [X86] Add CRC32 feature.

pengfei added inline comments. Comment at: clang/lib/Basic/Targets/X86.cpp:159 + // Enable CRC32 if SSE4.2 is enabled. + // NOTE: In conformance with GCC behavior, CRC32 is still available even if + // it's explicitly disabled. hjl.tools wrote: > craig.topper

[PATCH] D105462: [X86] Add CRC32 feature.

pengfei added inline comments. Comment at: llvm/lib/Support/X86TargetParser.cpp:531 constexpr FeatureBitset ImpliedFeaturesSSSE3 = FeatureSSE3; constexpr FeatureBitset ImpliedFeaturesSSE4_1 = FeatureSSSE3; constexpr FeatureBitset ImpliedFeaturesSSE4_2 = FeatureSSE4_1;

[PATCH] D105462: [X86] Add CRC32 feature.

pengfei added inline comments. Comment at: llvm/lib/Support/X86TargetParser.cpp:531 constexpr FeatureBitset ImpliedFeaturesSSSE3 = FeatureSSE3; constexpr FeatureBitset ImpliedFeaturesSSE4_1 = FeatureSSSE3; constexpr FeatureBitset ImpliedFeaturesSSE4_2 = FeatureSSE4_1;

[PATCH] D105462: [X86] Add CRC32 feature.

pengfei accepted this revision. pengfei added a comment. This revision is now accepted and ready to land. Then I'm OK with this change. Comment at: llvm/lib/Support/X86TargetParser.cpp:531 constexpr FeatureBitset ImpliedFeaturesSSSE3 = FeatureSSE3; constexpr FeatureBitset Imp

[PATCH] D105269: [X86] AVX512FP16 instructions enabling 6/6

pengfei added inline comments. Comment at: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp:3902 + case X86::VFCMADDCSHZr: + case X86::VFCMADDCSHZrb: + case X86::VFCMADDCSHZrbk: LuoYuanke wrote: > "b" means rounding. Right? broadcasting Commen

[PATCH] D105269: [X86] AVX512FP16 instructions enabling 6/6

pengfei added inline comments. Comment at: llvm/lib/Target/X86/X86InstrFoldTables.cpp:1852 + { X86::VFCMULCPHZrr, X86::VFCMULCPHZrm, 0 }, + { X86::VFCMULCSHZrr, X86::VFCMULCSHZrm, TB_NO_REVERSE }, { X86::VFMADDPD4Yrr,

[PATCH] D105269: [X86] AVX512FP16 instructions enabling 6/6

pengfei added a comment. Thanks for the review. Comment at: clang/test/CodeGen/X86/avx512fp16-builtins.c:4223 + +// CFC ADD PH + LuoYuanke wrote: > MADD? They are marks used when adding tests. We can remove them now. Repository: rG LLVM Github Monorepo CHA

[PATCH] D105269: [X86] AVX512FP16 instructions enabling 6/6

pengfei added inline comments. Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:47419 + : X86ISD::VFCMADDC; + // FIXME: How we handle when FMF of FADD is different from CFMUL's? + CFmul = DAG.getNode(newOp, SDLoc(N), CVT,

[PATCH] D105269: [X86] AVX512FP16 instructions enabling 6/6

pengfei added inline comments. Comment at: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp:3902 + case X86::VFCMADDCSHZr: + case X86::VFCMADDCSHZrb: + case X86::VFCMADDCSHZrbk: pengfei wrote: > LuoYuanke wrote: > > "b" means rounding. Right? > broadcasting Sorr

[PATCH] D109265: [X86][mingw] Modify the alignment of __m128/__m256/__m512 vector type for mingw

pengfei created this revision. pengfei added reviewers: rnk, mstorsjo, LiuChen3, LuoYuanke. pengfei requested review of this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. This is a follow up patch after D78564 and D108887

[PATCH] D109265: [X86][mingw] Modify the alignment of __m128/__m256/__m512 vector type for mingw

pengfei added a comment. Thanks Martin! Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D109265/new/ https://reviews.llvm.org/D109265 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.ll

[PATCH] D109265: [X86][mingw] Modify the alignment of __m128/__m256/__m512 vector type for mingw

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGe6e8d25920c1: [X86][mingw] Modify the alignment of __m128/__m256/__m512 vector type for mingw (authored by pengfei). Repository: rG LLVM Github Mo

[PATCH] D109487: [X86] Support *_set1_pch(Float16 _Complex h)

pengfei created this revision. pengfei added reviewers: LuoYuanke, FreddyYe, craig.topper, RKSimon. pengfei requested review of this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. Repository: rG LLVM Github Monorepo https://reviews.llvm.org/D109487 Files: cl

[PATCH] D109607: [X86][WIP] Refactor GetSSETypeAtOffset

pengfei created this revision. pengfei requested review of this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. Repository: rG LLVM Github Monorepo https://reviews.llvm.org/D109607 Files: clang/lib/CodeGen/TargetInfo.cpp clang/test/CodeGen/X86/avx512fp16-ab

[PATCH] D109487: [X86] Support *_set1_pch(Float16 _Complex h)

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG2aaa6466fe00: [X86] Support *_set1_pch(Float16 _Complex h) (authored by pengfei). Changed prior to commit: https://reviews.llvm.org/D109487?vs=371

[PATCH] D109658: [X86][FP16] Change the order of the operands in complex FMA intrinsics to allow swap between the mul operands.

pengfei created this revision. pengfei added reviewers: LuoYuanke, craig.topper, RKSimon, yubing. Herald added a subscriber: hiraditya. pengfei requested review of this revision. Herald added projects: clang, LLVM. Herald added subscribers: llvm-commits, cfe-commits. Repository: rG LLVM Github M

[PATCH] D109607: [X86][WIP] Refactor GetSSETypeAtOffset

pengfei updated this revision to Diff 372118. pengfei added a comment. Fix lit fails. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D109607/new/ https://reviews.llvm.org/D109607 Files: clang/lib/CodeGen/TargetInfo.cpp clang/test/CodeGen/X86/avx

[PATCH] D109607: [X86] Refactor GetSSETypeAtOffset to fix pr51813

pengfei updated this revision to Diff 372119. pengfei added a comment. Fix typo. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D109607/new/ https://reviews.llvm.org/D109607 Files: clang/lib/CodeGen/TargetInfo.cpp clang/test/CodeGen/X86/avx512fp

[PATCH] D109607: [X86] Refactor GetSSETypeAtOffset to fix pr51813

pengfei updated this revision to Diff 372120. pengfei added a comment. Change to use `getFPTypeAtOffset`. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D109607/new/ https://reviews.llvm.org/D109607 Files: clang/lib/CodeGen/TargetInfo.cpp clang/

[PATCH] D109607: [X86] Refactor GetSSETypeAtOffset to fix pr51813

pengfei updated this revision to Diff 372122. pengfei added a comment. Fix format. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D109607/new/ https://reviews.llvm.org/D109607 Files: clang/lib/CodeGen/TargetInfo.cpp clang/test/CodeGen/X86/avx512

[PATCH] D109607: [X86] Refactor GetSSETypeAtOffset to fix pr51813

pengfei updated this revision to Diff 372123. pengfei added a comment. Ues `getTypeAllocSize`. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D109607/new/ https://reviews.llvm.org/D109607 Files: clang/lib/CodeGen/TargetInfo.cpp clang/test/CodeGe

[PATCH] D109658: [X86][FP16] Change the order of the operands in complex FMA intrinsics to allow swap between the mul operands.

pengfei added a comment. In D109658#2996412 , @craig.topper wrote: > Does gcc use the same builtin name? Our general policy is to have the same > interface as gcc if we have a builtin. So if gcc has these builtins the > should work the same way. No. W

[PATCH] D109658: [X86][FP16] Change the order of the operands in complex FMA intrinsics to allow swap between the mul operands.

pengfei added a comment. In D109658#2996767 , @craig.topper wrote: > In D109658#2996714 , @pengfei wrote: > >> In D109658#2996412 , @craig.topper >> wrote: >> >>> Does g

[PATCH] D109607: [X86] Refactor GetSSETypeAtOffset to fix pr51813

pengfei updated this revision to Diff 372254. pengfei marked an inline comment as done. pengfei added a comment. Add more comments. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D109607/new/ https://reviews.llvm.org/D109607 Files: clang/lib/CodeG

[PATCH] D109607: [X86] Refactor GetSSETypeAtOffset to fix pr51813

pengfei added inline comments. Comment at: clang/lib/CodeGen/TargetInfo.cpp:3454 - -return llvm::Type::getHalfTy(getVMContext()); - } LuoYuanke wrote: > Is this the major change? No, this logic is not changed. When `T1` is nullptr, it means `IRType` is simp

[PATCH] D109658: [X86][FP16] Change the order of the operands in complex FMA intrinsics to allow swap between the mul operands.

pengfei updated this revision to Diff 372400. pengfei added a comment. Allow MI operands of complex FMA to be commutable. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D109658/new/ https://reviews.llvm.org/D109658 Files: clang/lib/Headers/avx512f

[PATCH] D109658: [X86][FP16] Change the order of the operands in complex FMA intrinsics to allow swap between the mul operands.

pengfei added a comment. > Do we have any builtins with the same name as gcc but different > operands/behaviours? Those are the only ones that I'd be worried about. I think it's rare in existing intrinsics. 1) The builtins are always straightforward passed the arguments in intrinsics in the sam

[PATCH] D109658: [X86][FP16] Change the order of the operands in complex FMA intrinsics to allow swap between the mul operands.

pengfei added a comment. Forgot to say thanks @craig.topper and @RKSimon for the information. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D109658/new/ https://reviews.llvm.org/D109658 ___ cfe-commits ma

[PATCH] D109607: [X86] Refactor GetSSETypeAtOffset to fix pr51813

pengfei updated this revision to Diff 372664. pengfei marked 2 inline comments as done. pengfei added a comment. Address Yuanke's comments. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D109607/new/ https://reviews.llvm.org/D109607 Files: clang/l

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