[clang] [NFC][Clang] Fix potential deref of end iterator (PR #70193)

@@ -65,7 +65,7 @@ class CXXFieldCollector { /// getCurFields - Pointer to array of fields added to the currently parsed /// class. - FieldDecl **getCurFields() { return &*(Fields.end() - getCurNumFields()); } Keenuts wrote: Thanks for the review and link

[clang] [NFC][Clang] Fix potential deref of end iterator (PR #70193)

https://github.com/Keenuts edited https://github.com/llvm/llvm-project/pull/70193 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [NFC][Clang] Fix potential deref of end iterator (PR #70193)

https://github.com/Keenuts closed https://github.com/llvm/llvm-project/pull/70193 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[llvm] [clang] [HLSL][SPIR-V] Add Vulkan to target triple (PR #76749)

https://github.com/Keenuts edited https://github.com/llvm/llvm-project/pull/76749 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[llvm] [clang] [HLSL][SPIR-V] Add Vulkan to target triple (PR #76749)

@@ -1328,6 +1331,31 @@ VersionTuple Triple::getDriverKitVersion() const { } } +VersionTuple Triple::getVulkanVersion() const { + if (getArch() != spirv || getOS() != Vulkan) +llvm_unreachable("invalid Vulkan SPIR-V triple"); + + VersionTuple VulkanVersion = getOSVersio

[clang] [llvm] [HLSL][SPIR-V] Add Vulkan to target triple (PR #76749)

@@ -4236,20 +4236,35 @@ bool CompilerInvocation::ParseLangArgs(LangOptions &Opts, ArgList &Args, // TODO: Revisit restricting SPIR-V to logical once we've figured out how to // handle PhysicalStorageBuffer64 memory model if (T.isDXIL() || T.isSPIRVLogical()) { -

[clang] [llvm] [HLSL][SPIR-V] Add Vulkan to target triple (PR #76749)

@@ -3,29 +3,39 @@ // Supported targets // // RUN: %clang -target dxil-unknown-shadermodel6.2-compute %s -S -o /dev/null 2>&1 | FileCheck --allow-empty --check-prefix=CHECK-VALID %s -// RUN: %clang -target spirv-unknown-shadermodel6.2-compute %s -S -o /dev/null 2>&1 | FileChec

[llvm] [clang] [HLSL][SPIR-V] Add Vulkan to target triple (PR #76749)

https://github.com/Keenuts commented: LGTM for the logic, and choices. Just some small nits https://github.com/llvm/llvm-project/pull/76749 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-comm

[clang] [llvm] [HLSL][SPIR-V] Add Vulkan to target triple (PR #76749)

https://github.com/Keenuts approved this pull request. https://github.com/llvm/llvm-project/pull/76749 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [clang][HLSL][SPRI-V] Add convergence intrinsics (PR #80680)

https://github.com/Keenuts updated https://github.com/llvm/llvm-project/pull/80680 From 818ccfd0258602fdd0630823bb2b8af0507749d5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Nathan=20Gau=C3=ABr?= Date: Fri, 2 Feb 2024 16:38:46 +0100 Subject: [PATCH 1/6] [clang][HLSL][SPRI-V] Add convergence intrins

[clang] [llvm] [clang][HLSL][SPRI-V] Add convergence intrinsics (PR #80680)

@@ -1295,11 +1295,13 @@ double4 trunc(double4); /// true, across all active lanes in the current wave. _HLSL_AVAILABILITY(shadermodel, 6.0) _HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_count_bits) +__attribute__((convergent)) Keenuts wrote: @llvm-beanz FYI.

[clang] [llvm] [clang][HLSL][SPRI-V] Add convergence intrinsics (PR #80680)

https://github.com/Keenuts updated https://github.com/llvm/llvm-project/pull/80680 From 818ccfd0258602fdd0630823bb2b8af0507749d5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Nathan=20Gau=C3=ABr?= Date: Fri, 2 Feb 2024 16:38:46 +0100 Subject: [PATCH 1/7] [clang][HLSL][SPRI-V] Add convergence intrins

[clang] [llvm] [clang][HLSL][SPRI-V] Add convergence intrinsics (PR #80680)

@@ -1295,11 +1295,13 @@ double4 trunc(double4); /// true, across all active lanes in the current wave. _HLSL_AVAILABILITY(shadermodel, 6.0) _HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_count_bits) +__attribute__((convergent)) Keenuts wrote: Right, so in that

[clang] [llvm] [clang][HLSL][SPRI-V] Add convergence intrinsics (PR #80680)

https://github.com/Keenuts updated https://github.com/llvm/llvm-project/pull/80680 From afbe709931942b3970f92884022e250c1e7eb84f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Nathan=20Gau=C3=ABr?= Date: Fri, 2 Feb 2024 16:38:46 +0100 Subject: [PATCH 1/8] [clang][HLSL][SPRI-V] Add convergence intrins

[clang] [llvm] [clang][HLSL][SPRI-V] Add convergence intrinsics (PR #80680)

Keenuts wrote: Rebases on main (almost, HEAD is slightly broken), and added back the convergence attribute. The backend changes are ready for this intrinsic. https://github.com/llvm/llvm-project/pull/80680 ___ cfe-commits mailing list cfe-commits@list

[clang] [llvm] [clang][HLSL][SPRI-V] Add convergence intrinsics (PR #80680)

Keenuts wrote: @arsenm would you be fine with those codegen changes as-is? Given that the convergent/no-convergent switch will be done later, depending on when the required IR change is merged? https://github.com/llvm/llvm-project/pull/80680 ___ cfe-

[clang] [llvm] [clang][HLSL][SPRI-V] Add convergence intrinsics (PR #80680)

Keenuts wrote: @ssahasra it is up to you then 😊 https://github.com/llvm/llvm-project/pull/80680 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [clang][HLSL][SPRI-V] Add convergence intrinsics (PR #80680)

https://github.com/Keenuts edited https://github.com/llvm/llvm-project/pull/80680 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [clang][HLSL][SPRI-V] Add convergence intrinsics (PR #80680)

https://github.com/Keenuts updated https://github.com/llvm/llvm-project/pull/80680 From afbe709931942b3970f92884022e250c1e7eb84f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Nathan=20Gau=C3=ABr?= Date: Fri, 2 Feb 2024 16:38:46 +0100 Subject: [PATCH 1/9] [clang][HLSL][SPRI-V] Add convergence intrins

[clang] [llvm] [clang][HLSL][SPRI-V] Add convergence intrinsics (PR #80680)

@@ -1130,8 +1130,92 @@ struct BitTest { static BitTest decodeBitTestBuiltin(unsigned BuiltinID); }; + +// Returns the first convergence entry/loop/anchor instruction found in |BB|. +// std::nullptr otherwise. +llvm::IntrinsicInst *getConvergenceToken(llvm::BasicBlock *BB) {

[clang] [llvm] [clang][HLSL][SPRI-V] Add convergence intrinsics (PR #80680)

Keenuts wrote: Thanks all the the reviews! We have 3 LGTMs and an ack from Arsenm, so I'm going to rebase on main, wait for the bots & tests, and if all is green, merge this. https://github.com/llvm/llvm-project/pull/80680 ___ cfe-commits mailing lis

[clang] [llvm] [clang][HLSL][SPRI-V] Add convergence intrinsics (PR #80680)

https://github.com/Keenuts updated https://github.com/llvm/llvm-project/pull/80680 From dc008167980ca0a479d2cdceeeb1ab6cd4983ec3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Nathan=20Gau=C3=ABr?= Date: Fri, 2 Feb 2024 16:38:46 +0100 Subject: [PATCH 1/9] [clang][HLSL][SPRI-V] Add convergence intrins

[clang] [llvm] [clang][HLSL][SPRI-V] Add convergence intrinsics (PR #80680)

Keenuts wrote: Local tests for SPIR-V & DXIL pass https://github.com/llvm/llvm-project/pull/80680 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [clang][HLSL][SPRI-V] Add convergence intrinsics (PR #80680)

https://github.com/Keenuts closed https://github.com/llvm/llvm-project/pull/80680 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [HLSL][clang] Move hlsl_wave_get_lane_index to EmitHLSLBuiltinExpr (PR #87131)

Keenuts wrote: Hi! Thanks @farzonl and @marcauberer for making sure SPIR-V backend didn't break, really appreciate it! 😊 https://github.com/llvm/llvm-project/pull/87131 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi

[clang] [llvm] [HLSL][DXIL][SPIRV] Implementation of an abstraction for intrinsic selection of HLSL backends (PR #87171)

@@ -0,0 +1,44 @@ + +//===- CGHLSLUtils.h - Utility functions for HLSL CodeGen ---*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: A

[clang] [llvm] [HLSL][DXIL][SPIRV] Implementation of an abstraction for intrinsic selection of HLSL backends (PR #87171)

@@ -0,0 +1,95 @@ +; RUN: llc -O0 -mtriple=spirv-unknown-unknown %s -o - | FileCheck %s +; Note: The validator is wrong it wants the return to be a bool vector when it is bool scalar return Keenuts wrote: AFAIK the validator is not wrong, it complains for 2 reaso

[clang] [llvm] [HLSL][DXIL][SPIRV] Implementation of an abstraction for intrinsic selection of HLSL backends (PR #87171)

@@ -100,6 +100,118 @@ double3 abs(double3); _HLSL_BUILTIN_ALIAS(__builtin_elementwise_abs) double4 abs(double4); +//===--===// +// all builtins +//===---

[clang] [llvm] [HLSL][DXIL][SPIRV] Implementation of an abstraction for intrinsic selection of HLSL backends (PR #87171)

@@ -0,0 +1,44 @@ + +//===- CGHLSLUtils.h - Utility functions for HLSL CodeGen ---*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: A

[clang] [llvm] [HLSL][DXIL][SPIRV] Implementation of an abstraction for intrinsic selection of HLSL backends (PR #87171)

@@ -0,0 +1,44 @@ + +//===- CGHLSLUtils.h - Utility functions for HLSL CodeGen ---*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: A

[clang] [llvm] [HLSL][DXIL][SPIRV] Implementation of an abstraction for intrinsic selection of HLSL backends (PR #87171)

https://github.com/Keenuts edited https://github.com/llvm/llvm-project/pull/87171 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [HLSL][DXIL][SPIRV] Implementation of an abstraction for intrinsic selection of HLSL backends (PR #87171)

https://github.com/Keenuts edited https://github.com/llvm/llvm-project/pull/87171 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [HLSL][SPIR-V] Add create.handle intrinsic (PR #81038)

https://github.com/Keenuts approved this pull request. https://github.com/llvm/llvm-project/pull/81038 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [clang][HLSL][SPRI-V] Add convergence intrinsics (PR #80680)

https://github.com/Keenuts updated https://github.com/llvm/llvm-project/pull/80680 From 818ccfd0258602fdd0630823bb2b8af0507749d5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Nathan=20Gau=C3=ABr?= Date: Fri, 2 Feb 2024 16:38:46 +0100 Subject: [PATCH 1/3] [clang][HLSL][SPRI-V] Add convergence intrins

[clang] [llvm] [clang][HLSL][SPRI-V] Add convergence intrinsics (PR #80680)

https://github.com/Keenuts ready_for_review https://github.com/llvm/llvm-project/pull/80680 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [clang][HLSL][SPRI-V] Add convergence intrinsics (PR #80680)

Keenuts wrote: Hi, thanks for the reviews so far! I believe we are ready to move forward on our side. Adding @llvm-beanz for the HLSL part. The builtin I added is mostly to get something we can generate those intrinsics for. I am fine changing the name, or the implementation around it, it's jus

[clang] [llvm] [clang][HLSL][SPRI-V] Add convergence intrinsics (PR #80680)

@@ -1130,8 +1130,96 @@ struct BitTest { static BitTest decodeBitTestBuiltin(unsigned BuiltinID); }; + +// Returns the first convergence entry/loop/anchor instruction found in |BB|. +// std::nullopt otherwise. +std::optional getConvergenceToken(llvm::BasicBlock *BB) { --

[clang] [llvm] [clang][HLSL][SPRI-V] Add convergence intrinsics (PR #80680)

@@ -1130,8 +1130,96 @@ struct BitTest { static BitTest decodeBitTestBuiltin(unsigned BuiltinID); }; + +// Returns the first convergence entry/loop/anchor instruction found in |BB|. +// std::nullopt otherwise. +std::optional getConvergenceToken(llvm::BasicBlock *BB) { + for

[clang] [llvm] [clang][HLSL][SPRI-V] Add convergence intrinsics (PR #80680)

@@ -1130,8 +1130,96 @@ struct BitTest { static BitTest decodeBitTestBuiltin(unsigned BuiltinID); }; + +// Returns the first convergence entry/loop/anchor instruction found in |BB|. +// std::nullopt otherwise. +std::optional getConvergenceToken(llvm::BasicBlock *BB) { + for

[clang] [llvm] [clang][HLSL][SPRI-V] Add convergence intrinsics (PR #80680)

@@ -1130,8 +1130,96 @@ struct BitTest { static BitTest decodeBitTestBuiltin(unsigned BuiltinID); }; + +// Returns the first convergence entry/loop/anchor instruction found in |BB|. +// std::nullopt otherwise. +std::optional getConvergenceToken(llvm::BasicBlock *BB) { + for

[clang] [llvm] [clang][HLSL][SPRI-V] Add convergence intrinsics (PR #80680)

@@ -1130,8 +1130,96 @@ struct BitTest { static BitTest decodeBitTestBuiltin(unsigned BuiltinID); }; + +// Returns the first convergence entry/loop/anchor instruction found in |BB|. +// std::nullopt otherwise. +std::optional getConvergenceToken(llvm::BasicBlock *BB) { + for

[clang] [llvm] [clang][HLSL][SPRI-V] Add convergence intrinsics (PR #80680)

@@ -5686,6 +5686,10 @@ RValue CodeGenFunction::EmitCall(const CGFunctionInfo &CallInfo, if (!CI->getType()->isVoidTy()) CI->setName("call"); + if (getTarget().getTriple().isSPIRVLogical() && + CI->getCalledFunction()->isConvergent()) Keenuts wrote

[clang] [llvm] [clang][HLSL][SPRI-V] Add convergence intrinsics (PR #80680)

https://github.com/Keenuts updated https://github.com/llvm/llvm-project/pull/80680 From 818ccfd0258602fdd0630823bb2b8af0507749d5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Nathan=20Gau=C3=ABr?= Date: Fri, 2 Feb 2024 16:38:46 +0100 Subject: [PATCH 1/4] [clang][HLSL][SPRI-V] Add convergence intrins

[clang] [llvm] [clang][HLSL][SPRI-V] Add convergence intrinsics (PR #80680)

@@ -4554,6 +4554,13 @@ def HLSLWaveActiveCountBits : LangBuiltin<"HLSL_LANG"> { let Prototype = "unsigned int(bool)"; } +// HLSL +def HLSLWaveGetLaneIndex : LangBuiltin<"HLSL_LANG"> { + let Spellings = ["__builtin_hlsl_wave_get_lane_index"]; + let Attributes = [NoThrow, Co

[clang] [llvm] [clang][HLSL][SPRI-V] Add convergence intrinsics (PR #80680)

https://github.com/Keenuts updated https://github.com/llvm/llvm-project/pull/80680 From 818ccfd0258602fdd0630823bb2b8af0507749d5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Nathan=20Gau=C3=ABr?= Date: Fri, 2 Feb 2024 16:38:46 +0100 Subject: [PATCH 1/5] [clang][HLSL][SPRI-V] Add convergence intrins

[clang] [llvm] [clang][HLSL][SPRI-V] Add convergence intrinsics (PR #80680)

@@ -1297,5 +1297,10 @@ _HLSL_AVAILABILITY(shadermodel, 6.0) _HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_count_bits) uint WaveActiveCountBits(bool Val); +/// \brief Returns the index of the current lane within the current wave. +_HLSL_AVAILABILITY(shadermodel, 6.0) +_HLSL_BU

[clang] [llvm] [clang][HLSL][SPRI-V] Add convergence intrinsics (PR #80680)

@@ -1130,8 +1130,96 @@ struct BitTest { static BitTest decodeBitTestBuiltin(unsigned BuiltinID); }; + +// Returns the first convergence entry/loop/anchor instruction found in |BB|. +// std::nullopt otherwise. +std::optional getConvergenceToken(llvm::BasicBlock *BB) { + for

[llvm] [clang] [clang][HLSL][SPRI-V] Add convergence intrinsics (PR #80680)

https://github.com/Keenuts created https://github.com/llvm/llvm-project/pull/80680 HLSL has wave operations and other kind of function which required the control flow to either be converged, or respect certain constraints as where and how to re-converge. At the HLSL level, the convergence are

[clang] [HLSL][SPIR-V] Add support -fspv-target-env opt (PR #78611)

https://github.com/Keenuts approved this pull request. https://github.com/llvm/llvm-project/pull/78611 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [NFC][Clang] Fix potential deref of end iterator (PR #70193)

https://github.com/Keenuts created https://github.com/llvm/llvm-project/pull/70193 This was found by doing bound-checking on SmallVector iterator usage. When the count is 0, the end iterator is dereferenced to get its address. This doesn't seem to be an issue in practice as most of the time, a

[clang] [NFC][Clang] Fix potential deref of end iterator (PR #70193)

Keenuts wrote: CI seems OK, except clang format which complains about an unrelated line. Marking as ready. https://github.com/llvm/llvm-project/pull/70193 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/l

[clang] [NFC][Clang] Fix potential deref of end iterator (PR #70193)

https://github.com/Keenuts ready_for_review https://github.com/llvm/llvm-project/pull/70193 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [NFC][Clang] Fix potential deref of end iterator (PR #70193)

https://github.com/Keenuts edited https://github.com/llvm/llvm-project/pull/70193 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [HLSL][SPIR-V] Fix clang driver lang target test (PR #70330)

https://github.com/Keenuts edited https://github.com/llvm/llvm-project/pull/70330 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [HLSL][SPIR-V] Fix clang driver lang target test (PR #70330)

@@ -2,8 +2,8 @@ // Supported targets // -// RUN: %clang -target dxil-unknown-shadermodel6.2-pixel %s -S -o /dev/null 2>&1 | FileCheck --check-prefix=CHECK-VALID %s -// RUN: %clang -target spirv-unknown-shadermodel6.2-library %s -S -o /dev/null 2>&1 | FileCheck --check-prefix

[clang] [HLSL][SPIR-V] Fix clang driver lang target test (PR #70330)

https://github.com/Keenuts commented: One question, otherwise LGTM, thanks for this! https://github.com/llvm/llvm-project/pull/70330 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [HLSL][SPIR-V] Fix clang driver lang target test (PR #70330)

@@ -2,8 +2,8 @@ // Supported targets // -// RUN: %clang -target dxil-unknown-shadermodel6.2-pixel %s -S -o /dev/null 2>&1 | FileCheck --check-prefix=CHECK-VALID %s -// RUN: %clang -target spirv-unknown-shadermodel6.2-library %s -S -o /dev/null 2>&1 | FileCheck --check-prefix

[clang] [HLSL][SPIR-V] Fix clang driver lang target test (PR #70330)

https://github.com/Keenuts approved this pull request. https://github.com/llvm/llvm-project/pull/70330 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [SPIRV] Add -spirv option to DXC driver (PR #65989)

@@ -2,8 +2,8 @@ // Supported targets // -// RUN: %clang -target dxil-unknown-shadermodel6.2-pixel %s -S -o /dev/null 2>&1 | FileCheck --check-prefix=CHECK-VALID %s -// RUN: %clang -target spirv-unknown-shadermodel6.2-library %s -S -o /dev/null 2>&1 | FileCheck --check-prefix

[clang] 53b6a16 - [SPIR-V] Add SPIR-V logical triple.

Author: Nathan Gauër Date: 2023-09-11T10:15:24+02:00 New Revision: 53b6a169e453a2a91d3713ca16fa089853c670a8 URL: https://github.com/llvm/llvm-project/commit/53b6a169e453a2a91d3713ca16fa089853c670a8 DIFF: https://github.com/llvm/llvm-project/commit/53b6a169e453a2a91d3713ca16fa089853c670a8.diff

[clang] [SPIRV] Add -spirv option to DXC driver (PR #65989)

https://github.com/Keenuts review_requested https://github.com/llvm/llvm-project/pull/65989 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [clang][HLSL][SPRI-V] Add convergence intrinsics (PR #80680)

@@ -1129,8 +1129,97 @@ struct BitTest { static BitTest decodeBitTestBuiltin(unsigned BuiltinID); }; + +// Returns the first convergence entry/loop/anchor instruction found in |BB|. +// std::nullopt otherwise. +std::optional getConvergenceToken(llvm::BasicBlock *BB) { + for

[clang] [llvm] [clang][HLSL][SPRI-V] Add convergence intrinsics (PR #80680)

https://github.com/Keenuts updated https://github.com/llvm/llvm-project/pull/80680 From f43134787dc5b1120e3722e03028d0071de22331 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Nathan=20Gau=C3=ABr?= Date: Fri, 2 Feb 2024 16:38:46 +0100 Subject: [PATCH 1/2] [clang][HLSL][SPRI-V] Add convergence intrins

[clang] [llvm] [clang][HLSL][SPRI-V] Add convergence intrinsics (PR #80680)

https://github.com/Keenuts updated https://github.com/llvm/llvm-project/pull/80680 From f43134787dc5b1120e3722e03028d0071de22331 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Nathan=20Gau=C3=ABr?= Date: Fri, 2 Feb 2024 16:38:46 +0100 Subject: [PATCH 1/2] [clang][HLSL][SPRI-V] Add convergence intrins

[clang] [llvm] [SPIRV][HLSL] Add lowering of frac to SPIR-V (PR #97111)

https://github.com/Keenuts approved this pull request. LGTM on the SPIR-V side, leaving MS look at the HLSL side https://github.com/llvm/llvm-project/pull/97111 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mail

[clang] [llvm] [clang][HLSL] Add WaveIsFirstLane() intrinsic (PR #103299)

Keenuts wrote: Merging to unblock the structurizer work. Let me know if you had a specific SEMA check in mind to add in the end! https://github.com/llvm/llvm-project/pull/103299 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm

[clang] [llvm] [clang][HLSL] Add WaveIsFirstLane() intrinsic (PR #103299)

https://github.com/Keenuts closed https://github.com/llvm/llvm-project/pull/103299 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)

@@ -0,0 +1,1410 @@ +//===-- SPIRVStructurizer.cpp --*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH

[clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)

@@ -0,0 +1,1410 @@ +//===-- SPIRVStructurizer.cpp --*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH

[clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)

@@ -0,0 +1,1410 @@ +//===-- SPIRVStructurizer.cpp --*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH

[clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)

@@ -0,0 +1,1410 @@ +//===-- SPIRVStructurizer.cpp --*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH

[clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)

@@ -0,0 +1,1410 @@ +//===-- SPIRVStructurizer.cpp --*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH

[clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)

@@ -0,0 +1,1410 @@ +//===-- SPIRVStructurizer.cpp --*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH

[clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)

https://github.com/Keenuts edited https://github.com/llvm/llvm-project/pull/107408 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)

https://github.com/Keenuts deleted https://github.com/llvm/llvm-project/pull/107408 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)

@@ -0,0 +1,1410 @@ +//===-- SPIRVStructurizer.cpp --*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH

[clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)

@@ -0,0 +1,1410 @@ +//===-- SPIRVStructurizer.cpp --*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH

[clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)

@@ -744,79 +744,139 @@ static void insertSpirvDecorations(MachineFunction &MF, MachineIRBuilder MIB) { MI->eraseFromParent(); } -// Find basic blocks of the switch and replace registers in spv_switch() by its -// MBB equivalent. -static void processSwitches(MachineFunctio

[clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)

@@ -744,79 +744,139 @@ static void insertSpirvDecorations(MachineFunction &MF, MachineIRBuilder MIB) { MI->eraseFromParent(); } -// Find basic blocks of the switch and replace registers in spv_switch() by its -// MBB equivalent. -static void processSwitches(MachineFunctio

[clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)

@@ -0,0 +1,1410 @@ +//===-- SPIRVStructurizer.cpp --*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH

[clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)

@@ -0,0 +1,1410 @@ +//===-- SPIRVStructurizer.cpp --*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH

[clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)

@@ -0,0 +1,1410 @@ +//===-- SPIRVStructurizer.cpp --*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH

[clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)

@@ -0,0 +1,1410 @@ +//===-- SPIRVStructurizer.cpp --*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH

[clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)

Keenuts wrote: Given the ongoing discussion around spirv-sim, I updated all the hlsl tests to be llvm-ir -> SPIR-V tests. All tests now use both FileCheck and spirv-sim. https://github.com/llvm/llvm-project/pull/107408 ___ cfe-commits mailing list cf

[clang] [llvm] [SPIR-V] Add SPIR-V structurizer (PR #107408)

@@ -744,79 +744,139 @@ static void insertSpirvDecorations(MachineFunction &MF, MachineIRBuilder MIB) { MI->eraseFromParent(); } -// Find basic blocks of the switch and replace registers in spv_switch() by its -// MBB equivalent. -static void processSwitches(MachineFunctio

[clang] [llvm] [clang][HLSL] Add WaveIsFirstLane() intrinsic (PR #103299)

https://github.com/Keenuts created https://github.com/llvm/llvm-project/pull/103299 This commits add the WaveIsFirstLane() hlsl intrinsinc. This intrinsic uses the convergence intrinsincs for the SPIR-V backend. On the DXIL side, I'm not sure what the strategy is. (DXC didn't used convergence

[clang] [llvm] [clang][HLSL] Add WaveIsFirstLane() intrinsic (PR #103299)

Keenuts wrote: > We have this work tracked here: #99158 > > there should be some dxil specific tasks. Seems like most boxes are checked, except Sema checks: - what kind of Sema checks would be required for this one? Also, the intrinsic name in the issue is using camel case vs snake case for t

[clang] [llvm] [clang][HLSL] Add WaveIsFirstLane() intrinsic (PR #103299)

Keenuts wrote: > > We have this work tracked here: #99158 > > there should be some dxil specific tasks. > > Seems like most boxes would be checked by this PR, except Sema checks: > > * what kind of Sema checks would be required for this one? > Also, the intrinsic name in the issue is using ca

[clang] [llvm] [clang][HLSL] Add WaveIsFirstLane() intrinsic (PR #103299)

Keenuts wrote: > This commits add the WaveIsFirstLane() hlsl intrinsinc. This intrinsic uses > the convergence intrinsincs for the SPIR-V backend. On the DXIL side, I'm not > sure what the strategy is so this is implemented like in DXC: a simple > builtin function. (DXC didn't used convergence

[clang] [llvm] [clang][HLSL] Add WaveIsFirstLane() intrinsic (PR #103299)

https://github.com/Keenuts edited https://github.com/llvm/llvm-project/pull/103299 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [SPIRV][HLSL] Add lowering of `rsqrt` to SPIRV (PR #95849)

https://github.com/Keenuts approved this pull request. Thanks! https://github.com/llvm/llvm-project/pull/95849 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang][CodeGen] Add AS for Globals to SPIR & SPIRV datalayouts (PR #88455)

https://github.com/Keenuts approved this pull request. https://github.com/llvm/llvm-project/pull/88455 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [HLSL][SPIRV] Add any intrinsic lowering (PR #88325)

https://github.com/Keenuts approved this pull request. https://github.com/llvm/llvm-project/pull/88325 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang][SPIR-V] Always add convervence intrinsics (PR #88918)

https://github.com/Keenuts created https://github.com/llvm/llvm-project/pull/88918 PR #80680 added bits in the codegen to lazily add convergence intrinsics when required. This logic relied on the LoopStack. The issue is when parsing the condition, the loopstack doesn't yet reflect the correct

[clang] [clang][SPIR-V] Always add convervence intrinsics (PR #88918)

@@ -4987,7 +4990,11 @@ class CodeGenFunction : public CodeGenTypeCache { const llvm::Twine &Name = ""); // Adds a convergence_ctrl token to |Input| and emits the required parent // convergence instructions. - llvm::CallBase *addControll

[clang] [clang][SPIR-V] Always add convervence intrinsics (PR #88918)

https://github.com/Keenuts updated https://github.com/llvm/llvm-project/pull/88918 From 94d76dcdfac88d1d50fe705406c0280c33766e15 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Nathan=20Gau=C3=ABr?= Date: Mon, 15 Apr 2024 17:05:40 +0200 Subject: [PATCH 1/2] [clang][SPIR-V] Always add convervence intri

[clang] [clang][SPIR-V] Set AS for the SPIR-V logical triple (PR #88939)

Keenuts wrote: Thanks all! Agree with Bogner, let's unblock the tests first. As for the address space for globals, this isn't something we have looked into yet, so I'd be in favor of keeping the same behavior as the SPIRN flavor until we have a reason to diverge (as in "thought about this issue

[clang] [clang][SPIR-V] Always add convervence intrinsics (PR #88918)

@@ -1109,6 +1124,10 @@ void CodeGenFunction::EmitForStmt(const ForStmt &S, llvm::BasicBlock *CondBlock = CondDest.getBlock(); EmitBlock(CondBlock); + if (getTarget().getTriple().isSPIRVLogical()) Keenuts wrote: Right, something at the module level, which

[clang] [clang][SPIR-V] Always add convervence intrinsics (PR #88918)

https://github.com/Keenuts updated https://github.com/llvm/llvm-project/pull/88918 From 94d76dcdfac88d1d50fe705406c0280c33766e15 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Nathan=20Gau=C3=ABr?= Date: Mon, 15 Apr 2024 17:05:40 +0200 Subject: [PATCH 1/3] [clang][SPIR-V] Always add convervence intri

[clang] [clang][SPIR-V] Always add convervence intrinsics (PR #88918)

@@ -1109,6 +1124,10 @@ void CodeGenFunction::EmitForStmt(const ForStmt &S, llvm::BasicBlock *CondBlock = CondDest.getBlock(); EmitBlock(CondBlock); + if (getTarget().getTriple().isSPIRVLogical()) Keenuts wrote: Changed those for a module-level function w

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