[clang] [llvm] [AMDGPU] modify named barrier builtins and intrinsics (PR #114550)

arsenm wrote: > It's the same code already reviewed downstream. LGTM. The commit message is still not helpful https://github.com/llvm/llvm-project/pull/114550 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mail

[libclc] [libclc] Move relational functions to the CLC library (PR #115171)

https://github.com/arsenm approved this pull request. https://github.com/llvm/llvm-project/pull/115171 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [AMDGPU] Introduce a new generic target `gfx9-4-generic` (PR #115190)

@@ -156,6 +157,8 @@ StringRef llvm::AMDGPU::getArchFamilyNameAMDGCN(GPUKind AK) { switch (AK) { case AMDGPU::GK_GFX9_GENERIC: return "gfx9"; + case AMDGPU::GK_GFX9_4_GENERIC: +return "gfx9"; arsenm wrote: What is this used for? I'm not sure how t

[clang] [AMDGPU] Make `__GCC_DESTRUCTIVE_SIZE` 128 on AMDGPU (PR #115241)

@@ -462,6 +462,10 @@ class LLVM_LIBRARY_VISIBILITY AMDGPUTargetInfo final : public TargetInfo { } bool hasHIPImageSupport() const override { return HasImage; } + + std::pair hardwareInterferenceSizes() const override { +return std::make_pair(128, 128); --

[clang] clang/AMDGPU: Restore O3 checks in default-attributes.hip (PR #115238)

https://github.com/arsenm closed https://github.com/llvm/llvm-project/pull/115238 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: Add support for load transpose instructions for gfx950 (PR #117378)

https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/117378 >From 0faa36e6240f21d77d94e981712f4b57bc4b5d11 Mon Sep 17 00:00:00 2001 From: Sirish Pande Date: Wed, 7 Feb 2024 10:12:03 -0600 Subject: [PATCH] AMDGPU: Add support for load transpose instructions for gfx950 Th

[clang] [llvm] AMDGPU: Add support for load transpose instructions for gfx950 (PR #117378)

https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/117378 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: Add support for load transpose instructions for gfx950 (PR #117378)

https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/117378 >From 403db2f7d09c9ff1c358b8eff83407a84c6fc965 Mon Sep 17 00:00:00 2001 From: Sirish Pande Date: Wed, 7 Feb 2024 10:12:03 -0600 Subject: [PATCH] AMDGPU: Add support for load transpose instructions for gfx950 Th

[clang] [llvm] AMDGPU: Add support for load transpose instructions for gfx950 (PR #117378)

https://github.com/arsenm closed https://github.com/llvm/llvm-project/pull/117378 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: Add MC support for gfx950 V_BITOP3_B32/B16 (PR #117379)

https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/117379 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: MC support for v_cvt_scale_[f16|f32]_bf8 of gfx950. (PR #117381)

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[clang] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk_{fp8|bf8}_f32 of gfx950. (PR #117382)

https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/117382 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: MC support for v_cvt_scale_[f16|f32]_fp8 of gfx950. (PR #117380)

https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/117380 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk_f32_[fp|bf]8 of gfx950. (PR #117383)

https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/117383 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: MC support for v_cvt_scale_fp4<->f32 of gfx950. (PR #117417)

https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/117417 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk_{fp|bf}8_{f|bf}16 of gfx950. (PR #117384)

https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/117384 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: MC support for v_cvt_scalef32_pk_{f|bf}16_fp4 of gfx950. (PR #117418)

https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/117418 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[libclc] [libclc] Move sign to the CLC builtins library (PR #115699)

https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/115699 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[libclc] [libclc] Move sign to the CLC builtins library (PR #115699)

@@ -322,22 +322,26 @@ foreach( t ${LIBCLC_TARGETS_TO_BUILD} ) if ( ARCH STREQUAL spirv OR ARCH STREQUAL spirv64 ) set( build_flags -O0 -finline-hint-functions -DCLC_SPIRV ) - set( opt_flags ) + set( clc_opt_flags ) + # Inline CLC functions into OpenCL

[libclc] [libclc] Move sign to the CLC builtins library (PR #115699)

https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/115699 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[libclc] [libclc] Move sign to the CLC builtins library (PR #115699)

@@ -0,0 +1,38 @@ +#include +#include +#include + +#define CLC_SIGN(TYPE, F) \ + _CLC_DEF _CLC_OVERLOAD TYPE __clc_sign(TYPE x) { \ +if (__clc_isnan(x)) {

[clang] [llvm] AMDGPU: Handle gfx950 96/128-bit buffer_load_lds (PR #116681)

https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/116681 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: Add v_mfma_ld_scale_b32 for gfx950 (PR #116722)

https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/116722 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: Define v_mfma_f32_32x32x16_bf16 for gfx950 (PR #116679)

https://github.com/arsenm closed https://github.com/llvm/llvm-project/pull/116679 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: Handle gfx950 global_load_lds_* instructions (PR #116680)

https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/116680 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: Define v_mfma_f32_32x32x16_bf16 for gfx950 (PR #116679)

https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/116679 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: Define v_mfma_f32_32x32x16_bf16 for gfx950 (PR #116679)

https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/116679 >From 05a1cf72c9ee13af0a8c33294401a77827a86b1f Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Tue, 19 Dec 2023 12:46:00 +0700 Subject: [PATCH] AMDGPU: Define v_mfma_f32_32x32x16_bf16 for gfx950 Unlike the e

[clang] [llvm] AMDGPU: Add first gfx950 mfma instructions (PR #116312)

https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/116312 >From d5a560bccbc2ea5ed6c5f3bde740ace8feeb28c7 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Tue, 21 Nov 2023 10:03:19 +0900 Subject: [PATCH] AMDGPU: Add first gfx950 mfma instructions Scheduling info and

[clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)

@@ -1024,6 +1024,15 @@ GCNTTIImpl::instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const { } break; } + case Intrinsic::amdgcn_wavefrontsize: { +// TODO: this is a workaround for the pseudo-generic target one gets with no +// specified mcpu, which

[clang] [llvm] AMDGPU: Add v_prng_b32 instruction for gfx950 (PR #116310)

https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/116310 >From f9075098fc1e7741f7ec96053a7586be03dd9ff9 Mon Sep 17 00:00:00 2001 From: Pravin Jagtap Date: Tue, 16 Jan 2024 09:34:12 -0500 Subject: [PATCH] AMDGPU: Add v_prng_b32 instruction for gfx950 Rand num instructi

[clang] [amdgpu-arch] Replace use of HSA with reading sysfs directly (PR #116651)

@@ -0,0 +1,74 @@ +//===- AMDGPUArchByKFD.cpp - list AMDGPU installed --*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apa

[clang] [amdgpu-arch] Replace use of HSA with reading sysfs directly (PR #116651)

@@ -0,0 +1,74 @@ +//===- AMDGPUArchByKFD.cpp - list AMDGPU installed --*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apa

[clang] [amdgpu-arch] Replace use of HSA with reading sysfs directly (PR #116651)

@@ -0,0 +1,74 @@ +//===- AMDGPUArchByKFD.cpp - list AMDGPU installed --*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apa

[clang] [llvm] AMDGPU: Add gfx950 subtarget definitions (PR #116307)

arsenm wrote: ### Merge activity * **Nov 18, 1:34 PM EST**: A user started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/116307). https://github.com/llvm/llvm-project/pull/116307 _

[clang] [llvm] AMDGPU: Add gfx950 subtarget definitions (PR #116307)

https://github.com/arsenm closed https://github.com/llvm/llvm-project/pull/116307 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: Add subtarget features for minimum3/maximum3 instructions (PR #116308)

https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/116308 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: Increase the LDS size to support to 160 KB for gfx950 (PR #116309)

https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/116309 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: Add v_prng_b32 instruction for gfx950 (PR #116310)

https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/116310 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: Add v_prng_b32 instruction for gfx950 (PR #116310)

https://github.com/arsenm closed https://github.com/llvm/llvm-project/pull/116310 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: Add V_CVT_F32_BF16 for gfx950 (PR #116311)

https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/116311 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [amdgpu-arch] Replace use of HSA with reading sysfs directly (PR #116651)

@@ -0,0 +1,74 @@ +//===- AMDGPUArchByKFD.cpp - list AMDGPU installed --*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apa

[clang] [amdgpu-arch] Replace use of HSA with reading sysfs directly (PR #116651)

@@ -0,0 +1,74 @@ +//===- AMDGPUArchByKFD.cpp - list AMDGPU installed --*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apa

[clang] [amdgpu-arch] Replace use of HSA with reading sysfs directly (PR #116651)

https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/116651 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [amdgpu-arch] Replace use of HSA with reading sysfs directly (PR #116651)

@@ -0,0 +1,77 @@ +//===- AMDGPUArchByKFD.cpp - list AMDGPU installed --*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apa

[clang] [amdgpu-arch] Replace use of HSA with reading sysfs directly (PR #116651)

arsenm wrote: We shouldn't need to load a driver to query the devices on the system. This exists for this purpose, if there isn't going to be some ioctl to read it for you https://github.com/llvm/llvm-project/pull/116651 ___ cfe-commits mailing list

[clang] [amdgpu-arch] Replace use of HSA with reading sysfs directly (PR #116651)

arsenm wrote: > > Here's a question, should it respect `ROCR_VISIBLE_DEVICES`? No. That is a transient runtime debug flag. This is not executing code on the device https://github.com/llvm/llvm-project/pull/116651 ___ cfe-commits mailing list cfe-com

[clang] [llvm] AMDGPU: Add first gfx950 mfma instructions (PR #116312)

https://github.com/arsenm closed https://github.com/llvm/llvm-project/pull/116312 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: Add V_CVT_PK_BF16_F32 for gfx950 (PR #116678)

https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/116678 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [amdgpu-arch] Replace use of HSA with reading sysfs directly (PR #116651)

@@ -1,122 +0,0 @@ -//===- AMDGPUArchByHSA.cpp - list AMDGPU installed --*- C++ -*-===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Ap

[clang] [llvm] AMDGPU: Add first gfx950 mfma instructions (PR #116312)

https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/116312 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [clang][CodeGen][SPIRV] Translate `amdgpu_flat_work_group_size` into `reqd_work_group_size`. (PR #116820)

arsenm wrote: > I see. Basically we redefined the semantic of reqd_work_group_size for > HIP-generated SPIRV. Do we have a way to differentiate OpenCL-generated and > HIP-generated SPIRV? They will be translated differently about > reqd_work_group_size There shouldn't be one. Representation n

[clang] [clang][CodeGen][SPIRV] Translate `amdgpu_flat_work_group_size` into `reqd_work_group_size`. (PR #116820)

https://github.com/arsenm requested changes to this pull request. This is just wrong. These are not equivalent or translatable between each other. The flat work group size is 1-dimensional only, and a range of permissible values. reqd_work_group_size is an exact match for all 3 dimensions. The

[clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)

https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/114481 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [llvm][AMDGPU] Fold `llvm.amdgcn.wavefrontsize` early (PR #114481)

https://github.com/arsenm commented: Commit message should be adjusted, it's talking about the old pass https://github.com/llvm/llvm-project/pull/114481 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/lis

[clang] [amdgpu-arch] Replace use of HSA with reading sysfs directly (PR #116651)

arsenm wrote: > I suppose I cannot attest to whether or not the Driver team will modify this > interface, They must never ever do this. It is their fault and problem if this breaks https://github.com/llvm/llvm-project/pull/116651 ___ cfe-commits ma

[clang] Remove Linux search paths on Windows (PR #113628)

@@ -0,0 +1,9 @@ +// REQUIRES: system-windows arsenm wrote: I don't need .cl, as in OpenCL. I mean cl as in clang-cl, the MSVC compatible driver https://github.com/llvm/llvm-project/pull/113628 ___ cfe-commits mailing

[clang] [llvm] AMDGPU: Add gfx950 subtarget definitions (PR #116307)

https://github.com/arsenm ready_for_review https://github.com/llvm/llvm-project/pull/116307 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: Add gfx950 subtarget definitions (PR #116307)

https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/116307 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: Add gfx950 subtarget definitions (PR #116307)

https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/116307 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: Copy correct predicates for SDWA reals (PR #116307)

arsenm wrote: * **#116309** https://app.graphite.dev/github/pr/llvm/llvm-project/116309?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#116308** https://app.graphite.dev/github/pr/llvm/llvm-p

[clang] [clang-tools-extra] [Clang] Use TargetInfo when deciding if an address space is compatible (PR #115777)

@@ -111,6 +111,18 @@ class LLVM_LIBRARY_VISIBILITY AMDGPUTargetInfo final : public TargetInfo { return getPointerWidthV(AddrSpace); } + virtual bool isAddressSpaceSupersetOf(LangAS A, LangAS B) const override { +// The flat address space AS(0) is a superset of all

[clang] [clang-tools-extra] [Clang] Use TargetInfo when deciding if an address space is compatible (PR #115777)

@@ -111,6 +111,18 @@ class LLVM_LIBRARY_VISIBILITY AMDGPUTargetInfo final : public TargetInfo { return getPointerWidthV(AddrSpace); } + virtual bool isAddressSpaceSupersetOf(LangAS A, LangAS B) const override { +// The flat address space AS(0) is a superset of all

[clang] [llvm] AMDGPU: Add gfx950 subtarget definitions (PR #116307)

@@ -650,15 +650,15 @@ class VOP_SDWA_Pseudo pattern=[]> : let Uses = !if(ReadsModeReg, [MODE, EXEC], [EXEC]); let SubtargetPredicate = HasSDWA; - let AssemblerPredicate = HasSDWA; + //let AssemblerPredicate = HasSDWA; arsenm wrote: This should be in #1

[clang] clang: Remove requires system-linux from some driver tests (PR #111976)

https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/111976 >From 7391edf32b0d745a7d57bee5ee2cec8520b646a5 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Fri, 11 Oct 2024 14:33:32 +0400 Subject: [PATCH 01/10] clang: Remove requires system-linux from some driver test

[clang] clang: Remove requires system-linux from some driver tests (PR #111976)

https://github.com/arsenm closed https://github.com/llvm/llvm-project/pull/111976 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[libclc] [libclc] Move several integer functions to CLC library (PR #116786)

@@ -0,0 +1,21 @@ +#ifndef __CLC_INTEGER_CLC_CLZ_H__ +#define __CLC_INTEGER_CLC_CLZ_H__ + +#if defined(CLC_CLSPV) || defined(CLC_SPIRV) +// clspv and spir-v targets provide their own OpenCL-compatible clz +#define __clc_clz clz arsenm wrote: I don't really underst

[libclc] [libclc] Move sign to the CLC builtins library (PR #115699)

@@ -322,22 +322,26 @@ foreach( t ${LIBCLC_TARGETS_TO_BUILD} ) if ( ARCH STREQUAL spirv OR ARCH STREQUAL spirv64 ) set( build_flags -O0 -finline-hint-functions -DCLC_SPIRV ) - set( opt_flags ) + set( clc_opt_flags ) + # Inline CLC functions into OpenCL

[clang] [llvm] AMDGPU: Builtins & Codegen support for v_cvt_scalef32_pk_f32_{fp8|bf8} for gfx950 (PR #117741)

https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/117741 >From ba67e2e766f1432825a505a8e34188c893bd5b75 Mon Sep 17 00:00:00 2001 From: Pravin Jagtap Date: Thu, 18 Apr 2024 01:18:49 -0400 Subject: [PATCH] AMDGPU: Builtins & Codegen support for v_cvt_scalef32_pk_f32_{fp

[clang] [llvm] AMDGPU: Builtins & Codegen support for v_cvt_scalef32_pk_{fp8|bf8}_f32 for gfx950 (PR #117740)

https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/117740 >From 574c5b5d8007a74c53c8be7a699d709f35e9c0ae Mon Sep 17 00:00:00 2001 From: Pravin Jagtap Date: Wed, 17 Apr 2024 09:24:32 -0400 Subject: [PATCH] AMDGPU: Builtins & Codegen support for v_cvt_scalef32_pk_{fp8|bf

[clang] [llvm] AMDGPU: Builtins & Codegen support for v_cvt_scalef32_pk_{fp8|bf8}_f32 for gfx950 (PR #117740)

https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/117740 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: Builtins & Codegen support for: v_cvt_scalef32_[f16|f32]_[bf8|fp8] (PR #117739)

https://github.com/arsenm closed https://github.com/llvm/llvm-project/pull/117739 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: Builtins & Codegen support for v_cvt_scalef32_pk_f32_{fp8|bf8} for gfx950 (PR #117741)

https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/117741 >From bda4643f3b3fe4842735647c7cc5f0fb8686fcaa Mon Sep 17 00:00:00 2001 From: Pravin Jagtap Date: Thu, 18 Apr 2024 01:18:49 -0400 Subject: [PATCH] AMDGPU: Builtins & Codegen support for v_cvt_scalef32_pk_f32_{fp

[clang] [llvm] AMDGPU: Builtins & Codegen support for: v_cvt_scalef32_[f16|f32]_[bf8|fp8] (PR #117739)

https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/117739 >From d0df1b683f6bf5cd4e21997b2a32634a002ec29f Mon Sep 17 00:00:00 2001 From: Pravin Jagtap Date: Wed, 17 Apr 2024 01:25:13 -0400 Subject: [PATCH] AMDGPU: Builtins & Codegen support for: v_cvt_scalef32_[f16|f32]

[clang] [llvm] AMDGPU: Builtins & Codegen support for: v_cvt_scalef32_[f16|f32]_[bf8|fp8] (PR #117739)

https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/117739 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: Builtins & Codegen support for v_cvt_scalef32_pk_{fp8|bf8}_f32 for gfx950 (PR #117740)

https://github.com/arsenm closed https://github.com/llvm/llvm-project/pull/117740 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: Builtins & Codegen support for v_cvt_scalef32_pk_f32_{fp8|bf8} for gfx950 (PR #117741)

https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/117741 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: Builtins & Codegen support for v_cvt_scalef32_pk_f32_{fp8|bf8} for gfx950 (PR #117741)

@@ -14,8 +14,10 @@ typedef unsigned int uint; typedef unsigned int uint2 __attribute__((ext_vector_type(2))); typedef half __attribute__((ext_vector_type(2))) half2; typedef short __attribute__((ext_vector_type(2))) short2; +typedef float __attribute__((ext_vector_type(2))) flo

[clang-tools-extra] [lld] [llvm] tools: Remove unused PluginLoader includes (PR #117644)

arsenm wrote: Apparently the header adds a static define of the option into the included header. This means that it's untested/unused in the llc, lld, lli, llvm-lto, and opt cases. It does appear to have some tests for bug point and clang tidy https://github.com/llvm/llvm-project/pull/117644

[clang-tools-extra] [lld] [llvm] tools: Remove untested PluginLoader includes (PR #117644)

https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/117644 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang-tools-extra] [lld] [llvm] tools: Remove unused PluginLoader includes (PR #117644)

https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/117644 >From 568ff0c59f860239860cdd271108d8655c89 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Mon, 25 Nov 2024 15:26:44 -0800 Subject: [PATCH 1/2] tools: Remove unused PluginLoader includes As far as I can

[clang-tools-extra] [lld] [llvm] tools: Remove untested PluginLoader includes (PR #117644)

https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/117644 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: Builtin & codegen support for v_cvt_scalef32_pk32_{bf|f}16_{bf|fp}6 for gfx950 (PR #117747)

https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/117747 >From dfbc9e972c079db142962f6c2ba0bcfc3a705e52 Mon Sep 17 00:00:00 2001 From: Pravin Jagtap Date: Mon, 22 Apr 2024 05:29:12 -0400 Subject: [PATCH] AMDGPU: Builtin & codegen support for v_cvt_scalef32_pk32_{bf|f}

[clang] [llvm] AMDGPU: Builtin & codegen support for v_cvt_scalef32_pk32_{bf|f}16_{bf|fp}6 for gfx950 (PR #117747)

https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/117747 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: Builtin & CodeGen support for v_cvt_scalef32_pk32_f32_[fp|bf]6 for gfx950 (PR #117745)

https://github.com/arsenm closed https://github.com/llvm/llvm-project/pull/117745 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: Builtin & CodeGen support for v_cvt_scalef32_pk_fp4_{f|bf}16 for gfx950 (PR #117794)

https://github.com/arsenm closed https://github.com/llvm/llvm-project/pull/117794 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: MC support for v_cvt_sr_{f16|bf16}_f32 instructions (PR #117796)

https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/117796 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: MC support for v_cvt_scalef32_sr_{bf8|fp8}_{f16|bf16|f32} (PR #117797)

https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/117797 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: Builtin & CodeGen support for v_cvt_scalef32_sr_pk_fp4 instructions (PR #117798)

https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/117798 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: Builtin & CodeGen support for v_cvt_scalef32_sr_pk_fp4 instructions (PR #117798)

https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/117798 >From 89f06d11a4c3a75d02667a223da6e65187b39654 Mon Sep 17 00:00:00 2001 From: Shilei Tian Date: Mon, 3 Jun 2024 09:44:01 -0400 Subject: [PATCH] AMDGPU: Builtin & CodeGen support for v_cvt_scalef32_sr_pk_fp4 inst

[clang] [llvm] AMDGPU: Builtin & CodeGen support for v_cvt_scalef32_pk32_f32_[fp|bf]6 for gfx950 (PR #117745)

https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/117745 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: Builtins & CodeGen support for v_cvt_scalef32_pk_{f|bf}16_fp4 for gfx950 (PR #117744)

https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/117744 >From 1204ea8880659bd3fbb3f33b1343e3ca6615b011 Mon Sep 17 00:00:00 2001 From: Pravin Jagtap Date: Mon, 22 Apr 2024 01:58:18 -0400 Subject: [PATCH] AMDGPU: Builtins & CodeGen support for v_cvt_scalef32_pk_{f|bf}1

[clang] [llvm] AMDGPU: Builtins & CodeGen support for v_cvt_scalef32_pk_{bf|f}16_{bf|fp}8 for gfx950 (PR #117793)

https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/117793 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: Builtin & codegen support for v_cvt_scalef32_pk32_{bf|f}16_{bf|fp}6 for gfx950 (PR #117747)

https://github.com/arsenm closed https://github.com/llvm/llvm-project/pull/117747 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: Builtins & Codegen support for v_cvt_scalef32_pk_f32_{fp8|bf8} for gfx950 (PR #117741)

arsenm wrote: ### Merge activity * **Nov 26, 7:08 PM EST**: A user started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/117741). https://github.com/llvm/llvm-project/pull/117741 _

[clang] [llvm] AMDGPU: Builtins & CodeGen support for v_cvt_scalef32_pk_{bf|f}16_{bf|fp}8 for gfx950 (PR #117793)

https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/117793 >From d8b5c66d4bd23cda72b898b6ef33cb9e85b2b440 Mon Sep 17 00:00:00 2001 From: Pravin Jagtap Date: Tue, 23 Apr 2024 03:41:27 -0400 Subject: [PATCH] AMDGPU: Builtins & CodeGen support for v_cvt_scalef32_pk_{bf|f}1

[clang] [llvm] AMDGPU: Builtin & CodeGen support for v_cvt_scalef32_pk_fp4_{f|bf}16 for gfx950 (PR #117794)

https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/117794 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: Builtins & CodeGen support for v_cvt_scalef32_pk_{bf|f}16_{bf|fp}8 for gfx950 (PR #117793)

https://github.com/arsenm closed https://github.com/llvm/llvm-project/pull/117793 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: Builtin & CodeGen support for v_cvt_scalef32_pk_fp4_{f|bf}16 for gfx950 (PR #117794)

https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/117794 >From efa35c5c0eb3601db795b43f23a011ebb11377d7 Mon Sep 17 00:00:00 2001 From: Pravin Jagtap Date: Mon, 27 May 2024 01:18:46 -0400 Subject: [PATCH] AMDGPU: Builtin & CodeGen support for v_cvt_scalef32_pk_fp4_{f|b

[clang] [llvm] AMDGPU: MC support for V_CVT_SCALE_SR_FP4 instructions (PR #117795)

https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/117795 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] AMDGPU: Builtin & CodeGen support for v_cvt_scalef32_pk32_f32_[fp|bf]6 for gfx950 (PR #117745)

https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/117745 >From d832fd47f43bc4f83522cdd9e7d2ae444afc2b2a Mon Sep 17 00:00:00 2001 From: Pravin Jagtap Date: Mon, 22 Apr 2024 04:45:35 -0400 Subject: [PATCH] AMDGPU: Builtin & CodeGen support for v_cvt_scalef32_pk32_f32_[f

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