[PATCH] D132819: [RISCV] Add MC support of RISCV zcmp Extension

liaolucy added a comment. I found a lot of ZCE/zce, do we need to change ZCE to ZCMP? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D132819/new/ https://reviews.llvm.org/D132819 ___ cfe-commits mailing li

[PATCH] D158824: [RISCV][MC] MC layer support for xcvmem and xcvelw extensions

liaolucy updated this revision to Diff 558107. liaolucy added a comment. 1. use a custom parser to parse Register-Register load/store 2. Rebase Thanks Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D158824/new/ https://reviews.llvm.org/D158824 File

[PATCH] D158824: [RISCV][MC] MC layer support for xcvmem and xcvelw extensions

This revision was automatically updated to reflect the committed changes. Closed by commit rG71a7108ee91a: [RISCV][MC] MC layer support for xcvmem and xcvelw extensions (authored by liaolucy). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D158824/new/

[PATCH] D128613: Add explicit index type for llvm.vector.extract

liaolucy created this revision. liaolucy added reviewers: craig.topper, joechrisellis, khchen. Herald added subscribers: StephenFan, frasercrmck, luismarques, apazos, sameer.abuasal, s.egerton, Jim, jocewei, PkmX, arphaman, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, jrtc27,

[PATCH] D128613: Add explicit index type for llvm.vector.extract

liaolucy added a comment. The patch : fix crash for rv32 vget intrinsics Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D128613/new/ https://reviews.llvm.org/D128613 ___ cfe-commits mailing list cfe-commit

[PATCH] D128624: [RISCV] Zero extend immediate for vget/vset builtins to match vector.insert/extract intrinsics.

liaolucy accepted this revision. liaolucy added a comment. This revision is now accepted and ready to land. LGTM, thanks Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D128624/new/ https://reviews.llvm.org/D128624 ___

[PATCH] D92715: [Clang][RISCV] Define RISC-V V builtin types

liaolucy added inline comments. Comment at: clang/include/clang/Basic/RISCVVTypes.def:68 +RVV_VECTOR_TYPE_INT("__rvv_int8mf2_t", RvvInt8mf2, RvvInt8mf2Ty, 4, 8, 1, true) +RVV_VECTOR_TYPE_INT("__rvv_int8m1_t", RvvInt8m1, RvvInt8m1Ty, 8, 8, 1, true) +RVV_VECTOR_TYPE_INT("__r

[PATCH] D92715: [Clang][RISCV] Define RISC-V V builtin types

liaolucy added inline comments. Comment at: clang/include/clang/Basic/RISCVVTypes.def:67 +RVV_VECTOR_TYPE_INT("__rvv_int8m2_t", RvvInt8m2, RvvInt8m2Ty, 16, 8, 1, true) +RVV_VECTOR_TYPE_INT("__rvv_int8m4_t", RvvInt8m4, RvvInt8m4Ty, 32, 8, 1, true) +RVV_VECTOR_TYPE_INT("_

[PATCH] D135558: [Clang][NFC]Use isa instead of dyn_cast in shouldAddReversedEqEq

liaolucy created this revision. liaolucy added a reviewer: usaxena95. Herald added a project: All. liaolucy requested review of this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. Fix warning: unused variable ‘MD’ Repository: rG LLVM Github Monorepo https://r

[PATCH] D135558: [Clang][NFC]Use isa instead of dyn_cast in shouldAddReversedEqEq

liaolucy abandoned this revision. liaolucy added a comment. In D135558#3848649 , @tbaeder wrote: > This was fixed as > https://github.com/llvm/llvm-project/commit/6c49d5db30227d21e929bb12dc046c36ede67fad. > Note that for such patches, you don't need to

[PATCH] D158824: [RISCV][MC] MC layer support for xcvmem and xcvelw extensions

liaolucy added a comment. ping Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D158824/new/ https://reviews.llvm.org/D158824 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cg

[PATCH] D158824: [RISCV][MC] MC layer support for xcvmem and xcvelw extensions

liaolucy updated this revision to Diff 556222. liaolucy added a comment. 1. Rebase. 2. Update RISCVISAInfoTest.cpp Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D158824/new/ https://reviews.llvm.org/D158824 Files: clang/test/Preprocessor/riscv-ta

[PATCH] D158824: [RISCV][MC] MC layer support for xcvmem and xcvelw extensions

liaolucy updated this revision to Diff 553911. liaolucy added a comment. Herald added a project: clang. Herald added a subscriber: cfe-commits. Address comments from Jim, thanks. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D158824/new/ https://rev

[PATCH] D118011: [RISCV] Adjust predicates and update intrinsic for clmul and clmulh in Zbkc extension

liaolucy added a comment. clang Zbkc patch: https://reviews.llvm.org/D112774， If there are any mistakes, you can help to point them out Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D118011/new/ https://reviews.llvm.org/D118011 ___

[PATCH] D112774: Support k-ext clang intrinsics

liaolucy added a comment. Herald added a subscriber: pcwang-thead. The scalar crypto v1.0 builtins/intrinsics is still under discussion. Maybe we should wait for the final results？ Repository: rG LLVM Github Monorepo CHANGES SINCE

[PATCH] D98848: [RISCV][Clang] Add RVV Vector Indexed Load intrinsic functions.

liaolucy added a comment. LGTM, thanks Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D98848/new/ https://reviews.llvm.org/D98848 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.

[PATCH] D99189: [RISCV][Clang] Update new overloading rules for RVV intrinsics.

liaolucy added inline comments. Comment at: clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vadd.c:11 // ASM-NOT: warning -#include +#include riscv_vector_overloaded.h ? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.

[PATCH] D99189: [RISCV][Clang] Update new overloading rules for RVV intrinsics.

liaolucy added inline comments. Comment at: clang/utils/TableGen/RISCVVEmitter.cpp:10 // This tablegen backend is responsible for emitting riscv_vector.h and -// riscv_vector_generic.h, which includes a declaration and definition of each -// intrinsic fucntions specified in http

[PATCH] D99151: [RISCV][Clang] Add RVV vleff intrinsic functions.

liaolucy added a comment. LGTM, thanks Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D99151/new/ https://reviews.llvm.org/D99151 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.

[PATCH] D99668: [RISCV][Clang] Add some RVV Floating-Point intrinsic functions.

liaolucy added a comment. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D99668/new/ https://reviews.llvm.org/D99668 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-

[PATCH] D92715: [Clang][RISCV] Define RISC-V V builtin types

liaolucy added a comment. In D92715#2495897 , @HsiangKai wrote: > @liaolucy RISC-V vector types are sizeless types. Sizeless is kind of > characteristic for builtin types. If we use attribute to declare RISC-V > vector types, the frontend does not know a

[PATCH] D95016: [Clang][RISCV] Add custom TableGen backend for riscv-vector intrinsics.

liaolucy added inline comments. Comment at: clang/include/clang/Basic/riscv_vector.td:157 + // Reads or writes "memory" or has other side-effects. + bit HasSideEffects = 0; + Where will it be used？Will just marking sideeffect in the llvm/include/llvm/IR/Intri