https://github.com/lei137 updated
https://github.com/llvm/llvm-project/pull/118004
>From 6abea65c2667ecc0389c95e8a5527c360317524b Mon Sep 17 00:00:00 2001
From: Lei Huang
Date: Wed, 27 Nov 2024 18:44:38 +
Subject: [PATCH 1/6] update llc tc affected
---
.../CostModel/PowerPC/load-to-trunc.
https://github.com/lei137 updated
https://github.com/llvm/llvm-project/pull/118004
>From ae5beae74fcd7717bf40519c80a9d920625bb137 Mon Sep 17 00:00:00 2001
From: Lei Huang
Date: Wed, 27 Nov 2024 18:44:38 +
Subject: [PATCH 1/7] update llc tc affected
---
.../CostModel/PowerPC/load-to-trunc.
@@ -18197,7 +18197,7 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned
BuiltinID,
CallOps.push_back(Ops[i]);
llvm::Function *F = CGM.getIntrinsic(ID);
Value *Call = Builder.CreateCall(F, CallOps);
-return Builder.CreateAlignedStore(Call, Ops[0], MaybeAli
@@ -18197,7 +18197,7 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned
BuiltinID,
CallOps.push_back(Ops[i]);
llvm::Function *F = CGM.getIntrinsic(ID);
Value *Call = Builder.CreateCall(F, CallOps);
-return Builder.CreateAlignedStore(Call, Ops[0], MaybeAli
@@ -18197,7 +18197,7 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned
BuiltinID,
CallOps.push_back(Ops[i]);
llvm::Function *F = CGM.getIntrinsic(ID);
Value *Call = Builder.CreateCall(F, CallOps);
-return Builder.CreateAlignedStore(Call, Ops[0], MaybeAli
https://github.com/lei137 edited
https://github.com/llvm/llvm-project/pull/118004
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@@ -473,7 +473,7 @@ class LLVM_LIBRARY_VISIBILITY PS3PPUTargetInfo : public
OSTargetInfo {
this->IntMaxType = TargetInfo::SignedLongLong;
this->Int64Type = TargetInfo::SignedLongLong;
this->SizeType = TargetInfo::UnsignedInt;
-this->resetDataLayout("E-m:e-p:32:
https://github.com/lei137 edited
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@@ -473,7 +473,7 @@ class LLVM_LIBRARY_VISIBILITY PS3PPUTargetInfo : public
OSTargetInfo {
this->IntMaxType = TargetInfo::SignedLongLong;
this->Int64Type = TargetInfo::SignedLongLong;
this->SizeType = TargetInfo::UnsignedInt;
-this->resetDataLayout("E-m:e-p:32:
https://github.com/lei137 updated
https://github.com/llvm/llvm-project/pull/118004
>From e2046b5000e1a6e104121a8022d33f4f181f5d03 Mon Sep 17 00:00:00 2001
From: Lei Huang
Date: Wed, 27 Nov 2024 18:44:38 +
Subject: [PATCH 1/7] update llc tc affected
---
.../CostModel/PowerPC/load-to-trunc.
lei137 wrote:
ping
https://github.com/llvm/llvm-project/pull/118004
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https://github.com/lei137 closed
https://github.com/llvm/llvm-project/pull/118004
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lei137 wrote:
@johnplatts Please resolve the conflicts for this PR.
https://github.com/llvm/llvm-project/pull/129923
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https://github.com/lei137 commented:
Thank-you for the fix John!
It would be good if your patch can show the changes that is being introduced
via this patch. In prep for that I have put up a
[PR](https://github.com/llvm/llvm-project/pull/130324) to add the existing
checks for this test. Can
https://github.com/lei137 closed
https://github.com/llvm/llvm-project/pull/130324
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https://github.com/lei137 created
https://github.com/llvm/llvm-project/pull/130324
Update tests in pref for IR changes that will be introduced in
https://github.com/llvm/llvm-project/pull/129923
>From 51c05790f7cd38e6db324dcd55b7491118b1c3e2 Mon Sep 17 00:00:00 2001
From: Lei Huang
Date: Fri,
https://github.com/lei137 created
https://github.com/llvm/llvm-project/pull/134430
None
>From 951dc421024f0a5fe7148734eb6efe8d457bc4f6 Mon Sep 17 00:00:00 2001
From: Lei Huang
Date: Fri, 4 Apr 2025 14:31:54 -0400
Subject: [PATCH] [PowerPC] Update altivec.h to use __inline__ for c89
compatibil
https://github.com/lei137 updated
https://github.com/llvm/llvm-project/pull/134430
>From 951dc421024f0a5fe7148734eb6efe8d457bc4f6 Mon Sep 17 00:00:00 2001
From: Lei Huang
Date: Fri, 4 Apr 2025 14:31:54 -0400
Subject: [PATCH 1/2] [PowerPC] Update altivec.h to use __inline__ for c89
compatibilit
https://github.com/lei137 updated
https://github.com/llvm/llvm-project/pull/134430
>From 951dc421024f0a5fe7148734eb6efe8d457bc4f6 Mon Sep 17 00:00:00 2001
From: Lei Huang
Date: Fri, 4 Apr 2025 14:31:54 -0400
Subject: [PATCH 1/3] [PowerPC] Update altivec.h to use __inline__ for c89
compatibilit
https://github.com/lei137 closed
https://github.com/llvm/llvm-project/pull/134430
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@@ -2,12 +2,110 @@
// RUN: -target-cpu pwr10 %s -verify
lei137 wrote:
maybe we should move these to a different test file -> ppc-dmr-types.c
https://github.com/llvm/llvm-project/pull/142480
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@@ -0,0 +1,94 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// RUN: %clang_cc1 -O3 -triple powerpc64le-unknown-unknown -target-cpu future \
+// RUN: -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -O3 -triple powerpc64-ibm-aix -target-cp
https://github.com/lei137 edited
https://github.com/llvm/llvm-project/pull/142480
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https://github.com/lei137 approved this pull request.
In general this LGTM.
Just a few nits. Please also update your descripton and PR title as it says
you are dding `__dmr` type, but you are actually adding type `__dmr1024`.
Thx!
https://github.com/llvm/llvm-project/pull/142480
__
@@ -3455,6 +3455,7 @@ static void encodeTypeForFunctionPointerAuth(const
ASTContext &Ctx,
case BuiltinType::BFloat16:
case BuiltinType::VectorQuad:
case BuiltinType::VectorPair:
+case BuiltinType::VectorDmr1024:
lei137 wrote:
nit: Maybe we can
@@ -0,0 +1,184 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// RUN: %clang_cc1 -triple powerpc64le-linux-unknown -target-cpu future \
+// RUN: -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64le-linux-unknown -target-cp
https://github.com/lei137 approved this pull request.
LGTM with nit.
https://github.com/llvm/llvm-project/pull/142723
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@@ -567,6 +567,12 @@ TARGET_BUILTIN(__builtin_altivec_vextsh2w, "V4SiV8Ss", "",
"power9-vector")
TARGET_BUILTIN(__builtin_altivec_vextsh2d, "V2SLLiV8Ss", "", "power9-vector")
TARGET_BUILTIN(__builtin_altivec_vextsw2d, "V2SLLiV4Si", "", "power9-vector")
+// P9 Binary-coded dec
@@ -515,6 +515,10 @@ TARGET_BUILTIN(__builtin_altivec_vctzh, "V8UsV8Us", "",
"power9-vector")
TARGET_BUILTIN(__builtin_altivec_vctzw, "V4UiV4Ui", "", "power9-vector")
TARGET_BUILTIN(__builtin_altivec_vctzd, "V2ULLiV2ULLi", "", "power9-vector")
+//P9 BCD builtins
+TARGET_BUILT
https://github.com/lei137 approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/144874
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@@ -567,6 +567,13 @@ TARGET_BUILTIN(__builtin_altivec_vextsh2w, "V4SiV8Ss", "",
"power9-vector")
TARGET_BUILTIN(__builtin_altivec_vextsh2d, "V2SLLiV8Ss", "", "power9-vector")
TARGET_BUILTIN(__builtin_altivec_vextsw2d, "V2SLLiV4Si", "", "power9-vector")
+// P9 BCD builtins (th
@@ -294,6 +294,34 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned
BuiltinID,
return Builder.CreateCall(F, Ops, "");
}
+ // BCD convert builtins for P9
+ case PPC::BI__builtin_ppc_national2packed:
+ case PPC::BI__builtin_ppc_packed2zoned:
+ case PPC::BI__built
@@ -1617,10 +1617,14 @@ class VX_VT5_EO5_VB5_XO9_o eo, bits<9> xo,
string opc,
}
// Decimal Convert From/to National/Zoned/Signed-QWord
-def BCDCFN_rec : VX_VT5_EO5_VB5_PS1_XO9_o<7, 385, "bcdcfn." , []>;
-def BCDCFZ_rec : VX_VT5_EO5_VB5_PS1_XO9_o<6, 385, "bcdcfz." , []>;
-d
@@ -655,6 +655,14 @@ let TargetPrefix = "ppc" in { // All intrinsics start
with "llvm.ppc.".
DefaultAttrsIntrinsic<[llvm_v1i128_ty],[llvm_v1i128_ty],[IntrNoMem]>;
// BCD intrinsics.
+ def int_ppc_national2packed: ClangBuiltin<"__builtin_ppc_national2packed">,
+D
https://github.com/lei137 edited
https://github.com/llvm/llvm-project/pull/142723
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@@ -0,0 +1,23 @@
+// Testfile for negative condition for BCD builtins national2packed,
packed2zoned and zoned2packed.
lei137 wrote:
What is the difference between this and
`clang/test/Sema/builtins-bcd-transform.c` below?
I am not sure we need both.
https://gi
https://github.com/lei137 requested changes to this pull request.
Since the description will be the git commit message, maybe it should just be a
summary of what this patch implements.
https://github.com/llvm/llvm-project/pull/142723
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@@ -294,6 +294,34 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned
BuiltinID,
return Builder.CreateCall(F, Ops, "");
}
+ // BCD convert builtins for P9
+ case PPC::BI__builtin_ppc_national2packed:
+ case PPC::BI__builtin_ppc_packed2zoned:
+ case PPC::BI__built
https://github.com/lei137 edited
https://github.com/llvm/llvm-project/pull/142480
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@@ -30,6 +30,7 @@
#endif
+PPC_VECTOR_MMA_TYPE(__dmr1024, VectorDmr1024, 1024)
lei137 wrote:
Since this is a vector type, maybe we can just keep the same naming convention?
```suggestion
PPC_VECTOR_MMA_TYPE(__vector_dmr, VectorDmr, 1024)
```
https://github.c
@@ -0,0 +1,94 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
lei137 wrote:
I might be missing something, what does `mmaplus` imply here? Since this
tests mma builtins that uses the dmr registers, maybe `builtins-ppc-mma-dmr.c
@@ -0,0 +1,184 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
lei137 wrote:
nit: maybe this tests can be renamed to `dmf-types.c`?
https://github.com/llvm/llvm-project/pull/142480
___
@@ -0,0 +1,20 @@
+// RUN: not %clang_cc1 -triple powerpc64le-unknown-linux-gnu -target-cpu
future \
lei137 wrote:
nit: better not to have "future" in the test case names as "future" is a
sliding thing?
https://github.com/llvm/llvm-project/pull/142480
https://github.com/lei137 updated
https://github.com/llvm/llvm-project/pull/147106
>From 36d2b8fc61ab67b8d8010e8b33e3e871f8e1c4f2 Mon Sep 17 00:00:00 2001
From: Lei Huang
Date: Fri, 4 Jul 2025 14:53:15 -0500
Subject: [PATCH 1/4] define new alias for accumulate builtins
---
clang/include/clang
https://github.com/lei137 updated
https://github.com/llvm/llvm-project/pull/147106
>From 36d2b8fc61ab67b8d8010e8b33e3e871f8e1c4f2 Mon Sep 17 00:00:00 2001
From: Lei Huang
Date: Fri, 4 Jul 2025 14:53:15 -0500
Subject: [PATCH 1/2] define new alias for accumulate builtins
---
clang/include/clang
@@ -515,6 +515,10 @@ TARGET_BUILTIN(__builtin_altivec_vctzh, "V8UsV8Us", "",
"power9-vector")
TARGET_BUILTIN(__builtin_altivec_vctzw, "V4UiV4Ui", "", "power9-vector")
TARGET_BUILTIN(__builtin_altivec_vctzd, "V2ULLiV2ULLi", "", "power9-vector")
+//P9 BCD builtins
+TARGET_BUILT
https://github.com/lei137 edited
https://github.com/llvm/llvm-project/pull/144874
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https://github.com/lei137 created
https://github.com/llvm/llvm-project/pull/147106
Initial clean up in prep for adding more accumulate builtins to clang.
>From 36d2b8fc61ab67b8d8010e8b33e3e871f8e1c4f2 Mon Sep 17 00:00:00 2001
From: Lei Huang
Date: Fri, 4 Jul 2025 14:53:15 -0500
Subject: [PATCH
https://github.com/lei137 updated
https://github.com/llvm/llvm-project/pull/147382
>From 36d2b8fc61ab67b8d8010e8b33e3e871f8e1c4f2 Mon Sep 17 00:00:00 2001
From: Lei Huang
Date: Fri, 4 Jul 2025 14:53:15 -0500
Subject: [PATCH 1/5] define new alias for accumulate builtins
---
clang/include/clang
https://github.com/lei137 closed
https://github.com/llvm/llvm-project/pull/147106
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https://github.com/lei137 created
https://github.com/llvm/llvm-project/pull/147382
Initial clean up in prep for adding more accumulate builtins to clang.
>From 36d2b8fc61ab67b8d8010e8b33e3e871f8e1c4f2 Mon Sep 17 00:00:00 2001
From: Lei Huang
Date: Fri, 4 Jul 2025 14:53:15 -0500
Subject: [PATCH
https://github.com/lei137 updated
https://github.com/llvm/llvm-project/pull/147382
>From 36d2b8fc61ab67b8d8010e8b33e3e871f8e1c4f2 Mon Sep 17 00:00:00 2001
From: Lei Huang
Date: Fri, 4 Jul 2025 14:53:15 -0500
Subject: [PATCH 1/6] define new alias for accumulate builtins
---
clang/include/clang
https://github.com/lei137 updated
https://github.com/llvm/llvm-project/pull/147382
>From 36d2b8fc61ab67b8d8010e8b33e3e871f8e1c4f2 Mon Sep 17 00:00:00 2001
From: Lei Huang
Date: Fri, 4 Jul 2025 14:53:15 -0500
Subject: [PATCH 1/7] define new alias for accumulate builtins
---
clang/include/clang
@@ -1148,14 +1078,33 @@ UNALIASED_CUSTOM_BUILTIN(mma_dmxvi8gerx4pp,
"vW1024*W256V", true,
"mma,paired-vector-memops")
UNALIASED_CUSTOM_BUILTIN(mma_pmdmxvi8gerx4pp, "vW1024*W256Vi255i15i15", true,
"mma,paired-vector-memops")
-UN
https://github.com/lei137 closed
https://github.com/llvm/llvm-project/pull/147382
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https://github.com/lei137 edited
https://github.com/llvm/llvm-project/pull/147383
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@@ -0,0 +1,239 @@
+; RUN: llc -verify-machineinstrs -mcpu=pwr9
-mtriple=powerpc64le-unknown-linux-gnu \
+; RUN:< %s | FileCheck %s --check-prefix=POWERPC_64LE
+
+; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc64-ibm-aix \
+; RUN: < %s | FileCheck %s --check-pref
@@ -0,0 +1,143 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 5
+// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - |
FileCheck %s --check-prefix=POWERPC_64
+// RUN: %clang_cc1 -triple powerpc64le-unk
https://github.com/lei137 approved this pull request.
LGTM
Thx
https://github.com/llvm/llvm-project/pull/147246
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https://github.com/lei137 updated
https://github.com/llvm/llvm-project/pull/147383
>From 627e01c2fa4fe756c5feff9b069026f43a2afa45 Mon Sep 17 00:00:00 2001
From: Lei Huang
Date: Fri, 4 Jul 2025 14:53:15 -0500
Subject: [PATCH 1/4] RFC02658:CLANG: DMF VSX Vector bfloat16 GER 2x (rank-2
update)
-
lei137 wrote:
ping
https://github.com/llvm/llvm-project/pull/147383
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