[clang] [llvm] [AArch64][clang][llvm] Add structured sparsity outer product (TMOP) intrinsics (PR #135145)

@@ -3593,6 +3578,25 @@ class sme_tmopa_32b opc, RegisterOperand zn_ty, RegisterOperand zm_ty, s let Constraints = "$ZAda = $_ZAda"; } +multiclass sme_tmopa_16b opc, RegisterOperand zn_ty, RegisterOperand zm_ty, ValueType vt, string mnemonic, string intrinsic> { + def NAME

[clang] [llvm] [AArch64][clang][llvm] Add structured sparsity outer product (TMOP) intrinsics (PR #135145)

@@ -3107,6 +3107,23 @@ let TargetPrefix = "aarch64" in { } } + class SME_OuterProduct_TMOP_Intrinsic + : DefaultAttrsIntrinsic<[], + [llvm_i32_ty, + llvm_anyvector_ty, + LLVMMatchType<0>, + LLVMMatchType<0>, + llvm_nxv16i8

[clang] [llvm] [AArch64][clang][llvm] Add structured sparsity outer product (TMOP) intrinsics (PR #135145)

@@ -281,6 +289,12 @@ class SME2_ZA_Tile_Vec_Multi_Single_Pat : Pat<(intrinsic imm_ty:$tile, vt:$Zn1, vt:$Zn2, vt:$Zm1, vt:$Zm2), (!cast(name # _PSEUDO) $tile, (REG_SEQUENCE ZPR2Mul2, vt:$Zn1, zsub0, vt:$Zn2, zsub1), (REG_SEQUENCE ZPR2Mul2, vt:$Zm1, zsub0, vt:$Zm2

[clang] [llvm] [AArch64][clang][llvm] Add structured sparsity outer product (TMOP) intrinsics (PR #135145)

https://github.com/jthackray updated https://github.com/llvm/llvm-project/pull/135145 >From c0bff6fe1d1630ba93361ac29bca798810a64178 Mon Sep 17 00:00:00 2001 From: Jonathan Thackray Date: Mon, 3 Mar 2025 16:16:46 + Subject: [PATCH 1/5] [AArch64][clang][llvm] Add structured sparsity outer p

[clang] [llvm] [AArch64][clang][llvm] Add structured sparsity outer product (TMOP) intrinsics (PR #135145)

@@ -0,0 +1,191 @@ +// RUN: %clang_cc1 -triple aarch64 -target-feature +sme -target-feature +sme2 -target-feature +bf16 -target-feature +sme-f16f16 -target-feature +sme-b16b16 -verify -emit-llvm -o - %s + +// REQUIRES: aarch64-registered-target + +#include + +void test_features(

[clang] [llvm] [AArch64][clang][llvm] Add structured sparsity outer product (TMOP) intrinsics (PR #135145)

https://github.com/jthackray deleted https://github.com/llvm/llvm-project/pull/135145 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [AArch64][clang][llvm] Add structured sparsity outer product (TMOP) intrinsics (PR #135145)

https://github.com/jthackray closed https://github.com/llvm/llvm-project/pull/135145 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [AArch64][clang][llvm] Add structured sparsity outer product (TMOP) intrinsics (PR #135145)

@@ -0,0 +1,138 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 +; RUN: llc -force-streaming -verify-machineinstrs < %s | FileCheck %s + +target triple = "aarch64-linux" + +define void @tmopa_za32_s8( %zn1, %zn2, %zm, %zk

[clang] [llvm] [AArch64][clang][llvm] Add structured sparsity outer product (TMOP) intrinsics (PR #135145)

@@ -1078,26 +1072,32 @@ let Predicates = [HasSME2p2] in { } // [HasSME2p2] +let Predicates = [HasSME_TMOP] in { + defm FTMOPA_M2ZZZI_HtoS : sme_tmopa_32b<0b11000, ZZ_h_mul_r, ZPR16, nxv8f16, "ftmopa", int_aarch64_sme_tmopa>; jthackray wrote: Thanks, done

[clang] [llvm] [AArch64][clang][llvm] Add structured sparsity outer product (TMOP) intrinsics (PR #135145)

@@ -0,0 +1,138 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 +; RUN: llc -force-streaming -verify-machineinstrs < %s | FileCheck %s + +target triple = "aarch64-linux" + +define void @tmopa_za32_s8( %zn1, %zn2, %zm, %zk

[clang] [llvm] [AArch64][clang][llvm] Add structured sparsity outer product (TMOP) intrinsics (PR #135145)

@@ -0,0 +1,138 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 +; RUN: llc -force-streaming -verify-machineinstrs < %s | FileCheck %s + +target triple = "aarch64-linux" + +define void @tmopa_za32_s8( %zn1, %zn2, %zm, %zk

[clang] [llvm] [AArch64][clang][llvm] Add structured sparsity outer product (TMOP) intrinsics (PR #135145)

@@ -3107,6 +3107,26 @@ let TargetPrefix = "aarch64" in { } } + class SME_OuterProduct_TMOP_Intrinsic + : DefaultAttrsIntrinsic<[], + [llvm_i32_ty, + llvm_anyvector_ty, + LLVMMatchType<0>, + LLVMMatchType<0>, + llvm_nxv16i8

[clang] [llvm] [AArch64][clang][llvm] Add structured sparsity outer product (TMOP) intrinsics (PR #135145)

@@ -3107,6 +3107,26 @@ let TargetPrefix = "aarch64" in { } } + class SME_OuterProduct_TMOP_Intrinsic + : DefaultAttrsIntrinsic<[], + [llvm_i32_ty, + llvm_anyvector_ty, + LLVMMatchType<0>, + LLVMMatchType<0>, + llvm_nxv16i8

[clang] [llvm] [AArch64][clang][llvm] Add structured sparsity outer product (TMOP) intrinsics (PR #135145)

@@ -3593,6 +3578,25 @@ class sme_tmopa_32b opc, RegisterOperand zn_ty, RegisterOperand zm_ty, s let Constraints = "$ZAda = $_ZAda"; } +multiclass sme_tmopa_16b opc, RegisterOperand zn_ty, RegisterOperand zm_ty, ValueType vt, string mnemonic, string intrinsic> { + def NAME

[clang] [llvm] [AArch64][clang][llvm] Add structured sparsity outer product (TMOP) intrinsics (PR #135145)

@@ -3107,6 +3107,23 @@ let TargetPrefix = "aarch64" in { } } + class SME_OuterProduct_TMOP_Intrinsic + : DefaultAttrsIntrinsic<[], + [llvm_i32_ty, + llvm_anyvector_ty, + LLVMMatchType<0>, + LLVMMatchType<0>, + llvm_nxv16i8

[clang] [llvm] [AArch64][clang][llvm] Add structured sparsity outer product (TMOP) intrinsics (PR #135145)

@@ -3593,6 +3578,25 @@ class sme_tmopa_32b opc, RegisterOperand zn_ty, RegisterOperand zm_ty, s let Constraints = "$ZAda = $_ZAda"; } +multiclass sme_tmopa_16b opc, RegisterOperand zn_ty, RegisterOperand zm_ty, ValueType vt, string mnemonic, string intrinsic> { + def NAME

[clang] [llvm] [AArch64][clang][llvm] Add structured sparsity outer product (TMOP) intrinsics (PR #135145)

@@ -0,0 +1,162 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 +; RUN: llc -force-streaming -verify-machineinstrs < %s | FileCheck %s + +target triple = "aarch64-linux" + +define void @stmopa_za32_s8( %zn1, %zn2, %zm, %z

[clang] [llvm] [AArch64][clang][llvm] Add structured sparsity outer product (TMOP) intrinsics (PR #135145)

@@ -3593,6 +3578,31 @@ class sme_tmopa_32b opc, RegisterOperand zn_ty, RegisterOperand zm_ty, s let Constraints = "$ZAda = $_ZAda"; } +multiclass sme_tmopa_16b opc, RegisterOperand zn_ty, RegisterOperand zm_ty, ValueType vt, string mnemonic, SDPatternOperator intrinsic, l

[clang] [llvm] [AArch64][clang][llvm] Add structured sparsity outer product (TMOP) intrinsics (PR #135145)

@@ -104,6 +104,16 @@ class sme_outer_product_pseudo let usesCustomInserter = 1; } +class sme_sparse_outer_product_pseudo +: Pseudo<(outs), (ins i32imm:$tile, zn_ty:$zn, zm_ty:$zm, ZK:$zk, i32imm:$idx), []>, + Sched<[]> { + // Translated to the actual instructions

[clang] [llvm] [AArch64][clang][llvm] Add structured sparsity outer product (TMOP) intrinsics (PR #135145)

@@ -3107,6 +3107,24 @@ let TargetPrefix = "aarch64" in { } } + class SME_OuterProduct_TMOP_Intrinsic + : DefaultAttrsIntrinsic<[], + [llvm_i32_ty, + llvm_anyvector_ty, + LLVMMatchType<0>, + LLVMMatchType<0>, + llvm_nxv16i8

[clang] [llvm] [AArch64][clang][llvm] Add structured sparsity outer product (TMOP) intrinsics (PR #135145)

@@ -0,0 +1,162 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 +; RUN: llc -force-streaming -verify-machineinstrs < %s | FileCheck %s + +target triple = "aarch64-linux" + +define void @stmopa_za32_s8( %zn1, %zn2, %zm, %z

[clang] [llvm] [AArch64][clang][llvm] Add structured sparsity outer product (TMOP) intrinsics (PR #135145)

@@ -3107,6 +3107,23 @@ let TargetPrefix = "aarch64" in { } } + class SME_OuterProduct_TMOP_Intrinsic + : DefaultAttrsIntrinsic<[], + [llvm_i32_ty, + llvm_anyvector_ty, + LLVMMatchType<0>, + LLVMMatchType<0>, + llvm_nxv16i8

[clang] [llvm] [AArch64][clang][llvm] Add structured sparsity outer product (TMOP) intrinsics (PR #135145)

https://github.com/jthackray deleted https://github.com/llvm/llvm-project/pull/135145 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [AArch64] Add FEAT_FPAC to supported CPUs (PR #137330)

https://github.com/jthackray edited https://github.com/llvm/llvm-project/pull/137330 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [AArch64] Add FEAT_FPAC to supported CPUs (PR #137330)

https://github.com/jthackray approved this pull request. Thanks, LGTM https://github.com/llvm/llvm-project/pull/137330 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [AARCH64] Add support for Cortex-A320 (PR #139055)

@@ -228,6 +228,7 @@ StringRef sys::detail::getHostCPUNameForARM(StringRef ProcCpuinfoContent) { .Case("0xd14", "cortex-r82ae") .Case("0xd02", "cortex-a34") .Case("0xd04", "cortex-a35") +.Case("0xd8f", "cortex-a320") jthackray wr

[clang] [llvm] [Clang][LLVM] Implement single-multi vectors MOP4{A/S} (PR #128854)

https://github.com/jthackray deleted https://github.com/llvm/llvm-project/pull/128854 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [Clang][LLVM] Implement single-multi vectors MOP4{A/S} (PR #128854)

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[clang] [llvm] [Clang][LLVM] Implement multi-single vectors MOP4{A/S} (PR #129226)

@@ -257,6 +266,17 @@ class SME2_Tile_Movaz_Pat(name # _PSEUDO) $tile, $base, $offset)>; +class SME2_ZA_Tile_TwoVec_Pat +: Pat<(intrinsic imm_ty:$tile, vt:$Zn, vt:$Zm), + (!cast(name # _PSEUDO) $tile, $Zn, $Zm)>; + +class SME2_ZA_Tile_Vec_Multi_Pat j

[clang] [llvm] [ARM][Clang] Make `+nosimd` functional for AArch32 Targets (PR #130623)

https://github.com/jthackray approved this pull request. Thanks for the fixes. LGTM now. https://github.com/llvm/llvm-project/pull/130623 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commit

[clang] [llvm] [ARM][Clang] Make `+nosimd` functional for AArch32 Targets (PR #130623)

jthackray wrote: typo in commit message: s/emable/enable/ https://github.com/llvm/llvm-project/pull/130623 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [Clang][LLVM] Implement single-multi vectors MOP4{A/S} (PR #128854)

https://github.com/jthackray approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/128854 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [Clang][LLVM] Implement single-multi vectors MOP4{A/S} (PR #128854)

https://github.com/jthackray edited https://github.com/llvm/llvm-project/pull/128854 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [Clang][LLVM] Implement single-multi vectors MOP4{A/S} (PR #128854)

https://github.com/jthackray edited https://github.com/llvm/llvm-project/pull/128854 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [Clang][LLVM] Implement single-multi vectors MOP4{A/S} (PR #128854)

@@ -3064,6 +3064,76 @@ let TargetPrefix = "aarch64" in { def int_aarch64_sme_usmopa_wide : SME_OuterProduct_Intrinsic; def int_aarch64_sme_usmops_wide : SME_OuterProduct_Intrinsic; + class SME_OuterProduct_QuaterTile_Single + : DefaultAttrsIntrinsic<[], + [l

[clang] [llvm] [Clang][LLVM] Implement single-multi vectors MOP4{A/S} (PR #128854)

@@ -600,35 +624,65 @@ class sme_quarter_outer_product_i16_i32{ +multiclass sme_quarter_outer_product_i8_i32{ def _MZZ_BToS : sme_quarter_outer_product_i8_i32<{zn_u, 0}, {zm_u, 0}, subtr, -ZPR8Mul2_Lo, ZPR8Mul2_Hi, mnem

[clang] [llvm] [Clang][LLVM] Implement single-multi vectors MOP4{A/S} (PR #128854)

@@ -600,35 +624,65 @@ class sme_quarter_outer_product_i16_i32{ +multiclass sme_quarter_outer_product_i8_i32{ jthackray wrote: Add `// Single vectors` similar to lower down in the file. https://github.com/llvm/llvm-project/pull/128854

[clang] [llvm] [Clang][LLVM] Implement single-multi vectors MOP4{A/S} (PR #128854)

@@ -3064,6 +3064,76 @@ let TargetPrefix = "aarch64" in { def int_aarch64_sme_usmopa_wide : SME_OuterProduct_Intrinsic; def int_aarch64_sme_usmops_wide : SME_OuterProduct_Intrinsic; + class SME_OuterProduct_QuaterTile_Single jthackray wrote: nit: I think

[clang] [llvm] [Clang][LLVM] Implement single-single vectors MOP4{A/S} (PR #127797)

https://github.com/jthackray approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/127797 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Clang][Sema] Add special handling of mfloat8 in initializer lists (PR #125097)

https://github.com/jthackray approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/125097 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [AARCH64][Neon] switch to using bitcasts in arm_neon.h where appropriate (PR #127043)

https://github.com/jthackray approved this pull request. LGTM. Glad to see the "utterly horrific" code gone :) https://github.com/llvm/llvm-project/pull/127043 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailm

[clang] [Clang][Cmake] fix libtool duplicate member name warnings (PR #133619)

https://github.com/jthackray approved this pull request. Thanks for this fix. LGTM. https://github.com/llvm/llvm-project/pull/133619 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [AARCH64] Add FEAT_SSVE_FEXPA and fix unsupported features list (PR #134368)

https://github.com/jthackray approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/134368 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [NFC][clang] Split clang/lib/CodeGen/CGBuiltin.cpp into target-specific files (PR #132252)

@@ -0,0 +1,105 @@ +//===-- CGBuiltin.h - Emit LLVM Code for builtins -===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Ap

[clang] [NFC][clang] Remove superfluous header files after refactor in #132252 (PR #132495)

https://github.com/jthackray created https://github.com/llvm/llvm-project/pull/132495 None >From 7f1f78ad0c39a8bd1b6c8e4cc7001f6282167d3c Mon Sep 17 00:00:00 2001 From: Jonathan Thackray Date: Fri, 21 Mar 2025 23:56:42 + Subject: [PATCH] [NFC][clang] Remove superfluous header files after r

[clang] [NFC][clang] Split clang/lib/CodeGen/CGBuiltin.cpp into target-specific files (PR #132252)

@@ -0,0 +1,107 @@ +//===-- CGBuiltin.h - Emit LLVM Code for builtins -===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Ap

[clang] [llvm] [Clang][LLVM] Implement multi-single vectors MOP4{A/S} (PR #129226)

@@ -289,6 +289,105 @@ multiclass ZAFPOuterProd { defm SVMOPA : ZAFPOuterProd<"mopa">; defm SVMOPS : ZAFPOuterProd<"mops">; + +// SME2 - FMOP4A, FMOP4S, BFMOP4A, BFMOP4S + +multiclass MOP4 checks>

[clang] [llvm] [Clang][LLVM] Implement multi-single vectors MOP4{A/S} (PR #129226)

@@ -289,6 +289,105 @@ multiclass ZAFPOuterProd { defm SVMOPA : ZAFPOuterProd<"mopa">; defm SVMOPS : ZAFPOuterProd<"mops">; + +// SME2 - FMOP4A, FMOP4S, BFMOP4A, BFMOP4S + +multiclass MOP4 checks>

[clang] [NFC][clang] Remove superfluous header files after refactor in #132252 (PR #132495)

jthackray wrote: > How'd you manage to find the right ones? IMO we should be using > include-what-you-use on these to make sure we get it right (if you have > already, disregard this). Yes, I used iwyu. > Also, can you share before-split/after-split/after-this build time > benchmarks? Does

[clang] [llvm] [NFC][HLSL] Move emitter out of AMDGPU.cpp (PR #133251)

https://github.com/jthackray approved this pull request. Thanks for creating this PR, LGTM (I wasn't able to do it earlier as one of my kids was ill, so away from laptop) https://github.com/llvm/llvm-project/pull/133251 ___ cfe-commits mailing list cf

[clang] [llvm] [AARCH64] Add support for Cortex-A320 (PR #139055)

https://github.com/jthackray approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/139055 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [NFC][AArch64] Add relnote saying modal FP8 intrinsics now fully implemented by ACLE (PR #141743)

https://github.com/jthackray created https://github.com/llvm/llvm-project/pull/141743 None >From a76663bd47510c46b7c4415d4b5d97642ce69967 Mon Sep 17 00:00:00 2001 From: Jonathan Thackray Date: Wed, 28 May 2025 11:47:00 +0100 Subject: [PATCH] [NFC][AArch64] Add relnote saying modal FP8 intrinsi

[clang] [NFC][AArch64] Add relnote saying modal FP8 intrinsics now fully implemented by ACLE (PR #141743)

https://github.com/jthackray updated https://github.com/llvm/llvm-project/pull/141743 >From a76663bd47510c46b7c4415d4b5d97642ce69967 Mon Sep 17 00:00:00 2001 From: Jonathan Thackray Date: Wed, 28 May 2025 11:47:00 +0100 Subject: [PATCH 1/2] [NFC][AArch64] Add relnote saying modal FP8 intrinsics

[clang] [NFC][AArch64] Add relnote saying modal FP8 intrinsics now fully implemented by ACLE (PR #141743)

https://github.com/jthackray closed https://github.com/llvm/llvm-project/pull/141743 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [AArch64] Add CodeGen support for scalar FEAT_CPA (PR #105669)

https://github.com/jthackray approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/105669 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [LLVM][AArch64] Relax SVE/SME codegen predicates for crypto and bitperm instructions. (PR #145696)

https://github.com/jthackray approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/145696 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Clang] Remove AArch64TargetInfo::setArchFeatures (PR #146107)

jthackray wrote: Thanks @sdesmalen-arm. We'd like to move all these kinds of dependencies into tablegen, and have nothing encoded in C++, and I've got a (half-started) diff to do this, but haven't found time to prioritise it yet. Your change helps, though! LGTM. https://github.com/llvm/llvm-p

[clang] [Clang] Remove AArch64TargetInfo::setArchFeatures (PR #146107)

https://github.com/jthackray approved this pull request. https://github.com/llvm/llvm-project/pull/146107 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [AArch64] Add support for -mcpu=gb10. (PR #146515)

https://github.com/jthackray approved this pull request. LGTM. https://github.com/llvm/llvm-project/pull/146515 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Clang][AArch64] Fix feature guards for SVE2p1 builtins available in SME{2}. (PR #147086)

https://github.com/jthackray approved this pull request. Looks good. https://github.com/llvm/llvm-project/pull/147086 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Clang][AArch64] Add missing builtins for __ARM_FEATURE_SME2p1. (PR #147362)

https://github.com/jthackray approved this pull request. A long diff. I can't see anything obviously wrong, so LGTM. https://github.com/llvm/llvm-project/pull/147362 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin

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